[PATCH 9/9] target/ppc: Fix timer register accessors when !KVM

Cédric Le Goater posted 9 patches 2 years, 7 months ago
Maintainers: BALATON Zoltan <balaton@eik.bme.hu>, "Cédric Le Goater" <clg@kaod.org>, "Frédéric Barrat" <fbarrat@linux.ibm.com>, Nicholas Piggin <npiggin@gmail.com>, "Hervé Poussineau" <hpoussin@reactos.org>, Daniel Henrique Barboza <danielhb413@gmail.com>, David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>, Paolo Bonzini <pbonzini@redhat.com>
[PATCH 9/9] target/ppc: Fix timer register accessors when !KVM
Posted by Cédric Le Goater 2 years, 7 months ago
When the Timer Control and Timer Status registers are modified, avoid
calling the KVM backend when not available

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 target/ppc/kvm.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index a7f2de9d1018..a8a935e26726 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1728,6 +1728,10 @@ int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
         .addr = (uintptr_t) &bits,
     };
 
+    if (!kvm_enabled()) {
+        return 0;
+    }
+
     return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
 }
 
@@ -1741,6 +1745,10 @@ int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
         .addr = (uintptr_t) &bits,
     };
 
+    if (!kvm_enabled()) {
+        return 0;
+    }
+
     return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
 }
 
@@ -1755,6 +1763,10 @@ int kvmppc_set_tcr(PowerPCCPU *cpu)
         .addr = (uintptr_t) &tcr,
     };
 
+    if (!kvm_enabled()) {
+        return 0;
+    }
+
     return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
 }
 
-- 
2.41.0


Re: [PATCH 9/9] target/ppc: Fix timer register accessors when !KVM
Posted by Richard Henderson 2 years, 7 months ago
On 6/20/23 07:59, Cédric Le Goater wrote:
> When the Timer Control and Timer Status registers are modified, avoid
> calling the KVM backend when not available
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>   target/ppc/kvm.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index a7f2de9d1018..a8a935e26726 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -1728,6 +1728,10 @@ int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
>           .addr = (uintptr_t) &bits,
>       };
>   
> +    if (!kvm_enabled()) {
> +        return 0;
> +    }

assert(kvm_enabled()) ?


r~

Re: [PATCH 9/9] target/ppc: Fix timer register accessors when !KVM
Posted by Cédric Le Goater 2 years, 7 months ago
On 6/20/23 11:10, Richard Henderson wrote:
> On 6/20/23 07:59, Cédric Le Goater wrote:
>> When the Timer Control and Timer Status registers are modified, avoid
>> calling the KVM backend when not available
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>   target/ppc/kvm.c | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
>> index a7f2de9d1018..a8a935e26726 100644
>> --- a/target/ppc/kvm.c
>> +++ b/target/ppc/kvm.c
>> @@ -1728,6 +1728,10 @@ int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
>>           .addr = (uintptr_t) &bits,
>>       };
>> +    if (!kvm_enabled()) {
>> +        return 0;
>> +    }
> 
> assert(kvm_enabled()) ?
> 

Well, the callers store_booke_t[cs]r() can be called from instruction
implementation and from the timer reset handler, which is common to all
accelerators.

This is only important when running some of the emulated BookE machines
on a PPC64 host, which enables KVM. This is not the most common host
config but nevertheless, the machines should run and this fixes it.

Thanks,

C.