[PULL 0/1] loongarch-to-apply queue
[PULL 0/7] loongarch-to-apply queue
1
The following changes since commit 848a6caa88b9f082c89c9b41afa975761262981d:
1
The following changes since commit 63011373ad22c794a013da69663c03f1297a5c56:
2
2
3
Merge tag 'migration-20230602-pull-request' of https://gitlab.com/juan.quintela/qemu into staging (2023-06-02 17:33:29 -0700)
3
Merge tag 'pull-riscv-to-apply-20231012-1' of https://github.com/alistair23/qemu into staging (2023-10-12 10:24:44 -0400)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230605
7
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231013
8
8
9
for you to fetch changes up to 8555ddc671203969b0e6eb651e538d02a9a79b3a:
9
for you to fetch changes up to 1bea6930ca7b9587ea8d8fbb77069b6a13aa031a:
10
10
11
hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxes (2023-06-05 11:08:55 +0800)
11
LoongArch: step down as general arch maintainer (2023-10-13 10:05:32 +0800)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
Fixes Coverity CID: 1512452, 1512453
14
pull-loongarch-20231013
15
Fixes: 78464f023b54 ("hw/loongarch/virt: Modify ipi as percpu device")
15
16
*Fix ASXE flag conflict
17
*Add preldx instruction
18
*Add preldx instruction
19
*Remove unused region
20
*Xiao juan step down as general arch maintainer
16
21
17
----------------------------------------------------------------
22
----------------------------------------------------------------
18
Jiaxun Yang (1):
23
Jiajie Chen (1):
19
hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxes
24
target/loongarch: fix ASXE flag conflict
20
25
21
hw/intc/loongarch_ipi.c | 6 +++---
26
Philippe Mathieu-Daudé (2):
22
include/hw/intc/loongarch_ipi.h | 4 +++-
27
hw/loongarch/virt: Remove unused ISA UART
23
2 files changed, 6 insertions(+), 4 deletions(-)
28
hw/loongarch/virt: Remove unused ISA Bus
29
30
Song Gao (2):
31
target/loongarch: Add preldx instruction
32
hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region
33
34
Thomas Weißschuh (1):
35
hw/loongarch: remove global loaderparams variable
36
37
Xiaojuan Yang (1):
38
LoongArch: step down as general arch maintainer
39
40
MAINTAINERS | 2 -
41
hw/loongarch/Kconfig | 2 -
42
hw/loongarch/virt.c | 103 +++++++------------------
43
include/hw/loongarch/virt.h | 3 -
44
target/loongarch/cpu.h | 4 +-
45
target/loongarch/disas.c | 7 ++
46
target/loongarch/insn_trans/trans_memory.c.inc | 5 ++
47
target/loongarch/insns.decode | 3 +
48
tests/tcg/loongarch64/system/boot.S | 7 +-
49
9 files changed, 49 insertions(+), 87 deletions(-)
50
51
diff view generated by jsdifflib
New patch
[PULL 1/7] target/loongarch: fix ASXE flag conflict
1
From: Jiajie Chen <c@jia.je>
1
2
3
HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG,
4
enabling LASX instructions even when CSR_EUEN.ASXE=0.
5
6
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907
7
Signed-off-by: Jiajie Chen <c@jia.je>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Reviewed-by: Song Gao <gaosong@loongson.cn>
10
Message-Id: <20230930112837.1871691-1-c@jia.je>
11
Signed-off-by: Song Gao <gaosong@loongson.cn>
12
---
13
target/loongarch/cpu.h | 4 ++--
14
1 file changed, 2 insertions(+), 2 deletions(-)
15
16
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
17
index XXXXXXX..XXXXXXX 100644
18
--- a/target/loongarch/cpu.h
19
+++ b/target/loongarch/cpu.h
20
@@ -XXX,XX +XXX,XX @@ static inline void set_pc(CPULoongArchState *env, uint64_t value)
21
* LoongArch CPUs hardware flags.
22
*/
23
#define HW_FLAGS_PLV_MASK R_CSR_CRMD_PLV_MASK /* 0x03 */
24
-#define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */
25
#define HW_FLAGS_EUEN_FPE 0x04
26
#define HW_FLAGS_EUEN_SXE 0x08
27
-#define HW_FLAGS_EUEN_ASXE 0x10
28
+#define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */
29
#define HW_FLAGS_VA32 0x20
30
+#define HW_FLAGS_EUEN_ASXE 0x40
31
32
static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
33
uint64_t *cs_base, uint32_t *flags)
34
--
35
2.25.1
diff view generated by jsdifflib
New patch
[PULL 2/7] target/loongarch: Add preldx instruction
1
Resolve the issue of starting the Loongnix 20.5[1] system failure.
1
2
3
Logs:
4
Loading Linux 4.19.0-19-loongson-3 ...
5
Loading initial ramdisk ...
6
PROGRESS CODE: V02010004 I0
7
PROGRESS CODE: V03101019 I0
8
Error: unknown opcode. 90000000003a3e6c: 0x382c6d82
9
10
[1] http://pkg.loongnix.cn/loongnix/isos/Loongnix-20.5/Loongnix-20.5.cartoon.gui.loongarch64.en.qcow2
11
12
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
13
Signed-off-by: Song Gao <gaosong@loongson.cn>
14
Message-Id: <20230905123910.3052023-1-gaosong@loongson.cn>
15
---
16
target/loongarch/disas.c | 7 +++++++
17
target/loongarch/insn_trans/trans_memory.c.inc | 5 +++++
18
target/loongarch/insns.decode | 3 +++
19
3 files changed, 15 insertions(+)
20
21
diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
22
index XXXXXXX..XXXXXXX 100644
23
--- a/target/loongarch/disas.c
24
+++ b/target/loongarch/disas.c
25
@@ -XXX,XX +XXX,XX @@ static void output_hint_r_i(DisasContext *ctx, arg_hint_r_i *a,
26
output(ctx, mnemonic, "%d, r%d, %d", a->hint, a->rj, a->imm);
27
}
28
29
+static void output_hint_rr(DisasContext *ctx, arg_hint_rr *a,
30
+ const char *mnemonic)
31
+{
32
+ output(ctx, mnemonic, "%d, r%d, r%d", a->hint, a->rj, a->rk);
33
+}
34
+
35
static void output_i(DisasContext *ctx, arg_i *a, const char *mnemonic)
36
{
37
output(ctx, mnemonic, "%d", a->imm);
38
@@ -XXX,XX +XXX,XX @@ INSN(ld_bu, rr_i)
39
INSN(ld_hu, rr_i)
40
INSN(ld_wu, rr_i)
41
INSN(preld, hint_r_i)
42
+INSN(preldx, hint_rr)
43
INSN(fld_s, fr_i)
44
INSN(fst_s, fr_i)
45
INSN(fld_d, fr_i)
46
diff --git a/target/loongarch/insn_trans/trans_memory.c.inc b/target/loongarch/insn_trans/trans_memory.c.inc
47
index XXXXXXX..XXXXXXX 100644
48
--- a/target/loongarch/insn_trans/trans_memory.c.inc
49
+++ b/target/loongarch/insn_trans/trans_memory.c.inc
50
@@ -XXX,XX +XXX,XX @@ static bool trans_preld(DisasContext *ctx, arg_preld *a)
51
return true;
52
}
53
54
+static bool trans_preldx(DisasContext *ctx, arg_preldx * a)
55
+{
56
+ return true;
57
+}
58
+
59
static bool trans_dbar(DisasContext *ctx, arg_dbar * a)
60
{
61
tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
62
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
63
index XXXXXXX..XXXXXXX 100644
64
--- a/target/loongarch/insns.decode
65
+++ b/target/loongarch/insns.decode
66
@@ -XXX,XX +XXX,XX @@
67
&rrr rd rj rk
68
&rr_i rd rj imm
69
&hint_r_i hint rj imm
70
+&hint_rr hint rj rk
71
&rrr_sa rd rj rk sa
72
&rr_ms_ls rd rj ms ls
73
&ff fd fj
74
@@ -XXX,XX +XXX,XX @@
75
@rr_i16 .... .. imm:s16 rj:5 rd:5 &rr_i
76
@rr_i16s2 .... .. ................ rj:5 rd:5 &rr_i imm=%offs16
77
@hint_r_i12 .... ...... imm:s12 rj:5 hint:5 &hint_r_i
78
+@hint_rr .... ........ ..... rk:5 rj:5 hint:5 &hint_rr
79
@rrr_sa2p1 .... ........ ... .. rk:5 rj:5 rd:5 &rrr_sa sa=%sa2p1
80
@rrr_sa2 .... ........ ... sa:2 rk:5 rj:5 rd:5 &rrr_sa
81
@rrr_sa3 .... ........ .. sa:3 rk:5 rj:5 rd:5 &rrr_sa
82
@@ -XXX,XX +XXX,XX @@ ldx_bu 0011 10000010 00000 ..... ..... ..... @rrr
83
ldx_hu 0011 10000010 01000 ..... ..... ..... @rrr
84
ldx_wu 0011 10000010 10000 ..... ..... ..... @rrr
85
preld 0010 101011 ............ ..... ..... @hint_r_i12
86
+preldx 0011 10000010 11000 ..... ..... ..... @hint_rr
87
dbar 0011 10000111 00100 ............... @i15
88
ibar 0011 10000111 00101 ............... @i15
89
ldptr_w 0010 0100 .............. ..... ..... @rr_i14s2
90
--
91
2.25.1
92
93
diff view generated by jsdifflib
New patch
[PULL 3/7] hw/loongarch: remove global loaderparams variable
1
From: Thomas Weißschuh <thomas@t-8ch.de>
1
2
3
Passing the struct around explicitly makes the control-flow more
4
obvious.
5
6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Song Gao <gaosong@loongson.cn>
8
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
9
Message-Id: <20231010-loongarch-loader-params-v2-1-512cc7959683@t-8ch.de>
10
Signed-off-by: Song Gao <gaosong@loongson.cn>
11
---
12
hw/loongarch/virt.c | 50 ++++++++++++++++++++++++---------------------
13
1 file changed, 27 insertions(+), 23 deletions(-)
14
15
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/loongarch/virt.c
18
+++ b/hw/loongarch/virt.c
19
@@ -XXX,XX +XXX,XX @@
20
#include "qemu/error-report.h"
21
22
23
+struct loaderparams {
24
+ uint64_t ram_size;
25
+ const char *kernel_filename;
26
+ const char *kernel_cmdline;
27
+ const char *initrd_filename;
28
+};
29
+
30
static void virt_flash_create(LoongArchMachineState *lams)
31
{
32
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
33
@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps loongarch_virt_pm_ops = {
34
}
35
};
36
37
-static struct _loaderparams {
38
- uint64_t ram_size;
39
- const char *kernel_filename;
40
- const char *kernel_cmdline;
41
- const char *initrd_filename;
42
-} loaderparams;
43
-
44
static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
45
{
46
return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
47
}
48
49
-static int64_t load_kernel_info(void)
50
+static int64_t load_kernel_info(const struct loaderparams *loaderparams)
51
{
52
uint64_t kernel_entry, kernel_low, kernel_high;
53
ssize_t kernel_size;
54
55
- kernel_size = load_elf(loaderparams.kernel_filename, NULL,
56
+ kernel_size = load_elf(loaderparams->kernel_filename, NULL,
57
cpu_loongarch_virt_to_phys, NULL,
58
&kernel_entry, &kernel_low,
59
&kernel_high, NULL, 0,
60
@@ -XXX,XX +XXX,XX @@ static int64_t load_kernel_info(void)
61
62
if (kernel_size < 0) {
63
error_report("could not load kernel '%s': %s",
64
- loaderparams.kernel_filename,
65
+ loaderparams->kernel_filename,
66
load_elf_strerror(kernel_size));
67
exit(1);
68
}
69
@@ -XXX,XX +XXX,XX @@ static void reset_load_elf(void *opaque)
70
}
71
}
72
73
-static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg)
74
+static void fw_cfg_add_kernel_info(const struct loaderparams *loaderparams,
75
+ FWCfgState *fw_cfg)
76
{
77
/*
78
* Expose the kernel, the command line, and the initrd in fw_cfg.
79
@@ -XXX,XX +XXX,XX @@ static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg)
80
*/
81
load_image_to_fw_cfg(fw_cfg,
82
FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
83
- loaderparams.kernel_filename,
84
+ loaderparams->kernel_filename,
85
false);
86
87
- if (loaderparams.initrd_filename) {
88
+ if (loaderparams->initrd_filename) {
89
load_image_to_fw_cfg(fw_cfg,
90
FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
91
- loaderparams.initrd_filename, false);
92
+ loaderparams->initrd_filename, false);
93
}
94
95
- if (loaderparams.kernel_cmdline) {
96
+ if (loaderparams->kernel_cmdline) {
97
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
98
- strlen(loaderparams.kernel_cmdline) + 1);
99
+ strlen(loaderparams->kernel_cmdline) + 1);
100
fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
101
- loaderparams.kernel_cmdline);
102
+ loaderparams->kernel_cmdline);
103
}
104
}
105
106
-static void loongarch_firmware_boot(LoongArchMachineState *lams)
107
+static void loongarch_firmware_boot(LoongArchMachineState *lams,
108
+ const struct loaderparams *loaderparams)
109
{
110
- fw_cfg_add_kernel_info(lams->fw_cfg);
111
+ fw_cfg_add_kernel_info(loaderparams, lams->fw_cfg);
112
}
113
114
-static void loongarch_direct_kernel_boot(LoongArchMachineState *lams)
115
+static void loongarch_direct_kernel_boot(LoongArchMachineState *lams,
116
+ const struct loaderparams *loaderparams)
117
{
118
MachineState *machine = MACHINE(lams);
119
int64_t kernel_addr = 0;
120
LoongArchCPU *lacpu;
121
int i;
122
123
- kernel_addr = load_kernel_info();
124
+ kernel_addr = load_kernel_info(loaderparams);
125
if (!machine->firmware) {
126
for (i = 0; i < machine->smp.cpus; i++) {
127
lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
128
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
129
MachineClass *mc = MACHINE_GET_CLASS(machine);
130
CPUState *cpu;
131
char *ramName = NULL;
132
+ struct loaderparams loaderparams = { };
133
134
if (!cpu_model) {
135
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
136
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
137
/* load the kernel. */
138
if (loaderparams.kernel_filename) {
139
if (lams->bios_loaded) {
140
- loongarch_firmware_boot(lams);
141
+ loongarch_firmware_boot(lams, &loaderparams);
142
} else {
143
- loongarch_direct_kernel_boot(lams);
144
+ loongarch_direct_kernel_boot(lams, &loaderparams);
145
}
146
}
147
fdt_add_flash_node(lams);
148
--
149
2.25.1
150
151
diff view generated by jsdifflib
New patch
[PULL 4/7] hw/loongarch/virt: Remove unused ISA UART
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
2
3
The LoongArch 'virt' machine doesn't use any ISA UART.
4
No need to build the device model, remove its Kconfig entry.
5
6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Song Gao <gaosong@loongson.cn>
8
Message-Id: <20231010135342.40219-2-philmd@linaro.org>
9
Signed-off-by: Song Gao <gaosong@loongson.cn>
10
---
11
hw/loongarch/Kconfig | 1 -
12
1 file changed, 1 deletion(-)
13
14
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
15
index XXXXXXX..XXXXXXX 100644
16
--- a/hw/loongarch/Kconfig
17
+++ b/hw/loongarch/Kconfig
18
@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
19
imply NVDIMM
20
select ISA_BUS
21
select SERIAL
22
- select SERIAL_ISA
23
select VIRTIO_PCI
24
select PLATFORM_BUS
25
select LOONGARCH_IPI
26
--
27
2.25.1
28
29
diff view generated by jsdifflib
New patch
[PULL 5/7] hw/loongarch/virt: Remove unused ISA Bus
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
1
2
3
The LoongArch 'virt' machine doesn't use its ISA I/O region.
4
5
If a ISA device were to be mapped there, there is no support
6
for ISA IRQ. Unlikely useful. Simply remove.
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Song Gao <gaosong@loongson.cn>
10
Message-Id: <20231010135342.40219-3-philmd@linaro.org>
11
Signed-off-by: Song Gao <gaosong@loongson.cn>
12
---
13
hw/loongarch/Kconfig | 1 -
14
hw/loongarch/virt.c | 5 -----
15
include/hw/loongarch/virt.h | 3 ---
16
3 files changed, 9 deletions(-)
17
18
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
19
index XXXXXXX..XXXXXXX 100644
20
--- a/hw/loongarch/Kconfig
21
+++ b/hw/loongarch/Kconfig
22
@@ -XXX,XX +XXX,XX @@ config LOONGARCH_VIRT
23
imply VIRTIO_VGA
24
imply PCI_DEVICES
25
imply NVDIMM
26
- select ISA_BUS
27
select SERIAL
28
select VIRTIO_PCI
29
select PLATFORM_BUS
30
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
31
index XXXXXXX..XXXXXXX 100644
32
--- a/hw/loongarch/virt.c
33
+++ b/hw/loongarch/virt.c
34
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
35
machine_memory_devices_init(machine, device_mem_base, device_mem_size);
36
}
37
38
- /* Add isa io region */
39
- memory_region_init_alias(&lams->isa_io, NULL, "isa-io",
40
- get_system_io(), 0, VIRT_ISA_IO_SIZE);
41
- memory_region_add_subregion(address_space_mem, VIRT_ISA_IO_BASE,
42
- &lams->isa_io);
43
/* load the BIOS image. */
44
loongarch_firmware_init(lams);
45
46
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
47
index XXXXXXX..XXXXXXX 100644
48
--- a/include/hw/loongarch/virt.h
49
+++ b/include/hw/loongarch/virt.h
50
@@ -XXX,XX +XXX,XX @@
51
52
#define LOONGARCH_MAX_CPUS 256
53
54
-#define VIRT_ISA_IO_BASE 0x18000000UL
55
-#define VIRT_ISA_IO_SIZE 0x0004000
56
#define VIRT_FWCFG_BASE 0x1e020000UL
57
#define VIRT_BIOS_BASE 0x1c000000UL
58
#define VIRT_BIOS_SIZE (4 * MiB)
59
@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
60
61
MemoryRegion lowmem;
62
MemoryRegion highmem;
63
- MemoryRegion isa_io;
64
MemoryRegion bios;
65
bool bios_loaded;
66
/* State for other subsystems/APIs: */
67
--
68
2.25.1
69
70
diff view generated by jsdifflib
[PULL 1/1] hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxes
[PULL 6/7] hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region
1
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
1
The system test shutdown uses the 'loongarch_virt_pm' region.
2
We can use the write AcpiFadtData.sleep_clt register to realize the shutdown.
2
3
3
As per "Loongson 3A5000/3B5000 Processor Reference Manual",
4
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Loongson 3A5000's IPI implementation have 4 mailboxes per
5
Signed-off-by: Song Gao <gaosong@loongson.cn>
5
core.
6
Message-ID: <20231012072351.1409344-1-gaosong@loongson.cn>
6
7
However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
8
percpu device"), the number of IPI mailboxes was reduced to
9
one, which mismatches actual hardware.
10
11
It won't affect LoongArch based system as LoongArch boot code
12
only uses the first mailbox, however MIPS based Loongson boot
13
code uses all 4 mailboxes.
14
15
Fixes Coverity CID: 1512452, 1512453
16
Fixes: 78464f023b54 ("hw/loongarch/virt: Modify ipi as percpu device")
17
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
18
Reviewed-by: Song Gao <gaosong@loongson.cn>
19
Message-Id: <20230521102307.87081-2-jiaxun.yang@flygoat.com>
20
Signed-off-by: Song Gao <gaosong@loongson.cn>
7
Signed-off-by: Song Gao <gaosong@loongson.cn>
21
---
8
---
22
hw/intc/loongarch_ipi.c | 6 +++---
9
hw/loongarch/virt.c | 48 +----------------------------
23
include/hw/intc/loongarch_ipi.h | 4 +++-
10
tests/tcg/loongarch64/system/boot.S | 7 +++--
24
2 files changed, 6 insertions(+), 4 deletions(-)
11
2 files changed, 5 insertions(+), 50 deletions(-)
25
12
26
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
13
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
27
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
28
--- a/hw/intc/loongarch_ipi.c
15
--- a/hw/loongarch/virt.c
29
+++ b/hw/intc/loongarch_ipi.c
16
+++ b/hw/loongarch/virt.c
30
@@ -XXX,XX +XXX,XX @@ static void loongarch_ipi_init(Object *obj)
17
@@ -XXX,XX +XXX,XX @@ static void fdt_add_memory_node(MachineState *ms,
31
18
g_free(nodename);
32
static const VMStateDescription vmstate_ipi_core = {
19
}
33
.name = "ipi-single",
20
34
- .version_id = 1,
21
-#define PM_BASE 0x10080000
35
- .minimum_version_id = 1,
22
-#define PM_SIZE 0x100
36
+ .version_id = 2,
23
-#define PM_CTRL 0x10
37
+ .minimum_version_id = 2,
24
-
38
.fields = (VMStateField[]) {
25
static void virt_build_smbios(LoongArchMachineState *lams)
39
VMSTATE_UINT32(status, IPICore),
26
{
40
VMSTATE_UINT32(en, IPICore),
27
MachineState *ms = MACHINE(lams);
41
VMSTATE_UINT32(set, IPICore),
28
@@ -XXX,XX +XXX,XX @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
42
VMSTATE_UINT32(clear, IPICore),
29
memmap_entries++;
43
- VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
30
}
44
+ VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2),
31
45
VMSTATE_END_OF_LIST()
32
-/*
46
}
33
- * This is a placeholder for missing ACPI,
47
};
34
- * and will eventually be replaced.
48
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
35
- */
36
-static uint64_t loongarch_virt_pm_read(void *opaque, hwaddr addr, unsigned size)
37
-{
38
- return 0;
39
-}
40
-
41
-static void loongarch_virt_pm_write(void *opaque, hwaddr addr,
42
- uint64_t val, unsigned size)
43
-{
44
- if (addr != PM_CTRL) {
45
- return;
46
- }
47
-
48
- switch (val) {
49
- case 0x00:
50
- qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
51
- return;
52
- case 0xff:
53
- qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
54
- return;
55
- default:
56
- return;
57
- }
58
-}
59
-
60
-static const MemoryRegionOps loongarch_virt_pm_ops = {
61
- .read = loongarch_virt_pm_read,
62
- .write = loongarch_virt_pm_write,
63
- .endianness = DEVICE_NATIVE_ENDIAN,
64
- .valid = {
65
- .min_access_size = 1,
66
- .max_access_size = 1
67
- }
68
-};
69
-
70
static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
71
{
72
return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
73
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
74
SysBusDevice *d;
75
PCIBus *pci_bus;
76
MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg;
77
- MemoryRegion *mmio_alias, *mmio_reg, *pm_mem;
78
+ MemoryRegion *mmio_alias, *mmio_reg;
79
int i;
80
81
gpex_dev = qdev_new(TYPE_GPEX_HOST);
82
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
83
VIRT_RTC_IRQ - VIRT_GSI_BASE));
84
fdt_add_rtc_node(lams);
85
86
- pm_mem = g_new(MemoryRegion, 1);
87
- memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
88
- NULL, "loongarch_virt_pm", PM_SIZE);
89
- memory_region_add_subregion(get_system_memory(), PM_BASE, pm_mem);
90
/* acpi ged */
91
lams->acpi_ged = create_acpi_ged(pch_pic, lams);
92
/* platform bus */
93
diff --git a/tests/tcg/loongarch64/system/boot.S b/tests/tcg/loongarch64/system/boot.S
49
index XXXXXXX..XXXXXXX 100644
94
index XXXXXXX..XXXXXXX 100644
50
--- a/include/hw/intc/loongarch_ipi.h
95
--- a/tests/tcg/loongarch64/system/boot.S
51
+++ b/include/hw/intc/loongarch_ipi.h
96
+++ b/tests/tcg/loongarch64/system/boot.S
52
@@ -XXX,XX +XXX,XX @@
97
@@ -XXX,XX +XXX,XX @@ _start:
53
#define MAIL_SEND_OFFSET 0
98
    .align 16
54
#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
99
_exit:
55
100
2: /* QEMU ACPI poweroff */
56
+#define IPI_MBX_NUM 4
101
-    li.w t0, 0xff
102
-    li.w t1, 0x10080010
103
-    st.w t0, t1, 0
104
+    li.w t0, 0x34
105
+    li.w t1, 0x100e001c
106
+    st.b t0, t1, 0
57
+
107
+
58
#define TYPE_LOONGARCH_IPI "loongarch_ipi"
108
    idle 0
59
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchIPI, LOONGARCH_IPI)
109
    bl 2b
60
61
@@ -XXX,XX +XXX,XX @@ typedef struct IPICore {
62
uint32_t set;
63
uint32_t clear;
64
/* 64bit buf divide into 2 32bit buf */
65
- uint32_t buf[2];
66
+ uint32_t buf[IPI_MBX_NUM * 2];
67
qemu_irq irq;
68
} IPICore;
69
110
70
--
111
--
71
2.39.1
112
2.25.1
113
114
diff view generated by jsdifflib
New patch
[PULL 7/7] LoongArch: step down as general arch maintainer
1
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
1
2
3
I haven't really been working on LoongArch for some time now,
4
so let's remove myself from this entry.
5
6
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
7
Acked-by: Song Gao <gaosong@loongson.cn>
8
Message-Id: <20231012095135.1423071-1-yangxiaojuan@loongson.cn>
9
Signed-off-by: Song Gao <gaosong@loongson.cn>
10
---
11
MAINTAINERS | 2 --
12
1 file changed, 2 deletions(-)
13
14
diff --git a/MAINTAINERS b/MAINTAINERS
15
index XXXXXXX..XXXXXXX 100644
16
--- a/MAINTAINERS
17
+++ b/MAINTAINERS
18
@@ -XXX,XX +XXX,XX @@ F: disas/hppa.c
19
20
LoongArch TCG CPUs
21
M: Song Gao <gaosong@loongson.cn>
22
-M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
23
S: Maintained
24
F: target/loongarch/
25
F: tests/tcg/loongarch64/
26
@@ -XXX,XX +XXX,XX @@ F: pc-bios/hppa-firmware.img
27
LoongArch Machines
28
------------------
29
Virt
30
-M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
31
M: Song Gao <gaosong@loongson.cn>
32
S: Maintained
33
F: docs/system/loongarch/virt.rst
34
--
35
2.25.1
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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