| 1 | This bug seemed worth fixing for 8.0 since we need an rc4 anyway: | 1 | v2: added Property array terminator (which caused crashes on |
|---|---|---|---|
| 2 | we were using uninitialized data for the guarded bit when | 2 | various non-x86 host architectures). |
| 3 | combining stage 1 and stage 2 attrs. | ||
| 4 | 3 | ||
| 5 | thanks | 4 | The following changes since commit ae3aa5da96f4ccf0c2a28851449d92db9fcfad71: |
| 6 | -- PMM | ||
| 7 | 5 | ||
| 8 | The following changes since commit 08dede07030973c1053868bc64de7e10bfa02ad6: | 6 | Merge remote-tracking branch 'remotes/berrange/tags/socket-next-pull-request' into staging (2020-05-21 16:47:28 +0100) |
| 9 | |||
| 10 | Merge tag 'pull-ppc-20230409' of https://github.com/legoater/qemu into staging (2023-04-10 11:47:52 +0100) | ||
| 11 | 7 | ||
| 12 | are available in the Git repository at: | 8 | are available in the Git repository at: |
| 13 | 9 | ||
| 14 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230410 | 10 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200521-1 |
| 15 | 11 | ||
| 16 | for you to fetch changes up to 8539dc00552e8ea60420856fc1262c8299bc6308: | 12 | for you to fetch changes up to fafe7229272f39500c14845bc7ea60a8504a5a20: |
| 17 | 13 | ||
| 18 | target/arm: Copy guarded bit in combine_cacheattrs (2023-04-10 14:31:40 +0100) | 14 | linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 (2020-05-21 22:05:27 +0100) |
| 19 | 15 | ||
| 20 | ---------------------------------------------------------------- | 16 | ---------------------------------------------------------------- |
| 21 | target-arm: Fix bug where we weren't initializing | 17 | target-arm queue: |
| 22 | guarded bit state when combining S1/S2 attrs | 18 | * tests/acceptance: Add a test for the canon-a1100 machine |
| 19 | * docs/system: Document some of the Arm development boards | ||
| 20 | * linux-user: make BKPT insn cause SIGTRAP, not be a syscall | ||
| 21 | * target/arm: Remove unused GEN_NEON_INTEGER_OP macro | ||
| 22 | * fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog | ||
| 23 | * hw/arm: Use qemu_log_mask() instead of hw_error() in various places | ||
| 24 | * ARM: PL061: Introduce N_GPIOS | ||
| 25 | * target/arm: Improve clear_vec_high() usage | ||
| 26 | * target/arm: Allow user-mode code to write CPSR.E via MSR | ||
| 27 | * linux-user/arm: Reset CPSR_E when entering a signal handler | ||
| 28 | * linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 | ||
| 23 | 29 | ||
| 24 | ---------------------------------------------------------------- | 30 | ---------------------------------------------------------------- |
| 31 | Amanieu d'Antras (1): | ||
| 32 | linux-user/arm: Reset CPSR_E when entering a signal handler | ||
| 33 | |||
| 34 | Geert Uytterhoeven (1): | ||
| 35 | ARM: PL061: Introduce N_GPIOS | ||
| 36 | |||
| 37 | Guenter Roeck (8): | ||
| 38 | hw: Move i.MX watchdog driver to hw/watchdog | ||
| 39 | hw/watchdog: Implement full i.MX watchdog support | ||
| 40 | hw/arm/fsl-imx25: Wire up watchdog | ||
| 41 | hw/arm/fsl-imx31: Wire up watchdog | ||
| 42 | hw/arm/fsl-imx6: Connect watchdog interrupts | ||
| 43 | hw/arm/fsl-imx6ul: Connect watchdog interrupts | ||
| 44 | hw/arm/fsl-imx7: Instantiate various unimplemented devices | ||
| 45 | hw/arm/fsl-imx7: Connect watchdog interrupts | ||
| 46 | |||
| 47 | Peter Maydell (12): | ||
| 48 | docs/system: Add 'Arm' to the Integrator/CP document title | ||
| 49 | docs/system: Sort Arm board index into alphabetical order | ||
| 50 | docs/system: Document Arm Versatile Express boards | ||
| 51 | docs/system: Document the various MPS2 models | ||
| 52 | docs/system: Document Musca boards | ||
| 53 | linux-user/arm: BKPT should cause SIGTRAP, not be a syscall | ||
| 54 | linux-user/arm: Remove bogus SVC 0xf0002 handling | ||
| 55 | linux-user/arm: Handle invalid arm-specific syscalls correctly | ||
| 56 | linux-user/arm: Fix identification of syscall numbers | ||
| 57 | target/arm: Remove unused GEN_NEON_INTEGER_OP macro | ||
| 58 | target/arm: Allow user-mode code to write CPSR.E via MSR | ||
| 59 | linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32 | ||
| 60 | |||
| 61 | Philippe Mathieu-Daudé (4): | ||
| 62 | hw/arm/integratorcp: Replace hw_error() by qemu_log_mask() | ||
| 63 | hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask() | ||
| 64 | hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask() | ||
| 65 | hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask() | ||
| 66 | |||
| 25 | Richard Henderson (2): | 67 | Richard Henderson (2): |
| 26 | target/arm: PTE bit GP only applies to stage1 | 68 | target/arm: Use tcg_gen_gvec_mov for clear_vec_high |
| 27 | target/arm: Copy guarded bit in combine_cacheattrs | 69 | target/arm: Use clear_vec_high more effectively |
| 28 | 70 | ||
| 29 | target/arm/ptw.c | 11 ++++++----- | 71 | Thomas Huth (1): |
| 30 | 1 file changed, 6 insertions(+), 5 deletions(-) | 72 | tests/acceptance: Add a test for the canon-a1100 machine |
| 73 | |||
| 74 | docs/system/arm/integratorcp.rst | 4 +- | ||
| 75 | docs/system/arm/mps2.rst | 29 +++ | ||
| 76 | docs/system/arm/musca.rst | 31 +++ | ||
| 77 | docs/system/arm/vexpress.rst | 60 ++++++ | ||
| 78 | docs/system/target-arm.rst | 20 +- | ||
| 79 | include/hw/arm/fsl-imx25.h | 5 + | ||
| 80 | include/hw/arm/fsl-imx31.h | 4 + | ||
| 81 | include/hw/arm/fsl-imx6.h | 2 +- | ||
| 82 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
| 83 | include/hw/arm/fsl-imx7.h | 23 ++- | ||
| 84 | include/hw/misc/imx2_wdt.h | 33 ---- | ||
| 85 | include/hw/watchdog/wdt_imx2.h | 90 +++++++++ | ||
| 86 | target/arm/cpu.h | 2 +- | ||
| 87 | hw/arm/fsl-imx25.c | 10 + | ||
| 88 | hw/arm/fsl-imx31.c | 6 + | ||
| 89 | hw/arm/fsl-imx6.c | 9 + | ||
| 90 | hw/arm/fsl-imx6ul.c | 10 + | ||
| 91 | hw/arm/fsl-imx7.c | 35 ++++ | ||
| 92 | hw/arm/integratorcp.c | 23 ++- | ||
| 93 | hw/arm/pxa2xx_gpio.c | 7 +- | ||
| 94 | hw/char/xilinx_uartlite.c | 5 +- | ||
| 95 | hw/display/pxa2xx_lcd.c | 8 +- | ||
| 96 | hw/dma/pxa2xx_dma.c | 14 +- | ||
| 97 | hw/gpio/pl061.c | 12 +- | ||
| 98 | hw/misc/imx2_wdt.c | 90 --------- | ||
| 99 | hw/timer/exynos4210_mct.c | 12 +- | ||
| 100 | hw/watchdog/wdt_imx2.c | 304 +++++++++++++++++++++++++++++ | ||
| 101 | linux-user/arm/cpu_loop.c | 145 ++++++++------ | ||
| 102 | linux-user/arm/signal.c | 15 +- | ||
| 103 | target/arm/translate-a64.c | 63 +++--- | ||
| 104 | target/arm/translate.c | 23 --- | ||
| 105 | MAINTAINERS | 6 + | ||
| 106 | hw/arm/Kconfig | 5 + | ||
| 107 | hw/misc/Makefile.objs | 1 - | ||
| 108 | hw/watchdog/Kconfig | 3 + | ||
| 109 | hw/watchdog/Makefile.objs | 1 + | ||
| 110 | tests/acceptance/machine_arm_canona1100.py | 35 ++++ | ||
| 111 | 37 files changed, 855 insertions(+), 292 deletions(-) | ||
| 112 | create mode 100644 docs/system/arm/mps2.rst | ||
| 113 | create mode 100644 docs/system/arm/musca.rst | ||
| 114 | create mode 100644 docs/system/arm/vexpress.rst | ||
| 115 | delete mode 100644 include/hw/misc/imx2_wdt.h | ||
| 116 | create mode 100644 include/hw/watchdog/wdt_imx2.h | ||
| 117 | delete mode 100644 hw/misc/imx2_wdt.c | ||
| 118 | create mode 100644 hw/watchdog/wdt_imx2.c | ||
| 119 | create mode 100644 tests/acceptance/machine_arm_canona1100.py | ||
| 120 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | Only perform the extract of GP during the stage1 walk. | ||
| 4 | |||
| 5 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 8 | Message-id: 20230407185149.3253946-2-richard.henderson@linaro.org | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | --- | ||
| 11 | target/arm/ptw.c | 10 +++++----- | ||
| 12 | 1 file changed, 5 insertions(+), 5 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/target/arm/ptw.c b/target/arm/ptw.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/arm/ptw.c | ||
| 17 | +++ b/target/arm/ptw.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw, | ||
| 19 | result->f.attrs.secure = false; | ||
| 20 | } | ||
| 21 | |||
| 22 | - /* When in aarch64 mode, and BTI is enabled, remember GP in the TLB. */ | ||
| 23 | - if (aarch64 && cpu_isar_feature(aa64_bti, cpu)) { | ||
| 24 | - result->f.guarded = extract64(attrs, 50, 1); /* GP */ | ||
| 25 | - } | ||
| 26 | - | ||
| 27 | if (regime_is_stage2(mmu_idx)) { | ||
| 28 | result->cacheattrs.is_s2_format = true; | ||
| 29 | result->cacheattrs.attrs = extract32(attrs, 2, 4); | ||
| 30 | @@ -XXX,XX +XXX,XX @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw, | ||
| 31 | assert(attrindx <= 7); | ||
| 32 | result->cacheattrs.is_s2_format = false; | ||
| 33 | result->cacheattrs.attrs = extract64(mair, attrindx * 8, 8); | ||
| 34 | + | ||
| 35 | + /* When in aarch64 mode, and BTI is enabled, remember GP in the TLB. */ | ||
| 36 | + if (aarch64 && cpu_isar_feature(aa64_bti, cpu)) { | ||
| 37 | + result->f.guarded = extract64(attrs, 50, 1); /* GP */ | ||
| 38 | + } | ||
| 39 | } | ||
| 40 | |||
| 41 | /* | ||
| 42 | -- | ||
| 43 | 2.34.1 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | The guarded bit comes from the stage1 walk. | ||
| 4 | |||
| 5 | Fixes: Coverity CID 1507929 | ||
| 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 8 | Message-id: 20230407185149.3253946-3-richard.henderson@linaro.org | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | --- | ||
| 11 | target/arm/ptw.c | 1 + | ||
| 12 | 1 file changed, 1 insertion(+) | ||
| 13 | |||
| 14 | diff --git a/target/arm/ptw.c b/target/arm/ptw.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/arm/ptw.c | ||
| 17 | +++ b/target/arm/ptw.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ static ARMCacheAttrs combine_cacheattrs(uint64_t hcr, | ||
| 19 | |||
| 20 | assert(!s1.is_s2_format); | ||
| 21 | ret.is_s2_format = false; | ||
| 22 | + ret.guarded = s1.guarded; | ||
| 23 | |||
| 24 | if (s1.attrs == 0xf0) { | ||
| 25 | tagged = true; | ||
| 26 | -- | ||
| 27 | 2.34.1 | diff view generated by jsdifflib |