[PULL 0/1] target-arm queue
[PULL v3 00/23] target-arm queue
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The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
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v3: really fix the format string nit (oops)
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Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)
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The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5:
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Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-2
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for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:
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for you to fetch changes up to eec607843ca81eccab238fce86222be9c78b3675:
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target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)
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hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 19:45:02 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* fix part of the "TCG-disabled builds are broken" issue
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* mark MPS2/MPS3 board-internal i2c buses as 'full' so that command
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line user-created devices are not plugged into them
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* Take an exception if PSTATE.IL is set
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* Support an emulated ITS in the virt board
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* Add support for kudo-bmc board
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* Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
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* cadence_uart: Fix clock handling issues that prevented
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u-boot from running
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----------------------------------------------------------------
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----------------------------------------------------------------
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Philippe Mathieu-Daudé (1):
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Bin Meng (6):
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target/arm/gdbstub: Only advertise M-profile features if TCG available
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hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase
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hw/char: cadence_uart: Disable transmit when input clock is disabled
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hw/char: cadence_uart: Move clock/reset check to uart_can_receive()
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hw/char: cadence_uart: Convert to memop_with_attrs() ops
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hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}()
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hw/char: cadence_uart: Log a guest error when device is unclocked or in reset
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target/arm/gdbstub.c | 5 +++--
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Chris Rauer (1):
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1 file changed, 3 insertions(+), 2 deletions(-)
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hw/arm: Add support for kudo-bmc board.
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Marc Zyngier (1):
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hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
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Peter Maydell (5):
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target/arm: Take an exception if PSTATE.IL is set
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qdev: Support marking individual buses as 'full'
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hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn
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hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full'
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hw/arm/mps2.c: Mark internal-only I2C buses as 'full'
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Richard Henderson (1):
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target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn
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Shashi Mallela (9):
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hw/intc: GICv3 ITS initial framework
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hw/intc: GICv3 ITS register definitions added
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hw/intc: GICv3 ITS command queue framework
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hw/intc: GICv3 ITS Command processing
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hw/intc: GICv3 ITS Feature enablement
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hw/intc: GICv3 redistributor ITS processing
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tests/data/acpi/virt: Add IORT files for ITS
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hw/arm/virt: add ITS support in virt GIC
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tests/data/acpi/virt: Update IORT files for ITS
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docs/system/arm/nuvoton.rst | 1 +
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hw/intc/gicv3_internal.h | 188 ++++-
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include/hw/arm/virt.h | 2 +
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include/hw/intc/arm_gicv3_common.h | 13 +
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include/hw/intc/arm_gicv3_its_common.h | 32 +-
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include/hw/qdev-core.h | 24 +
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target/arm/cpu.h | 1 +
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target/arm/kvm_arm.h | 4 +-
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target/arm/syndrome.h | 5 +
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target/arm/translate.h | 2 +
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hw/arm/mps2-tz.c | 92 ++-
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hw/arm/mps2.c | 12 +-
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hw/arm/npcm7xx_boards.c | 34 +
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hw/arm/virt.c | 29 +-
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hw/char/cadence_uart.c | 61 +-
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hw/intc/arm_gicv3.c | 14 +
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hw/intc/arm_gicv3_common.c | 13 +
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hw/intc/arm_gicv3_cpuif.c | 7 +-
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hw/intc/arm_gicv3_dist.c | 5 +-
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hw/intc/arm_gicv3_its.c | 1322 ++++++++++++++++++++++++++++++++
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hw/intc/arm_gicv3_its_common.c | 7 +-
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hw/intc/arm_gicv3_its_kvm.c | 2 +-
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hw/intc/arm_gicv3_redist.c | 153 +++-
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hw/misc/zynq_slcr.c | 31 +-
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softmmu/qdev-monitor.c | 7 +-
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target/arm/helper-a64.c | 1 +
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target/arm/helper.c | 8 +
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target/arm/kvm.c | 7 +-
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target/arm/translate-a64.c | 255 +++---
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target/arm/translate.c | 21 +
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hw/intc/meson.build | 1 +
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tests/data/acpi/virt/IORT | Bin 0 -> 124 bytes
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tests/data/acpi/virt/IORT.memhp | Bin 0 -> 124 bytes
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tests/data/acpi/virt/IORT.numamem | Bin 0 -> 124 bytes
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tests/data/acpi/virt/IORT.pxb | Bin 0 -> 124 bytes
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35 files changed, 2144 insertions(+), 210 deletions(-)
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create mode 100644 hw/intc/arm_gicv3_its.c
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create mode 100644 tests/data/acpi/virt/IORT
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create mode 100644 tests/data/acpi/virt/IORT.memhp
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create mode 100644 tests/data/acpi/virt/IORT.numamem
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create mode 100644 tests/data/acpi/virt/IORT.pxb
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diff view generated by jsdifflib
[PULL 1/1] target/arm/gdbstub: Only advertise M-profile features if TCG available
Deleted patch
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From: Philippe Mathieu-Daudé <philmd@linaro.org>
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Cortex-M profile is only emulable from TCG accelerator. Restrict
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the GDBstub features to its availability in order to avoid a link
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error when TCG is not enabled:
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Undefined symbols for architecture arm64:
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"_arm_v7m_get_sp_ptr", referenced from:
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_m_sysreg_get in target_arm_gdbstub.c.o
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"_arm_v7m_mrs_control", referenced from:
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_arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o
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ld: symbol(s) not found for architecture arm64
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clang: error: linker command failed with exit code 1 (use -v to see invocation)
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Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext")
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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Message-id: 20230322142902.69511-3-philmd@linaro.org
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[PMM: add #include since I cherry-picked this patch from the series]
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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target/arm/gdbstub.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
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index XXXXXXX..XXXXXXX 100644
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--- a/target/arm/gdbstub.c
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+++ b/target/arm/gdbstub.c
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@@ -XXX,XX +XXX,XX @@
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#include "cpu.h"
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#include "exec/gdbstub.h"
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#include "gdbstub/helpers.h"
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+#include "sysemu/tcg.h"
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#include "internals.h"
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#include "cpregs.h"
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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2, "arm-vfp-sysregs.xml", 0);
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}
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}
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- if (cpu_isar_feature(aa32_mve, cpu)) {
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+ if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {
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gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,
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1, "arm-m-profile-mve.xml", 0);
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}
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
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"system-registers.xml", 0);
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- if (arm_feature(env, ARM_FEATURE_M)) {
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+ if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
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gdb_register_coprocessor(cs,
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arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
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arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs),
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--
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2.34.1
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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