[PULL 0/1] target-arm queue
[PULL v2 00/37] target-arm queue
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The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a:
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v2: dropped the npcm7xx ethernet device, whose test case
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fails weirdly on the 'build-disabled' gitlab CI job:
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https://gitlab.com/qemu-project/qemu/-/jobs/1034174731#L12
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Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000)
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The following changes since commit 8ba4bca570ace1e60614a0808631a517cf5df67a:
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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2021-02-15 17:13:57 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210217
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for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a:
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for you to fetch changes up to 59c7a187dd8bd8ef675768dd8af9de11528ea7e2:
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target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100)
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MAINTAINERS: add myself maintainer for the clock framework (2021-02-16 14:16:17 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* fix part of the "TCG-disabled builds are broken" issue
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* Support ARMv8.5-MemTag for linux-user
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* ncpm7xx: Support SMBus
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* MAINTAINERS: add section for Clock framework
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----------------------------------------------------------------
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----------------------------------------------------------------
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Philippe Mathieu-Daudé (1):
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Hao Wu (5):
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target/arm/gdbstub: Only advertise M-profile features if TCG available
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hw/i2c: Implement NPCM7XX SMBus Module Single Mode
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hw/arm: Add I2C sensors for NPCM750 eval board
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hw/arm: Add I2C sensors and EEPROM for GSJ machine
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hw/i2c: Add a QTest for NPCM7XX SMBus Device
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hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
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target/arm/gdbstub.c | 5 +++--
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Luc Michel (1):
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1 file changed, 3 insertions(+), 2 deletions(-)
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MAINTAINERS: add myself maintainer for the clock framework
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Richard Henderson (31):
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tcg: Introduce target-specific page data for user-only
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linux-user: Introduce PAGE_ANON
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exec: Use uintptr_t for guest_base
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exec: Use uintptr_t in cpu_ldst.h
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exec: Improve types for guest_addr_valid
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linux-user: Check for overflow in access_ok
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linux-user: Tidy VERIFY_READ/VERIFY_WRITE
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bsd-user: Tidy VERIFY_READ/VERIFY_WRITE
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linux-user: Do not use guest_addr_valid for h2g_valid
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linux-user: Fix guest_addr_valid vs reserved_va
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exec: Introduce cpu_untagged_addr
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exec: Use cpu_untagged_addr in g2h; split out g2h_untagged
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linux-user: Explicitly untag memory management syscalls
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linux-user: Use guest_range_valid in access_ok
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exec: Rename guest_{addr,range}_valid to *_untagged
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linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged
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linux-user: Move lock_user et al out of line
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linux-user: Fix types in uaccess.c
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linux-user: Handle tags in lock_user/unlock_user
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linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
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target/arm: Improve gen_top_byte_ignore
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target/arm: Use the proper TBI settings for linux-user
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linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
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linux-user/aarch64: Implement PROT_MTE
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target/arm: Split out syndrome.h from internals.h
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linux-user/aarch64: Pass syndrome to EXC_*_ABORT
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linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
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linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
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target/arm: Add allocation tag storage for user mode
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target/arm: Enable MTE for user-only
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tests/tcg/aarch64: Add mte smoke tests
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docs/system/arm/nuvoton.rst | 2 +-
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bsd-user/qemu.h | 17 +-
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include/exec/cpu-all.h | 47 +-
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include/exec/cpu_ldst.h | 39 +-
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include/exec/exec-all.h | 2 +-
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include/hw/arm/npcm7xx.h | 2 +
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include/hw/i2c/npcm7xx_smbus.h | 113 ++++
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linux-user/aarch64/target_signal.h | 3 +
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linux-user/aarch64/target_syscall.h | 13 +
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linux-user/qemu.h | 76 +--
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linux-user/syscall_defs.h | 1 +
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target/arm/cpu-param.h | 3 +
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target/arm/cpu.h | 32 +
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target/arm/internals.h | 249 +-------
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target/arm/syndrome.h | 273 +++++++++
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tests/tcg/aarch64/mte.h | 60 ++
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accel/tcg/translate-all.c | 32 +-
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accel/tcg/user-exec.c | 51 +-
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bsd-user/elfload.c | 2 +-
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bsd-user/main.c | 8 +-
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bsd-user/mmap.c | 23 +-
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hw/arm/npcm7xx.c | 68 ++-
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hw/arm/npcm7xx_boards.c | 46 ++
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hw/i2c/npcm7xx_smbus.c | 1099 +++++++++++++++++++++++++++++++++++
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linux-user/aarch64/cpu_loop.c | 38 +-
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linux-user/elfload.c | 18 +-
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linux-user/flatload.c | 2 +-
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linux-user/hppa/cpu_loop.c | 39 +-
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linux-user/i386/cpu_loop.c | 6 +-
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linux-user/i386/signal.c | 5 +-
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linux-user/main.c | 4 +-
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linux-user/mmap.c | 88 +--
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linux-user/ppc/signal.c | 4 +-
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linux-user/syscall.c | 165 ++++--
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linux-user/uaccess.c | 82 ++-
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target/arm/cpu.c | 25 +-
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target/arm/helper-a64.c | 4 +-
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target/arm/mte_helper.c | 39 +-
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target/arm/tlb_helper.c | 15 +-
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target/arm/translate-a64.c | 25 +-
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target/hppa/op_helper.c | 2 +-
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target/i386/tcg/mem_helper.c | 2 +-
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target/s390x/mem_helper.c | 4 +-
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tests/qtest/npcm7xx_smbus-test.c | 495 ++++++++++++++++
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tests/tcg/aarch64/mte-1.c | 28 +
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tests/tcg/aarch64/mte-2.c | 45 ++
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tests/tcg/aarch64/mte-3.c | 51 ++
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tests/tcg/aarch64/mte-4.c | 45 ++
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tests/tcg/aarch64/pauth-2.c | 1 -
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MAINTAINERS | 11 +
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hw/arm/Kconfig | 1 +
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hw/i2c/meson.build | 1 +
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hw/i2c/trace-events | 12 +
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tests/qtest/meson.build | 1 +
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tests/tcg/aarch64/Makefile.target | 6 +
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tests/tcg/configure.sh | 4 +
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56 files changed, 2976 insertions(+), 553 deletions(-)
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create mode 100644 include/hw/i2c/npcm7xx_smbus.h
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create mode 100644 target/arm/syndrome.h
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create mode 100644 tests/tcg/aarch64/mte.h
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create mode 100644 hw/i2c/npcm7xx_smbus.c
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create mode 100644 tests/qtest/npcm7xx_smbus-test.c
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create mode 100644 tests/tcg/aarch64/mte-1.c
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create mode 100644 tests/tcg/aarch64/mte-2.c
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create mode 100644 tests/tcg/aarch64/mte-3.c
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create mode 100644 tests/tcg/aarch64/mte-4.c
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diff view generated by jsdifflib
[PULL 1/1] target/arm/gdbstub: Only advertise M-profile features if TCG available
Deleted patch
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From: Philippe Mathieu-Daudé <philmd@linaro.org>
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Cortex-M profile is only emulable from TCG accelerator. Restrict
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the GDBstub features to its availability in order to avoid a link
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error when TCG is not enabled:
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Undefined symbols for architecture arm64:
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"_arm_v7m_get_sp_ptr", referenced from:
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_m_sysreg_get in target_arm_gdbstub.c.o
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"_arm_v7m_mrs_control", referenced from:
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_arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o
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ld: symbol(s) not found for architecture arm64
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clang: error: linker command failed with exit code 1 (use -v to see invocation)
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Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext")
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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
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Message-id: 20230322142902.69511-3-philmd@linaro.org
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[PMM: add #include since I cherry-picked this patch from the series]
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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target/arm/gdbstub.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
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index XXXXXXX..XXXXXXX 100644
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--- a/target/arm/gdbstub.c
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+++ b/target/arm/gdbstub.c
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@@ -XXX,XX +XXX,XX @@
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#include "cpu.h"
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#include "exec/gdbstub.h"
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#include "gdbstub/helpers.h"
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+#include "sysemu/tcg.h"
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#include "internals.h"
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#include "cpregs.h"
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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2, "arm-vfp-sysregs.xml", 0);
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}
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}
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- if (cpu_isar_feature(aa32_mve, cpu)) {
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+ if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) {
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gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg,
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1, "arm-m-profile-mve.xml", 0);
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}
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@@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
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"system-registers.xml", 0);
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- if (arm_feature(env, ARM_FEATURE_M)) {
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+ if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) {
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gdb_register_coprocessor(cs,
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arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg,
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arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs),
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--
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2.34.1
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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