On 3/7/23 15:34, Richard Henderson wrote:
> All remaining uses are strictly read-only.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: Greg Kurz <groug@kaod.org>
> Cc: qemu-ppc@nongnu.org
> ---
> target/ppc/translate/vsx-impl.c.inc | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
> index 9916784e64..0f5b0056f1 100644
> --- a/target/ppc/translate/vsx-impl.c.inc
> +++ b/target/ppc/translate/vsx-impl.c.inc
> @@ -154,7 +154,7 @@ static void gen_lxvdsx(DisasContext *ctx)
> static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl,
> TCGv_i64 inh, TCGv_i64 inl)
> {
> - TCGv_i64 mask = tcg_const_i64(0x00FF00FF00FF00FF);
> + TCGv_i64 mask = tcg_constant_i64(0x00FF00FF00FF00FF);
> TCGv_i64 t0 = tcg_temp_new_i64();
> TCGv_i64 t1 = tcg_temp_new_i64();
>
> @@ -825,7 +825,7 @@ static bool trans_XSCVQPDP(DisasContext *ctx, arg_X_tb_rc *a)
> REQUIRE_INSNS_FLAGS2(ctx, ISA300);
> REQUIRE_VSX(ctx);
>
> - ro = tcg_const_i32(a->rc);
> + ro = tcg_constant_i32(a->rc);
>
> xt = gen_avr_ptr(a->rt);
> xb = gen_avr_ptr(a->rb);
> @@ -860,7 +860,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> gen_helper_##name(cpu_env, opc); \
> }
>
> @@ -900,7 +900,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> xa = gen_vsr_ptr(xA(ctx->opcode)); \
> xb = gen_vsr_ptr(xB(ctx->opcode)); \
> gen_helper_##name(cpu_env, opc, xa, xb); \
> @@ -915,7 +915,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> xb = gen_vsr_ptr(xB(ctx->opcode)); \
> gen_helper_##name(cpu_env, opc, xb); \
> }
> @@ -929,7 +929,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \
> xa = gen_vsr_ptr(rA(ctx->opcode) + 32); \
> xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
> @@ -945,7 +945,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \
> xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
> gen_helper_##name(cpu_env, opc, xt, xb); \
> @@ -960,7 +960,7 @@ static void gen_##name(DisasContext *ctx) \
> gen_exception(ctx, POWERPC_EXCP_VSXU); \
> return; \
> } \
> - opc = tcg_const_i32(ctx->opcode); \
> + opc = tcg_constant_i32(ctx->opcode); \
> xa = gen_vsr_ptr(rA(ctx->opcode) + 32); \
> xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
> gen_helper_##name(cpu_env, opc, xa, xb); \
> @@ -1994,8 +1994,8 @@ static void gen_xsxsigdp(DisasContext *ctx)
> exp = tcg_temp_new_i64();
> t0 = tcg_temp_new_i64();
> t1 = tcg_temp_new_i64();
> - zr = tcg_const_i64(0);
> - nan = tcg_const_i64(2047);
> + zr = tcg_constant_i64(0);
> + nan = tcg_constant_i64(2047);
>
> get_cpu_vsr(t1, xB(ctx->opcode), true);
> tcg_gen_extract_i64(exp, t1, 52, 11);
> @@ -2026,8 +2026,8 @@ static void gen_xsxsigqp(DisasContext *ctx)
> get_cpu_vsr(xbl, rB(ctx->opcode) + 32, false);
> exp = tcg_temp_new_i64();
> t0 = tcg_temp_new_i64();
> - zr = tcg_const_i64(0);
> - nan = tcg_const_i64(32767);
> + zr = tcg_constant_i64(0);
> + nan = tcg_constant_i64(32767);
>
> tcg_gen_extract_i64(exp, xbh, 48, 15);
> tcg_gen_movi_i64(t0, 0x0001000000000000);
> @@ -2193,8 +2193,8 @@ static void gen_xvxsigdp(DisasContext *ctx)
> get_cpu_vsr(xbl, xB(ctx->opcode), false);
> exp = tcg_temp_new_i64();
> t0 = tcg_temp_new_i64();
> - zr = tcg_const_i64(0);
> - nan = tcg_const_i64(2047);
> + zr = tcg_constant_i64(0);
> + nan = tcg_constant_i64(2047);
>
> tcg_gen_extract_i64(exp, xbh, 52, 11);
> tcg_gen_movi_i64(t0, 0x0010000000000000);