Series comparison

-[PULL 0/5] loongarch-to-apply queue
+[PULL v2 0/6] loongarch-to-apply queue
-The following changes since commit 262312d7ba6e2966acedb4f9c134fd19176b4083:
+The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:
-  Merge tag 'pull-testing-next-010323-1' of https://gitlab.com/stsquad/qemu into staging (2023-03-02 13:02:53 +0000)
+  Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)
 are available in the Git repository at:
-  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230303
+  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227
-for you to fetch changes up to 0d588c4f999699a430b32c563fe9ccc1710b8fd7:
+for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:
-  hw/loongarch/virt: add system_powerdown hmp command support (2023-03-03 09:37:30 +0800)
+  target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)
 ----------------------------------------------------------------
-pull-loongarch-20230303
+pull-loongarch-20241227
 v1 ... v2
 . Modify patch auther inconsistent with SOB
 ----------------------------------------------------------------
-Bibo Mao (1):
+Bibo Mao (5):
-      hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE
+      target/loongarch: Use actual operand size with vbsrl check
       hw/loongarch/virt: Create fdt table on machine creation done notification
       hw/loongarch/virt: Improve fdt table creation for CPU object
       target/loongarch: Use auto method with LSX feature
       target/loongarch: Use auto method with LASX feature
-Song Gao (4):
+Guo Hongyu (1):
-      loongarch: Add smbios command line option.
+      target/loongarch: Fix vldi inst
       docs/system/loongarch: update loongson3.rst and rename it to virt.rst
       target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
       hw/loongarch/virt: add system_powerdown hmp command support
- docs/system/loongarch/{loongson3.rst => virt.rst} | 97 +++++++++--------------
+ hw/loongarch/virt.c                             | 142 ++++++++++++++----------
- hw/loongarch/acpi-build.c                         |  3 +-
+ target/loongarch/cpu.c                          |  86 ++++++++------
- hw/loongarch/virt.c                               | 20 ++++-
+ target/loongarch/cpu.h                          |   4 +
- include/hw/loongarch/virt.h                       |  1 +
+ target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
- include/hw/pci-host/ls7a.h                        | 17 ++--
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
- qemu-options.hx                                   |  2 +-
+files changed, 249 insertions(+), 94 deletions(-)
  target/loongarch/cpu.c                            |  2 +
  target/loongarch/cpu.h                            |  1 +
 files changed, 70 insertions(+), 73 deletions(-)
  rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)

-New patch
+[PULL v2 1/6] target/loongarch: Fix vldi inst
+From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
+Refer to the link below for a description of the vldi instructions:
+https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
+Fixed errors in vldi instruction implementation.
+Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
+Tested-by: Xianglai Li <lixianglai@loongson.cn>
+Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
+---
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
+file changed, 1 insertion(+), 1 deletion(-)
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+index XXXXXXX..XXXXXXX 100644
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
+         break;
+     case 1:
+         /* data: {2{16'0, imm[7:0], 8'0}} */
+-        data = (t << 24) | (t << 8);
++        data = (t << 40) | (t << 8);
+         break;
+     case 2:
+         /* data: {2{8'0, imm[7:0], 16'0}} */
+--
+.43.5

-[PULL 2/5] loongarch: Add smbios command line option.
+[PULL v2 2/6] target/loongarch: Use actual operand size with vbsrl check
-LoongArch has enabled CONFIG_SMBIOS, but didn't enable CLI '-smbios'.
+Hardcoded 32 bytes is used for vbsrl emulation check, there is
 problem when options lsx=on,lasx=off is used for vbsrl.v instruction
 in TCG mode. It injects LASX exception rather LSX exception.
-Fixes: 3efa6fa1e629 ("hw/loongarch: Add smbios support")
+Here actual operand size is used.
-Acked-by: Michael S. Tsirkin <mst@redhat.com>
-Reviewed-by: Markus Armbruster <armbru@redhat.com>
+Cc: qemu-stable@nongnu.org
 Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
 Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 Message-Id: <20230227035905.1290953-2-gaosong@loongson.cn>
 ---
- qemu-options.hx | 2 +-
+ target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/qemu-options.hx b/qemu-options.hx
+diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
 index XXXXXXX..XXXXXXX 100644
---- a/qemu-options.hx
+--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-+++ b/qemu-options.hx
++++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
-@@ -XXX,XX +XXX,XX @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
+@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
-     "                specify SMBIOS type 17 fields\n"
+ {
-     "-smbios type=41[,designation=str][,kind=str][,instance=%d][,pcidev=str]\n"
+     int i, ofs;
-     "                specify SMBIOS type 41 fields\n",
--    QEMU_ARCH_I386 | QEMU_ARCH_ARM)
+-    if (!check_vec(ctx, 32)) {
-+    QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH)
++    if (!check_vec(ctx, oprsz)) {
- SRST
+         return true;
- ``-smbios file=binary``
+     }
-     Load SMBIOS entry from binary file.
 --
-.31.1
+.43.5

-[PULL 1/5] hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE
+[PULL v2 3/6] hw/loongarch/virt: Create fdt table on machine creation done notification
-From: Bibo Mao <maobibo@loongson.cn>
+The same with ACPI table, fdt table is created on machine done
+notification. Some objects like CPU objects can be created with cold-plug
-In theory gsi base can start from 0 on loongarch virt machine,
+method with command such as -smp x, -device la464-loongarch-cpu, so all
-however gsi base is hard-coded in linux kernel loongarch system,
+objects finish to create when machine is done.
 else system fails to boot.
 This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE,
 keeps value unchanged. GSI base is common concept in acpi spec
 and easy to understand.
 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20221228030719.991878-1-maobibo@loongson.cn>
 Signed-off-by: Song Gao <gaosong@loongson.cn>
 ---
- hw/loongarch/acpi-build.c  |  2 +-
+ hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
- hw/loongarch/virt.c        |  8 ++++----
+file changed, 57 insertions(+), 46 deletions(-)
  include/hw/pci-host/ls7a.h | 17 +++++++++--------
 files changed, 14 insertions(+), 13 deletions(-)
-diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
-+++ b/hw/loongarch/acpi-build.c
-@@ -XXX,XX +XXX,XX @@ static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
-         .pio.size    = VIRT_PCI_IO_SIZE,
-         .ecam.base   = VIRT_PCI_CFG_BASE,
-         .ecam.size   = VIRT_PCI_CFG_SIZE,
--        .irq         = PCH_PIC_IRQ_OFFSET + VIRT_DEVICE_IRQS,
-+        .irq         = VIRT_GSI_BASE + VIRT_DEVICE_IRQS,
-         .bus         = lams->pci_bus,
-     };
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState
+@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
-     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR);
+     }
+ }
-     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
--                       qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - PCH_PIC_IRQ_OFFSET));
++static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
-+                       qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE));
++{
-     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
++    MachineState *machine = MACHINE(lvms);
-     return dev;
++    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
- }
++    int i;
 +
 +    create_fdt(lvms);
 +    fdt_add_cpu_nodes(lvms);
 +    fdt_add_memory_nodes(machine);
 +    fdt_add_fw_cfg_node(lvms);
 +    fdt_add_flash_node(lvms);
 +
 +    /* Add cpu interrupt-controller */
 +    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
 +    /* Add Extend I/O Interrupt Controller node */
 +    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
 +    /* Add PCH PIC node */
 +    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
 +    /* Add PCH MSI node */
 +    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
 +    /* Add pcie node */
 +    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
 +
 +    /*
 +     * Create uart fdt node in reverse order so that they appear
 +     * in the finished device tree lowest address first
 +     */
 +    for (i = VIRT_UART_COUNT; i-- > 0;) {
 +        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
 +        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
 +        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
 +    }
 +
 +    fdt_add_rtc_node(lvms, &pch_pic_phandle);
 +    fdt_add_ged_reset(lvms);
 +    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 +                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 +                                   VIRT_PLATFORM_BUS_SIZE,
 +                                   VIRT_PLATFORM_BUS_IRQ);
 +
 +    /*
 +     * Since lowmem region starts from 0 and Linux kernel legacy start address
 +     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 +     * access. FDT size limit with 1 MiB.
 +     * Put the FDT into the memory map as a ROM image: this will ensure
 +     * the FDT is copied again upon reset, even if addr points into RAM.
 +     */
 +    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 +    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 +                          &address_space_memory);
 +    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 +            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 +}
 +
  static void virt_done(Notifier *notifier, void *data)
  {
      LoongArchVirtMachineState *lvms = container_of(notifier,
                                        LoongArchVirtMachineState, machine_done);
      virt_build_smbios(lvms);
      loongarch_acpi_setup(lvms);
 +    virt_fdt_setup(lvms);
  }
  static void virt_powerdown_req(Notifier *notifier, void *opaque)
 @@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
+ }
-     sysbus = SYS_BUS_DEVICE(dev);
-     for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) {
+ static void virt_devices_init(DeviceState *pch_pic,
--        irq = VIRT_PLATFORM_BUS_IRQ - PCH_PIC_IRQ_OFFSET + i;
+-                                   LoongArchVirtMachineState *lvms,
-+        irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i;
+-                                   uint32_t *pch_pic_phandle,
-         sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq));
+-                                   uint32_t *pch_msi_phandle)
-     }
++                                   LoongArchVirtMachineState *lvms)
+ {
-@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
+     MachineClass *mc = MACHINE_GET_CLASS(lvms);
+     DeviceState *gpex_dev;
-     serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
+@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
-                    qdev_get_gpio_in(pch_pic,
+         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
--                                    VIRT_UART_IRQ - PCH_PIC_IRQ_OFFSET),
+     }
-+                                    VIRT_UART_IRQ - VIRT_GSI_BASE),
-, serial_hd(0), DEVICE_LITTLE_ENDIAN);
+-    /* Add pcie node */
-     fdt_add_uart_node(lams);
+-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
+-
-@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
+     /*
-     create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4);
+      * Create uart fdt node in reverse order so that they appear
       * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
          serial_mm_init(get_system_memory(), base, 0,
                         qdev_get_gpio_in(pch_pic, irq),
 , serial_hd(i), DEVICE_LITTLE_ENDIAN);
 -        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
      }
      /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
      sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                           qdev_get_gpio_in(pch_pic,
--                         VIRT_RTC_IRQ - PCH_PIC_IRQ_OFFSET));
+                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-+                         VIRT_RTC_IRQ - VIRT_GSI_BASE));
+-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-     fdt_add_rtc_node(lams);
+-    fdt_add_ged_reset(lvms);
-     pm_mem = g_new(MemoryRegion, 1);
+     /* acpi ged */
-diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
+     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
-index XXXXXXX..XXXXXXX 100644
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
---- a/include/hw/pci-host/ls7a.h
+     CPULoongArchState *env;
-+++ b/include/hw/pci-host/ls7a.h
+     CPUState *cpu_state;
-@@ -XXX,XX +XXX,XX @@
+     int cpu, pin, i, start, num;
- #define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
+-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
- /*
+     /*
-- * According to the kernel pch irq start from 64 offset
+      * Extended IRQ model.
-- * 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-- * used for pci device.
+     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
-+ * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
+                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
-+ * 0  - 15  GSI for ISA devices even if there is no ISA devices
-+ * 16 - 63  GSI for CPU devices such as timers/perf monitor etc
+-    /* Add cpu interrupt-controller */
-+ * 64 -     GSI for external devices
+-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-  */
+-
- #define VIRT_PCH_PIC_IRQ_NUM     32
+     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
--#define PCH_PIC_IRQ_OFFSET       64
+         cpu_state = qemu_get_cpu(cpu);
-+#define VIRT_GSI_BASE            64
+         cpudev = DEVICE(cpu_state);
- #define VIRT_DEVICE_IRQS         16
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
--#define VIRT_UART_IRQ            (PCH_PIC_IRQ_OFFSET + 2)
+         }
-+#define VIRT_UART_IRQ            (VIRT_GSI_BASE + 2)
+     }
- #define VIRT_UART_BASE           0x1fe001e0
- #define VIRT_UART_SIZE           0X100
+-    /* Add Extend I/O Interrupt Controller node */
--#define VIRT_RTC_IRQ             (PCH_PIC_IRQ_OFFSET + 3)
+-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-+#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 3)
+-
- #define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
+     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
- #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
+     num = VIRT_PCH_PIC_IRQ_NUM;
- #define VIRT_RTC_LEN             0x100
+     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
--#define VIRT_SCI_IRQ             (PCH_PIC_IRQ_OFFSET + 4)
+@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
-+#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
+         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
+     }
- #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
- #define VIRT_PLATFORM_BUS_SIZE          0x2000000
+-    /* Add PCH PIC node */
- #define VIRT_PLATFORM_BUS_NUM_IRQS      2
+-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
--#define VIRT_PLATFORM_BUS_IRQ           69
+-
-+#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 5)
+     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
- #endif
+     start   =  num;
      num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                                qdev_get_gpio_in(extioi, i + start));
      }
 -    /* Add PCH MSI node */
 -    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
 -
 -    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
 +    virt_devices_init(pch_pic, lvms);
  }
  static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
      }
 -    create_fdt(lvms);
 -
      /* Create IOCSR space */
      memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                            machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
          lacpu = LOONGARCH_CPU(cpu);
          lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
      }
 -    fdt_add_cpu_nodes(lvms);
 -    fdt_add_memory_nodes(machine);
      fw_cfg_add_memory(machine);
      /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                          memmap_table,
                          sizeof(struct memmap_entry) * (memmap_entries));
      }
 -    fdt_add_fw_cfg_node(lvms);
 -    fdt_add_flash_node(lvms);
      /* Initialize the IO interrupt subsystem */
      virt_irq_init(lvms);
 -    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
 -                                   VIRT_PLATFORM_BUS_BASEADDRESS,
 -                                   VIRT_PLATFORM_BUS_SIZE,
 -                                   VIRT_PLATFORM_BUS_IRQ);
      lvms->machine_done.notify = virt_done;
      qemu_add_machine_init_done_notifier(&lvms->machine_done);
       /* connect powerdown request */
      lvms->powerdown_notifier.notify = virt_powerdown_req;
      qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 -    /*
 -     * Since lowmem region starts from 0 and Linux kernel legacy start address
 -     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
 -     * access. FDT size limit with 1 MiB.
 -     * Put the FDT into the memory map as a ROM image: this will ensure
 -     * the FDT is copied again upon reset, even if addr points into RAM.
 -     */
 -    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
 -    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
 -                          &address_space_memory);
 -    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
 -            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
 -
      lvms->bootinfo.ram_size = ram_size;
      loongarch_load_kernel(machine, &lvms->bootinfo);
  }
 --
-.31.1
+.43.5

-[PULL 5/5] hw/loongarch/virt: add system_powerdown hmp command support
+[PULL v2 4/6] hw/loongarch/virt: Improve fdt table creation for CPU object
-For loongarch virt machine, add powerdown notification callback
+For CPU object, possible_cpu_arch_ids() function is used rather than
-and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add
+smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
-acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this
+is not accurate for all possible CPU objects, possible_cpu_arch_ids()
-patch.
+is used here.
-Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20230303010548.295580-1-gaosong@loongson.cn>
 ---
- hw/loongarch/acpi-build.c   |  1 +
+ hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
- hw/loongarch/virt.c         | 12 ++++++++++++
+file changed, 25 insertions(+), 14 deletions(-)
  include/hw/loongarch/virt.h |  1 +
 files changed, 14 insertions(+)
-diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
-index XXXXXXX..XXXXXXX 100644
---- a/hw/loongarch/acpi-build.c
-+++ b/hw/loongarch/acpi-build.c
-@@ -XXX,XX +XXX,XX @@ build_la_ged_aml(Aml *dsdt, MachineState *machine)
-                                  AML_SYSTEM_MEMORY,
-                                  VIRT_GED_MEM_ADDR);
-     }
-+    acpi_dsdt_add_power_button(dsdt);
- }
- static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
 index XXXXXXX..XXXXXXX 100644
 --- a/hw/loongarch/virt.c
 +++ b/hw/loongarch/virt.c
-@@ -XXX,XX +XXX,XX @@ static void virt_machine_done(Notifier *notifier, void *data)
+@@ -XXX,XX +XXX,XX @@ static void create_fdt(LoongArchVirtMachineState *lvms)
-     loongarch_acpi_setup(lams);
+ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
  {
      int num;
 -    const MachineState *ms = MACHINE(lvms);
 -    int smp_cpus = ms->smp.cpus;
 +    MachineState *ms = MACHINE(lvms);
 +    MachineClass *mc = MACHINE_GET_CLASS(ms);
 +    const CPUArchIdList *possible_cpus;
 +    LoongArchCPU *cpu;
 +    CPUState *cs;
 +    char *nodename, *map_path;
      qemu_fdt_add_subnode(ms->fdt, "/cpus");
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
      qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
      /* cpu nodes */
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
 -        LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
 -        CPUState *cs = CPU(cpu);
 +    possible_cpus = mc->possible_cpu_arch_ids(ms);
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 +
 +        nodename = g_strdup_printf("/cpus/cpu@%d", num);
 +        cpu = LOONGARCH_CPU(cs);
          qemu_fdt_add_subnode(ms->fdt, nodename);
          qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
          qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
                                  cpu->dtb_compatible);
 -        if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) {
 +        if (possible_cpus->cpus[num].props.has_node_id) {
              qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id",
 -                ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
 +                possible_cpus->cpus[num].props.node_id);
          }
          qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
          qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
      /*cpu map */
      qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
 +    for (num = 0; num < possible_cpus->len; num++) {
 +        cs = possible_cpus->cpus[num].cpu;
 +        if (cs == NULL) {
 +            continue;
 +        }
 -    for (num = smp_cpus - 1; num >= 0; num--) {
 -        char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
 -        char *map_path;
 -
 +        nodename = g_strdup_printf("/cpus/cpu@%d", num);
          if (ms->smp.threads > 1) {
              map_path = g_strdup_printf(
                  "/cpus/cpu-map/socket%d/core%d/thread%d",
@@ -XXX,XX +XXX,XX @@ static void fdt_add_cpu_nodes(const LoongArchVirtMachineState *lvms)
                  num % ms->smp.cores);
          }
          qemu_fdt_add_path(ms->fdt, map_path);
 -        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
 +        qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", nodename);
          g_free(map_path);
 -        g_free(cpu_path);
 +        g_free(nodename);
      }
  }
-+static void virt_powerdown_req(Notifier *notifier, void *opaque)
-+{
-+    LoongArchMachineState *s = container_of(notifier,
-+                                   LoongArchMachineState, powerdown_notifier);
-+
-+    acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
-+}
-+
- struct memmap_entry {
-     uint64_t address;
-     uint64_t length;
-@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
-                                    VIRT_PLATFORM_BUS_IRQ);
-     lams->machine_done.notify = virt_machine_done;
-     qemu_add_machine_init_done_notifier(&lams->machine_done);
-+     /* connect powerdown request */
-+    lams->powerdown_notifier.notify = virt_powerdown_req;
-+    qemu_register_powerdown_notifier(&lams->powerdown_notifier);
-+
-     fdt_add_pcie_node(lams);
-     /*
-      * Since lowmem region starts from 0 and Linux kernel legacy start address
-diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
-index XXXXXXX..XXXXXXX 100644
---- a/include/hw/loongarch/virt.h
-+++ b/include/hw/loongarch/virt.h
-@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
-     /* State for other subsystems/APIs: */
-     FWCfgState  *fw_cfg;
-     Notifier     machine_done;
-+    Notifier     powerdown_notifier;
-     OnOffAuto    acpi;
-     char         *oem_id;
-     char         *oem_table_id;
 --
-.31.1
+.43.5

-[PULL 3/5] docs/system/loongarch: update loongson3.rst and rename it to virt.rst
+[PULL v2 5/6] target/loongarch: Use auto method with LSX feature
-Since the EDK2 had already support LoongArch, update build bios,
+Like LBT feature, add type OnOffAuto for LSX feature setting. Also
-and update cpu type, cross-tools.
+add LSX feature detection with new VM ioctl command, fallback to old
 method if it is not supported.
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20230227035905.1290953-1-gaosong@loongson.cn>
 ---
- .../loongarch/{loongson3.rst => virt.rst}     | 97 ++++++++-----------
+ target/loongarch/cpu.c     | 38 +++++++++++++++------------
-file changed, 38 insertions(+), 59 deletions(-)
+ target/loongarch/cpu.h     |  2 ++
- rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)
+ target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 files changed, 77 insertions(+), 17 deletions(-)
-diff --git a/docs/system/loongarch/loongson3.rst b/docs/system/loongarch/virt.rst
+diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 similarity index 51%
 rename from docs/system/loongarch/loongson3.rst
 rename to docs/system/loongarch/virt.rst
 index XXXXXXX..XXXXXXX 100644
---- a/docs/system/loongarch/loongson3.rst
+--- a/target/loongarch/cpu.c
-+++ b/docs/system/loongarch/virt.rst
++++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ The ``virt`` machine supports:
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
- - Fw_cfg device
+ {
- - PCI/PCIe devices
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
- - Memory device
+     CPULoongArchState *env = &cpu->env;
--- CPU device. Type: la464-loongarch-cpu.
++    uint32_t data = 0;
-+- CPU device. Type: la464.
+     int i;
- CPU and machine Type
+     for (i = 0; i < 21; i++) {
- --------------------
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
+     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
- The ``qemu-system-loongarch64`` provides emulation for virt
+     env->cpucfg[0] = 0x14c010;  /* PRID */
- machine. You can specify the machine type ``virt`` and
--cpu type ``la464-loongarch-cpu``.
+-    uint32_t data = 0;
-+cpu type ``la464``.
+     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
+     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
- Boot options
+     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
- ------------
+@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
-@@ -XXX,XX +XXX,XX @@ We can boot the LoongArch virt machine by specifying the uefi bios,
+ {
- initrd, and linux kernel. And those source codes and binary files
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
- can be accessed by following steps.
+     CPULoongArchState *env = &cpu->env;
 -(1) booting command:
 +(1) Build qemu-system-loongarch64:
  .. code-block:: bash
 -  $ qemu-system-loongarch64 -machine virt -m 4G -cpu la464-loongarch-cpu \
 -      -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd initrd.img \
 -      -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
 -      --nographic
 -
--Note: The running speed may be a little slow, as the performance of our
++    uint32_t data = 0;
--qemu and uefi bios is not perfect, and it is being fixed.
+     int i;
      for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
      cpu->dtb_compatible = "loongarch,Loongson-1C103";
      env->cpucfg[0] = 0x148042;  /* PRID */
 -    uint32_t data = 0;
      data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
      data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
      data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
  static bool loongarch_get_lsx(Object *obj, Error **errp)
  {
 -    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 -    bool ret;
 -
--(2) cross compiler tools:
+-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
--
+-        ret = true;
--.. code-block:: bash
+-    } else {
--
+-        ret = false;
--  wget https://github.com/loongson/build-tools/releases/download/ \
+-    }
--  2022.05.29/loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
+-    return ret;
--
++    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
--  tar -vxf loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
+ }
--
--(3) qemu compile configure option:
+ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
--
+ {
--.. code-block:: bash
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
--
++    uint32_t val;
--  ./configure --disable-rdma --disable-pvrdma --prefix=usr \
-+  ./configure --disable-rdma --disable-pvrdma --prefix=/usr \
+-    if (value) {
-               --target-list="loongarch64-softmmu" \
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-               --disable-libiscsi --disable-libnfs --disable-libpmem \
+-    } else {
-               --disable-glusterfs --enable-libusb --enable-usb-redir \
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-               --disable-opengl --disable-xen --enable-spice \
+-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
-               --enable-debug --disable-capstone --disable-kvm \
++    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
-               --enable-profiler
++    if (kvm_enabled()) {
--  make
++        /* kvm feature detection in function kvm_arch_init_vcpu */
-+  make -j8
++        return;
+     }
--(4) uefi bios source code and compile method:
++
-+(2) Set cross tools:
++    /* LSX feature detection in TCG mode */
++    val = cpu->env.cpucfg[2];
- .. code-block:: bash
++    if (cpu->lsx == ON_OFF_AUTO_ON) {
++        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
--  git clone https://github.com/loongson/edk2-LoongarchVirt.git
++            error_setg(errp, "Failed to enable LSX in TCG mode");
--
++            return;
--  cd edk2-LoongarchVirt
++        }
--
++    }
--  git submodule update --init
++
--
++    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
--  export PATH=$YOUR_COMPILER_PATH/bin:$PATH
+ }
--
--  export WORKSPACE=`pwd`
+ static bool loongarch_get_lasx(Object *obj, Error **errp)
-+  wget https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
+ {
--  export PACKAGES_PATH=$WORKSPACE/edk2-LoongarchVirt
+     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+  tar -vxf loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz  -C /opt
++    cpu->lsx = ON_OFF_AUTO_AUTO;
--  export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
-+  export PATH=/opt/cross-tools/bin:$PATH
+                              loongarch_set_lsx);
-+  export LD_LIBRARY_PATH=/opt/cross-tools/lib:$LD_LIBRARY_PATH
+     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
-+  export LD_LIBRARY_PATH=/opt/cross-tools/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
+@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
--  edk2-LoongarchVirt/edksetup.sh
+     } else {
-+Note: You need get the latest cross-tools at https://github.com/loongson/build-tools
+         cpu->lbt = ON_OFF_AUTO_OFF;
++        cpu->pmu = ON_OFF_AUTO_OFF;
--  make -C edk2-LoongarchVirt/BaseTools
+     }
-+(3) Build BIOS:
+ }
--  build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
+diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
-+    See: https://github.com/tianocore/edk2-platforms/tree/master/Platform/Loongson/LoongArchQemuPkg#readme
+index XXXXXXX..XXXXXXX 100644
+--- a/target/loongarch/cpu.h
--  build --buildtarget=RELEASE --tagname=GCC5 --arch=LOONGARCH64  --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
++++ b/target/loongarch/cpu.h
-+Note: To build the release version of the bios,  set --buildtarget=RELEASE,
+@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
-+      the bios file path:  Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
+ #endif
--The efi binary file path:
+ enum loongarch_features {
--
++    LOONGARCH_FEATURE_LSX,
--  Build/LoongArchQemu/DEBUG_GCC5/FV/QEMU_EFI.fd
+     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
--
+     LOONGARCH_FEATURE_PMU,
--  Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
+ };
--
+@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
--(5) linux kernel source code and compile method:
+     uint32_t  phy_id;
-+(4) Build kernel:
+     OnOffAuto lbt;
+     OnOffAuto pmu;
- .. code-block:: bash
++    OnOffAuto lsx;
-   git clone https://github.com/loongson/linux.git
+     /* 'compatible' string for this CPU for Linux device trees */
+     const char *dtb_compatible;
--  export PATH=$YOUR_COMPILER_PATH/bin:$PATH
+diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
--
+index XXXXXXX..XXXXXXX 100644
--  export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/lib:$LD_LIBRARY_PATH
+--- a/target/loongarch/kvm/kvm.c
-+  cd linux
++++ b/target/loongarch/kvm/kvm.c
+@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
--  export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
+ {
-+  git checkout loongarch-next
+     int ret;
+     struct kvm_device_attr attr;
-   make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- loongson3_defconfig
++    uint64_t val;
--  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu-
+     switch (feature) {
--
++    case LOONGARCH_FEATURE_LSX:
--  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- install
++        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
--
++        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
--  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- modules_install
++        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
-+  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- -j32
++        if (ret == 0) {
++            return true;
- Note: The branch of linux source code is loongarch-next.
++        }
-+      the kernel file: arch/loongarch/boot/vmlinuz.efi
++
++        /* Fallback to old kernel detect interface */
--(6) initrd file:
++        val = 0;
-+(5) Get initrd:
++        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
++        /* Cpucfg2 */
-   You can use busybox tool and the linux modules to make a initrd file. Or you can access the
++        attr.attr  = 2;
-   binary files: https://github.com/yangxiaojuan-loongson/qemu-binary
++        attr.addr = (uint64_t)&val;
-+
++        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
-+.. code-block:: bash
++        if (!ret) {
-+
++            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
-+  git clone https://github.com/yangxiaojuan-loongson/qemu-binary
++            if (ret) {
-+
++                return false;
-+Note: the initrd file is ramdisk
++            }
 +
-+(6) Booting LoongArch:
++            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
-+
++            return (ret != 0);
-+.. code-block:: bash
++        }
-+
++        return false;
-+  $ ./build/qemu-system-loongarch64 -machine virt -m 4G -cpu la464 \
++
-+      -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd ramdisk \
+     case LOONGARCH_FEATURE_LBT:
-+      -serial stdio   -monitor telnet:localhost:4495,server,nowait \
+         /*
-+      -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
+          * Return all if all the LBT features are supported such as:
-+      --nographic
+@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
      return false;
  }
 +static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
 +    if (cpu->lsx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +        } else {
 +            error_setg(errp, "'lsx' feature not supported by KVM on this host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
      CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          brk_insn = val;
      }
 +    ret = kvm_cpu_check_lsx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.31.1
+.43.5

-[PULL 4/5] target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
+[PULL v2 6/6] target/loongarch: Use auto method with LASX feature
-According to the 3A5000 manual 4.1 implement Chip Configuration
+Like LSX feature, add type OnOffAuto for LASX feature setting.
 Version Register(0x0000).
-Signed-off-by: Song Gao <gaosong@loongson.cn>
+Signed-off-by: Bibo Mao <maobibo@loongson.cn>
-Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Reviewed-by: Bibo Mao <maobibo@loongson.cn>
 Message-Id: <20230227071046.1445572-1-gaosong@loongson.cn>
 ---
- target/loongarch/cpu.c | 2 ++
+ target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
- target/loongarch/cpu.h | 1 +
+ target/loongarch/cpu.h     |  2 ++
-files changed, 3 insertions(+)
+ target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 files changed, 89 insertions(+), 16 deletions(-)
 diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.c
 +++ b/target/loongarch/cpu.c
-@@ -XXX,XX +XXX,XX @@ static void loongarch_qemu_write(void *opaque, hwaddr addr,
+@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
- static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)
+     uint32_t val;
      cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if (cpu->lsx == ON_OFF_AUTO_OFF) {
 +        cpu->lasx = ON_OFF_AUTO_OFF;
 +        if (cpu->lasx == ON_OFF_AUTO_ON) {
 +            error_setg(errp, "Failed to disable LSX since LASX is enabled");
 +            return;
 +        }
 +    }
 +
      if (kvm_enabled()) {
          /* kvm feature detection in function kvm_arch_init_vcpu */
          return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
              error_setg(errp, "Failed to enable LSX in TCG mode");
              return;
          }
 +    } else {
 +        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
 +        val = cpu->env.cpucfg[2];
      }
      cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
  static bool loongarch_get_lasx(Object *obj, Error **errp)
  {
-     switch (addr) {
+-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-+    case VERSION_REG:
+-    bool ret;
-+        return 0x11ULL;
+-
-     case FEATURE_REG:
+-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-         return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
+-        ret = true;
-ULL << IOCSRF_CSRIPI;
+-    } else {
 -        ret = false;
 -    }
 -    return ret;
 +    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
  }
  static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
  {
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 +    uint32_t val;
 -    if (value) {
 -    if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
 -            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
 -    }
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
 -    } else {
 -        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
 +    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 +    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
 +        error_setg(errp, "Failed to enable LASX since lSX is disabled");
 +        return;
 +    }
 +
 +    if (kvm_enabled()) {
 +        /* kvm feature detection in function kvm_arch_init_vcpu */
 +        return;
      }
 +
 +    /* LASX feature detection in TCG mode */
 +    val = cpu->env.cpucfg[2];
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
 +            error_setg(errp, "Failed to enable LASX in TCG mode");
 +            return;
 +        }
 +    }
 +
 +    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
  }
  static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
      LoongArchCPU *cpu = LOONGARCH_CPU(obj);
      cpu->lsx = ON_OFF_AUTO_AUTO;
 +    cpu->lasx = ON_OFF_AUTO_AUTO;
      object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                               loongarch_set_lsx);
      object_property_add_bool(obj, "lasx", loongarch_get_lasx,
 diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/cpu.h
 +++ b/target/loongarch/cpu.h
-@@ -XXX,XX +XXX,XX @@
+@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
- #define IOCSRF_GMOD             9
- #define IOCSRF_VM               11
+ enum loongarch_features {
+     LOONGARCH_FEATURE_LSX,
-+#define VERSION_REG             0x0
++    LOONGARCH_FEATURE_LASX,
- #define FEATURE_REG             0x8
+     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
- #define VENDOR_REG              0x10
+     LOONGARCH_FEATURE_PMU,
- #define CPUNAME_REG             0x20
+ };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
      OnOffAuto lbt;
      OnOffAuto pmu;
      OnOffAuto lsx;
 +    OnOffAuto lasx;
      /* 'compatible' string for this CPU for Linux device trees */
      const char *dtb_compatible;
 diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
 index XXXXXXX..XXXXXXX 100644
 --- a/target/loongarch/kvm/kvm.c
 +++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
          }
          return false;
 +    case LOONGARCH_FEATURE_LASX:
 +        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
 +        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
 +        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (ret == 0) {
 +            return true;
 +        }
 +
 +        /* Fallback to old kernel detect interface */
 +        val = 0;
 +        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
 +        /* Cpucfg2 */
 +        attr.attr  = 2;
 +        attr.addr = (uint64_t)&val;
 +        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
 +        if (!ret) {
 +            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
 +            if (ret) {
 +                return false;
 +            }
 +
 +            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
 +            return (ret != 0);
 +        }
 +        return false;
 +
      case LOONGARCH_FEATURE_LBT:
          /*
           * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
      return 0;
  }
 +static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
 +{
 +    CPULoongArchState *env = cpu_env(cs);
 +    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
 +    bool kvm_supported;
 +
 +    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
 +    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
 +    if (cpu->lasx == ON_OFF_AUTO_ON) {
 +        if (kvm_supported) {
 +            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +        } else {
 +            error_setg(errp, "'lasx' feature not supported by KVM on host");
 +            return -ENOTSUP;
 +        }
 +    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
 +        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
 +    }
 +
 +    return 0;
 +}
 +
  static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
  {
      CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
          error_report_err(local_err);
      }
 +    ret = kvm_cpu_check_lasx(cs, &local_err);
 +    if (ret < 0) {
 +        error_report_err(local_err);
 +    }
 +
      ret = kvm_cpu_check_lbt(cs, &local_err);
      if (ret < 0) {
          error_report_err(local_err);
 --
-.31.1
+.43.5

The following changes since commit 262312d7ba6e2966acedb4f9c134fd19176b4083:

Merge tag 'pull-testing-next-010323-1' of https://gitlab.com/stsquad/qemu into staging (2023-03-02 13:02:53 +0000)

are available in the Git repository at:

https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230303

for you to fetch changes up to 0d588c4f999699a430b32c563fe9ccc1710b8fd7:

hw/loongarch/virt: add system_powerdown hmp command support (2023-03-03 09:37:30 +0800)

----------------------------------------------------------------
pull-loongarch-20230303

----------------------------------------------------------------
Bibo Mao (1):
      hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE

Song Gao (4):
      loongarch: Add smbios command line option.
      docs/system/loongarch: update loongson3.rst and rename it to virt.rst
      target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
      hw/loongarch/virt: add system_powerdown hmp command support

docs/system/loongarch/{loongson3.rst => virt.rst} | 97 +++++++++--------------
 hw/loongarch/acpi-build.c                         |  3 +-
 hw/loongarch/virt.c                               | 20 ++++-
 include/hw/loongarch/virt.h                       |  1 +
 include/hw/pci-host/ls7a.h                        | 17 ++--
 qemu-options.hx                                   |  2 +-
 target/loongarch/cpu.c                            |  2 +
 target/loongarch/cpu.h                            |  1 +
 8 files changed, 70 insertions(+), 73 deletions(-)
 rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)

From: Bibo Mao <maobibo@loongson.cn>

In theory gsi base can start from 0 on loongarch virt machine,
however gsi base is hard-coded in linux kernel loongarch system,
else system fails to boot.

This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE,
keeps value unchanged. GSI base is common concept in acpi spec
and easy to understand.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20221228030719.991878-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/acpi-build.c  |  2 +-
 hw/loongarch/virt.c        |  8 ++++----
 include/hw/pci-host/ls7a.h | 17 +++++++++--------
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@ static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
         .pio.size    = VIRT_PCI_IO_SIZE,
         .ecam.base   = VIRT_PCI_CFG_BASE,
         .ecam.size   = VIRT_PCI_CFG_SIZE,
-        .irq         = PCH_PIC_IRQ_OFFSET + VIRT_DEVICE_IRQS,
+        .irq         = VIRT_GSI_BASE + VIRT_DEVICE_IRQS,
         .bus         = lams->pci_bus,
     };
 
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState
     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR);
 
     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
-                       qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - PCH_PIC_IRQ_OFFSET));
+                       qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE));
     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
     return dev;
 }
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 
     sysbus = SYS_BUS_DEVICE(dev);
     for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) {
-        irq = VIRT_PLATFORM_BUS_IRQ - PCH_PIC_IRQ_OFFSET + i;
+        irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i;
         sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq));
     }
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
 
     serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
                    qdev_get_gpio_in(pch_pic,
-                                    VIRT_UART_IRQ - PCH_PIC_IRQ_OFFSET),
+                                    VIRT_UART_IRQ - VIRT_GSI_BASE),
                    115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
     fdt_add_uart_node(lams);
 
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
     create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4);
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
-                         VIRT_RTC_IRQ - PCH_PIC_IRQ_OFFSET));
+                         VIRT_RTC_IRQ - VIRT_GSI_BASE));
     fdt_add_rtc_node(lams);
 
     pm_mem = g_new(MemoryRegion, 1);
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -XXX,XX +XXX,XX @@
 #define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
 
 /*
- * According to the kernel pch irq start from 64 offset
- * 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
- * used for pci device.
+ * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
+ * 0  - 15  GSI for ISA devices even if there is no ISA devices
+ * 16 - 63  GSI for CPU devices such as timers/perf monitor etc
+ * 64 -     GSI for external devices
  */
 #define VIRT_PCH_PIC_IRQ_NUM     32
-#define PCH_PIC_IRQ_OFFSET       64
+#define VIRT_GSI_BASE            64
 #define VIRT_DEVICE_IRQS         16
-#define VIRT_UART_IRQ            (PCH_PIC_IRQ_OFFSET + 2)
+#define VIRT_UART_IRQ            (VIRT_GSI_BASE + 2)
 #define VIRT_UART_BASE           0x1fe001e0
 #define VIRT_UART_SIZE           0X100
-#define VIRT_RTC_IRQ             (PCH_PIC_IRQ_OFFSET + 3)
+#define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 3)
 #define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
 #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
 #define VIRT_RTC_LEN             0x100
-#define VIRT_SCI_IRQ             (PCH_PIC_IRQ_OFFSET + 4)
+#define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
 
 #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
 #define VIRT_PLATFORM_BUS_SIZE          0x2000000
 #define VIRT_PLATFORM_BUS_NUM_IRQS      2
-#define VIRT_PLATFORM_BUS_IRQ           69
+#define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 5)
 #endif
-- 
2.31.1

LoongArch has enabled CONFIG_SMBIOS, but didn't enable CLI '-smbios'.

Fixes: 3efa6fa1e629 ("hw/loongarch: Add smbios support")
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230227035905.1290953-2-gaosong@loongson.cn>
---
 qemu-options.hx | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qemu-options.hx b/qemu-options.hx
index XXXXXXX..XXXXXXX 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -XXX,XX +XXX,XX @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
     "                specify SMBIOS type 17 fields\n"
     "-smbios type=41[,designation=str][,kind=str][,instance=%d][,pcidev=str]\n"
     "                specify SMBIOS type 41 fields\n",
-    QEMU_ARCH_I386 | QEMU_ARCH_ARM)
+    QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH)
 SRST
 ``-smbios file=binary``
     Load SMBIOS entry from binary file.
-- 
2.31.1

Since the EDK2 had already support LoongArch, update build bios,
and update cpu type, cross-tools.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230227035905.1290953-1-gaosong@loongson.cn>
---
 .../loongarch/{loongson3.rst => virt.rst}     | 97 ++++++++-----------
 1 file changed, 38 insertions(+), 59 deletions(-)
 rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)

diff --git a/docs/system/loongarch/loongson3.rst b/docs/system/loongarch/virt.rst
similarity index 51%
rename from docs/system/loongarch/loongson3.rst
rename to docs/system/loongarch/virt.rst
index XXXXXXX..XXXXXXX 100644
--- a/docs/system/loongarch/loongson3.rst
+++ b/docs/system/loongarch/virt.rst
@@ -XXX,XX +XXX,XX @@ The ``virt`` machine supports:
 - Fw_cfg device
 - PCI/PCIe devices
 - Memory device
-- CPU device. Type: la464-loongarch-cpu.
+- CPU device. Type: la464.
 
 CPU and machine Type
 --------------------
 
 The ``qemu-system-loongarch64`` provides emulation for virt
 machine. You can specify the machine type ``virt`` and
-cpu type ``la464-loongarch-cpu``.
+cpu type ``la464``.
 
 Boot options
 ------------
@@ -XXX,XX +XXX,XX @@ We can boot the LoongArch virt machine by specifying the uefi bios,
 initrd, and linux kernel. And those source codes and binary files
 can be accessed by following steps.
 
-(1) booting command:
+(1) Build qemu-system-loongarch64:
 
 .. code-block:: bash
 
-  $ qemu-system-loongarch64 -machine virt -m 4G -cpu la464-loongarch-cpu \
-      -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd initrd.img \
-      -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
-      --nographic
-
-Note: The running speed may be a little slow, as the performance of our
-qemu and uefi bios is not perfect, and it is being fixed.
-
-(2) cross compiler tools:
-
-.. code-block:: bash
-
-  wget https://github.com/loongson/build-tools/releases/download/ \
-  2022.05.29/loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
-
-  tar -vxf loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
-
-(3) qemu compile configure option:
-
-.. code-block:: bash
-
-  ./configure --disable-rdma --disable-pvrdma --prefix=usr \
+  ./configure --disable-rdma --disable-pvrdma --prefix=/usr \
               --target-list="loongarch64-softmmu" \
               --disable-libiscsi --disable-libnfs --disable-libpmem \
               --disable-glusterfs --enable-libusb --enable-usb-redir \
               --disable-opengl --disable-xen --enable-spice \
               --enable-debug --disable-capstone --disable-kvm \
               --enable-profiler
-  make
+  make -j8
 
-(4) uefi bios source code and compile method:
+(2) Set cross tools:
 
 .. code-block:: bash
 
-  git clone https://github.com/loongson/edk2-LoongarchVirt.git
-
-  cd edk2-LoongarchVirt
-
-  git submodule update --init
-
-  export PATH=$YOUR_COMPILER_PATH/bin:$PATH
-
-  export WORKSPACE=`pwd`
+  wget https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz
 
-  export PACKAGES_PATH=$WORKSPACE/edk2-LoongarchVirt
+  tar -vxf loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz  -C /opt
 
-  export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+  export PATH=/opt/cross-tools/bin:$PATH
+  export LD_LIBRARY_PATH=/opt/cross-tools/lib:$LD_LIBRARY_PATH
+  export LD_LIBRARY_PATH=/opt/cross-tools/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
 
-  edk2-LoongarchVirt/edksetup.sh
+Note: You need get the latest cross-tools at https://github.com/loongson/build-tools
 
-  make -C edk2-LoongarchVirt/BaseTools
+(3) Build BIOS:
 
-  build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
+    See: https://github.com/tianocore/edk2-platforms/tree/master/Platform/Loongson/LoongArchQemuPkg#readme
 
-  build --buildtarget=RELEASE --tagname=GCC5 --arch=LOONGARCH64  --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
+Note: To build the release version of the bios,  set --buildtarget=RELEASE,
+      the bios file path:  Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
 
-The efi binary file path:
-
-  Build/LoongArchQemu/DEBUG_GCC5/FV/QEMU_EFI.fd
-
-  Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
-
-(5) linux kernel source code and compile method:
+(4) Build kernel:
 
 .. code-block:: bash
 
   git clone https://github.com/loongson/linux.git
 
-  export PATH=$YOUR_COMPILER_PATH/bin:$PATH
-
-  export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/lib:$LD_LIBRARY_PATH
+  cd linux
 
-  export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
+  git checkout loongarch-next
 
   make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- loongson3_defconfig
 
-  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu-
-
-  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- install
-
-  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- modules_install
+  make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- -j32
 
 Note: The branch of linux source code is loongarch-next.
+      the kernel file: arch/loongarch/boot/vmlinuz.efi
 
-(6) initrd file:
+(5) Get initrd:
 
   You can use busybox tool and the linux modules to make a initrd file. Or you can access the
   binary files: https://github.com/yangxiaojuan-loongson/qemu-binary
+
+.. code-block:: bash
+
+  git clone https://github.com/yangxiaojuan-loongson/qemu-binary
+
+Note: the initrd file is ramdisk
+
+(6) Booting LoongArch:
+
+.. code-block:: bash
+
+  $ ./build/qemu-system-loongarch64 -machine virt -m 4G -cpu la464 \
+      -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd ramdisk \
+      -serial stdio   -monitor telnet:localhost:4495,server,nowait \
+      -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
+      --nographic
-- 
2.31.1

According to the 3A5000 manual 4.1 implement Chip Configuration
Version Register(0x0000).

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230227071046.1445572-1-gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 2 ++
 target/loongarch/cpu.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_qemu_write(void *opaque, hwaddr addr,
 static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)
 {
     switch (addr) {
+    case VERSION_REG:
+        return 0x11ULL;
     case FEATURE_REG:
         return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
                1ULL << IOCSRF_CSRIPI;
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@
 #define IOCSRF_GMOD             9
 #define IOCSRF_VM               11
 
+#define VERSION_REG             0x0
 #define FEATURE_REG             0x8
 #define VENDOR_REG              0x10
 #define CPUNAME_REG             0x20
-- 
2.31.1

For loongarch virt machine, add powerdown notification callback
and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add
acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this
patch.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230303010548.295580-1-gaosong@loongson.cn>
---
 hw/loongarch/acpi-build.c   |  1 +
 hw/loongarch/virt.c         | 12 ++++++++++++
 include/hw/loongarch/virt.h |  1 +
 3 files changed, 14 insertions(+)

diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -XXX,XX +XXX,XX @@ build_la_ged_aml(Aml *dsdt, MachineState *machine)
                                  AML_SYSTEM_MEMORY,
                                  VIRT_GED_MEM_ADDR);
     }
+    acpi_dsdt_add_power_button(dsdt);
 }
 
 static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_machine_done(Notifier *notifier, void *data)
     loongarch_acpi_setup(lams);
 }
 
+static void virt_powerdown_req(Notifier *notifier, void *opaque)
+{
+    LoongArchMachineState *s = container_of(notifier,
+                                   LoongArchMachineState, powerdown_notifier);
+
+    acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
+}
+
 struct memmap_entry {
     uint64_t address;
     uint64_t length;
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
                                    VIRT_PLATFORM_BUS_IRQ);
     lams->machine_done.notify = virt_machine_done;
     qemu_add_machine_init_done_notifier(&lams->machine_done);
+     /* connect powerdown request */
+    lams->powerdown_notifier.notify = virt_powerdown_req;
+    qemu_register_powerdown_notifier(&lams->powerdown_notifier);
+
     fdt_add_pcie_node(lams);
     /*
      * Since lowmem region starts from 0 and Linux kernel legacy start address
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index XXXXXXX..XXXXXXX 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
     /* State for other subsystems/APIs: */
     FWCfgState  *fw_cfg;
     Notifier     machine_done;
+    Notifier     powerdown_notifier;
     OnOffAuto    acpi;
     char         *oem_id;
     char         *oem_table_id;
-- 
2.31.1

The following changes since commit 38d0939b86e2eef6f6a622c6f1f7befda0146595:

Merge tag 'pull-vfio-20241226' of https://github.com/legoater/qemu into staging (2024-12-26 04:38:38 -0500)

are available in the Git repository at:

https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241227

for you to fetch changes up to 5e360dabedb1ab1f15cce27a134ccbe4b8e18424:

target/loongarch: Use auto method with LASX feature (2024-12-27 11:33:06 +0800)

----------------------------------------------------------------
pull-loongarch-20241227
v1 ... v2
  1. Modify patch auther inconsistent with SOB

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Use actual operand size with vbsrl check
      hw/loongarch/virt: Create fdt table on machine creation done notification
      hw/loongarch/virt: Improve fdt table creation for CPU object
      target/loongarch: Use auto method with LSX feature
      target/loongarch: Use auto method with LASX feature

Guo Hongyu (1):
      target/loongarch: Fix vldi inst

hw/loongarch/virt.c                             | 142 ++++++++++++++----------
 target/loongarch/cpu.c                          |  86 ++++++++------
 target/loongarch/cpu.h                          |   4 +
 target/loongarch/kvm/kvm.c                      | 107 ++++++++++++++++++
 target/loongarch/tcg/insn_trans/trans_vec.c.inc |   4 +-
 5 files changed, 249 insertions(+), 94 deletions(-)

From: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>

Refer to the link below for a description of the vldi instructions:
https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88
Fixed errors in vldi instruction implementation.

Signed-off-by: Guo Hongyu <guohongyu24@mails.ucas.ac.cn>
Tested-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static uint64_t vldi_get_value(DisasContext *ctx, uint32_t imm)
         break;
     case 1:
         /* data: {2{16'0, imm[7:0], 8'0}} */
-        data = (t << 24) | (t << 8);
+        data = (t << 40) | (t << 8);
         break;
     case 2:
         /* data: {2{8'0, imm[7:0], 16'0}} */
-- 
2.43.5

Hardcoded 32 bytes is used for vbsrl emulation check, there is
problem when options lsx=on,lasx=off is used for vbsrl.v instruction
in TCG mode. It injects LASX exception rather LSX exception.

Here actual operand size is used.

Cc: qemu-stable@nongnu.org
Fixes: df97f338076 ("target/loongarch: Implement xvreplve xvinsve0 xvpickve")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -XXX,XX +XXX,XX @@ static bool do_vbsrl_v(DisasContext *ctx, arg_vv_i *a, uint32_t oprsz)
 {
     int i, ofs;
 
-    if (!check_vec(ctx, 32)) {
+    if (!check_vec(ctx, oprsz)) {
         return true;
     }
 
-- 
2.43.5

The same with ACPI table, fdt table is created on machine done
notification. Some objects like CPU objects can be created with cold-plug
method with command such as -smp x, -device la464-loongarch-cpu, so all
objects finish to create when machine is done.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 103 ++++++++++++++++++++++++--------------------
 1 file changed, 57 insertions(+), 46 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index XXXXXXX..XXXXXXX 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -XXX,XX +XXX,XX @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms)
     }
 }
 
+static void virt_fdt_setup(LoongArchVirtMachineState *lvms)
+{
+    MachineState *machine = MACHINE(lvms);
+    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
+    int i;
+
+    create_fdt(lvms);
+    fdt_add_cpu_nodes(lvms);
+    fdt_add_memory_nodes(machine);
+    fdt_add_fw_cfg_node(lvms);
+    fdt_add_flash_node(lvms);
+
+    /* Add cpu interrupt-controller */
+    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
+    /* Add Extend I/O Interrupt Controller node */
+    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
+    /* Add PCH PIC node */
+    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
+    /* Add PCH MSI node */
+    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
+    /* Add pcie node */
+    fdt_add_pcie_node(lvms, &pch_pic_phandle, &pch_msi_phandle);
+
+    /*
+     * Create uart fdt node in reverse order so that they appear
+     * in the finished device tree lowest address first
+     */
+    for (i = VIRT_UART_COUNT; i-- > 0;) {
+        hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
+        int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
+        fdt_add_uart_node(lvms, &pch_pic_phandle, base, irq, i == 0);
+    }
+
+    fdt_add_rtc_node(lvms, &pch_pic_phandle);
+    fdt_add_ged_reset(lvms);
+    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
+                                   VIRT_PLATFORM_BUS_BASEADDRESS,
+                                   VIRT_PLATFORM_BUS_SIZE,
+                                   VIRT_PLATFORM_BUS_IRQ);
+
+    /*
+     * Since lowmem region starts from 0 and Linux kernel legacy start address
+     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+     * access. FDT size limit with 1 MiB.
+     * Put the FDT into the memory map as a ROM image: this will ensure
+     * the FDT is copied again upon reset, even if addr points into RAM.
+     */
+    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
+    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
+                          &address_space_memory);
+    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
+            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
+}
+
 static void virt_done(Notifier *notifier, void *data)
 {
     LoongArchVirtMachineState *lvms = container_of(notifier,
                                       LoongArchVirtMachineState, machine_done);
     virt_build_smbios(lvms);
     loongarch_acpi_setup(lvms);
+    virt_fdt_setup(lvms);
 }
 
 static void virt_powerdown_req(Notifier *notifier, void *opaque)
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
 }
 
 static void virt_devices_init(DeviceState *pch_pic,
-                                   LoongArchVirtMachineState *lvms,
-                                   uint32_t *pch_pic_phandle,
-                                   uint32_t *pch_msi_phandle)
+                                   LoongArchVirtMachineState *lvms)
 {
     MachineClass *mc = MACHINE_GET_CLASS(lvms);
     DeviceState *gpex_dev;
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
     }
 
-    /* Add pcie node */
-    fdt_add_pcie_node(lvms, pch_pic_phandle, pch_msi_phandle);
-
     /*
      * Create uart fdt node in reverse order so that they appear
      * in the finished device tree lowest address first
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
         serial_mm_init(get_system_memory(), base, 0,
                        qdev_get_gpio_in(pch_pic, irq),
                        115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
-        fdt_add_uart_node(lvms, pch_pic_phandle, base, irq, i == 0);
     }
 
     /* Network init */
@@ -XXX,XX +XXX,XX @@ static void virt_devices_init(DeviceState *pch_pic,
     sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
                          qdev_get_gpio_in(pch_pic,
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
-    fdt_add_rtc_node(lvms, pch_pic_phandle);
-    fdt_add_ged_reset(lvms);
 
     /* acpi ged */
     lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     CPULoongArchState *env;
     CPUState *cpu_state;
     int cpu, pin, i, start, num;
-    uint32_t cpuintc_phandle, eiointc_phandle, pch_pic_phandle, pch_msi_phandle;
 
     /*
      * Extended IRQ model.
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
     memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
                    sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
 
-    /* Add cpu interrupt-controller */
-    fdt_add_cpuic_node(lvms, &cpuintc_phandle);
-
     for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
         cpu_state = qemu_get_cpu(cpu);
         cpudev = DEVICE(cpu_state);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         }
     }
 
-    /* Add Extend I/O Interrupt Controller node */
-    fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
-
     pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
     num = VIRT_PCH_PIC_IRQ_NUM;
     qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
         qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
     }
 
-    /* Add PCH PIC node */
-    fdt_add_pch_pic_node(lvms, &eiointc_phandle, &pch_pic_phandle);
-
     pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
     start   =  num;
     num = EXTIOI_IRQS - start;
@@ -XXX,XX +XXX,XX @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
                               qdev_get_gpio_in(extioi, i + start));
     }
 
-    /* Add PCH MSI node */
-    fdt_add_pch_msi_node(lvms, &eiointc_phandle, &pch_msi_phandle);
-
-    virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
+    virt_devices_init(pch_pic, lvms);
 }
 
 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
     }
 
-    create_fdt(lvms);
-
     /* Create IOCSR space */
     memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
                           machine, "iocsr", UINT64_MAX);
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
         lacpu = LOONGARCH_CPU(cpu);
         lacpu->phy_id = machine->possible_cpus->cpus[i].arch_id;
     }
-    fdt_add_cpu_nodes(lvms);
-    fdt_add_memory_nodes(machine);
     fw_cfg_add_memory(machine);
 
     /* Node0 memory */
@@ -XXX,XX +XXX,XX @@ static void virt_init(MachineState *machine)
                         memmap_table,
                         sizeof(struct memmap_entry) * (memmap_entries));
     }
-    fdt_add_fw_cfg_node(lvms);
-    fdt_add_flash_node(lvms);
 
     /* Initialize the IO interrupt subsystem */
     virt_irq_init(lvms);
-    platform_bus_add_all_fdt_nodes(machine->fdt, "/platic",
-                                   VIRT_PLATFORM_BUS_BASEADDRESS,
-                                   VIRT_PLATFORM_BUS_SIZE,
-                                   VIRT_PLATFORM_BUS_IRQ);
     lvms->machine_done.notify = virt_done;
     qemu_add_machine_init_done_notifier(&lvms->machine_done);
      /* connect powerdown request */
     lvms->powerdown_notifier.notify = virt_powerdown_req;
     qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
 
-    /*
-     * Since lowmem region starts from 0 and Linux kernel legacy start address
-     * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
-     * access. FDT size limit with 1 MiB.
-     * Put the FDT into the memory map as a ROM image: this will ensure
-     * the FDT is copied again upon reset, even if addr points into RAM.
-     */
-    qemu_fdt_dumpdtb(machine->fdt, lvms->fdt_size);
-    rom_add_blob_fixed_as("fdt", machine->fdt, lvms->fdt_size, FDT_BASE,
-                          &address_space_memory);
-    qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
-            rom_ptr_for_as(&address_space_memory, FDT_BASE, lvms->fdt_size));
-
     lvms->bootinfo.ram_size = ram_size;
     loongarch_load_kernel(machine, &lvms->bootinfo);
 }
-- 
2.43.5

For CPU object, possible_cpu_arch_ids() function is used rather than
smp.cpus. With command -smp x, -device la464-loongarch-cpu, smp.cpus
is not accurate for all possible CPU objects, possible_cpu_arch_ids()
is used here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 hw/loongarch/virt.c | 39 +++++++++++++++++++++++++--------------
 1 file changed, 25 insertions(+), 14 deletions(-)

Like LBT feature, add type OnOffAuto for LSX feature setting. Also
add LSX feature detection with new VM ioctl command, fallback to old
method if it is not supported.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 38 +++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 77 insertions(+), 17 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la464_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-3A5000";
     env->cpucfg[0] = 0x14c010;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
     CPULoongArchState *env = &cpu->env;
-
+    uint32_t data = 0;
     int i;
 
     for (i = 0; i < 21; i++) {
@@ -XXX,XX +XXX,XX @@ static void loongarch_la132_initfn(Object *obj)
     cpu->dtb_compatible = "loongarch,Loongson-1C103";
     env->cpucfg[0] = 0x148042;  /* PRID */
 
-    uint32_t data = 0;
     data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
     data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
     data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -XXX,XX +XXX,XX @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
 
 static bool loongarch_get_lsx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lsx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 0);
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LSX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LSX) == 0) {
+            error_setg(errp, "Failed to enable LSX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
 }
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
+    cpu->lsx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
 
     } else {
         cpu->lbt = ON_OFF_AUTO_OFF;
+        cpu->pmu = ON_OFF_AUTO_OFF;
     }
 }
 
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 #endif
 
 enum loongarch_features {
+    LOONGARCH_FEATURE_LSX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto lsx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
 {
     int ret;
     struct kvm_device_attr attr;
+    uint64_t val;
 
     switch (feature) {
+    case LOONGARCH_FEATURE_LSX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LSX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
     return false;
 }
 
+static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0);
+    if (cpu->lsx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+        } else {
+            error_setg(errp, "'lsx' feature not supported by KVM on this host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         brk_insn = val;
     }
 
+    ret = kvm_cpu_check_lsx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5

Like LSX feature, add type OnOffAuto for LASX feature setting.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
---
 target/loongarch/cpu.c     | 50 +++++++++++++++++++++++------------
 target/loongarch/cpu.h     |  2 ++
 target/loongarch/kvm/kvm.c | 53 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 89 insertions(+), 16 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
     uint32_t val;
 
     cpu->lsx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if (cpu->lsx == ON_OFF_AUTO_OFF) {
+        cpu->lasx = ON_OFF_AUTO_OFF;
+        if (cpu->lasx == ON_OFF_AUTO_ON) {
+            error_setg(errp, "Failed to disable LSX since LASX is enabled");
+            return;
+        }
+    }
+
     if (kvm_enabled()) {
         /* kvm feature detection in function kvm_arch_init_vcpu */
         return;
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
             error_setg(errp, "Failed to enable LSX in TCG mode");
             return;
         }
+    } else {
+        cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, 0);
+        val = cpu->env.cpucfg[2];
     }
 
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LSX, value);
@@ -XXX,XX +XXX,XX @@ static void loongarch_set_lsx(Object *obj, bool value, Error **errp)
 
 static bool loongarch_get_lasx(Object *obj, Error **errp)
 {
-    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
-    bool ret;
-
-    if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
-        ret = true;
-    } else {
-        ret = false;
-    }
-    return ret;
+    return LOONGARCH_CPU(obj)->lasx != ON_OFF_AUTO_OFF;
 }
 
 static void loongarch_set_lasx(Object *obj, bool value, Error **errp)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
 
-    if (value) {
-	if (!FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
-            cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LSX, 1);
-	}
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 1);
-    } else {
-        cpu->env.cpucfg[2] = FIELD_DP32(cpu->env.cpucfg[2], CPUCFG2, LASX, 0);
+    cpu->lasx = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+    if ((cpu->lsx == ON_OFF_AUTO_OFF) && (cpu->lasx == ON_OFF_AUTO_ON)) {
+        error_setg(errp, "Failed to enable LASX since lSX is disabled");
+        return;
+    }
+
+    if (kvm_enabled()) {
+        /* kvm feature detection in function kvm_arch_init_vcpu */
+        return;
     }
+
+    /* LASX feature detection in TCG mode */
+    val = cpu->env.cpucfg[2];
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (FIELD_EX32(val, CPUCFG2, LASX) == 0) {
+            error_setg(errp, "Failed to enable LASX in TCG mode");
+            return;
+        }
+    }
+
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
 static bool loongarch_get_lbt(Object *obj, Error **errp)
@@ -XXX,XX +XXX,XX @@ void loongarch_cpu_post_init(Object *obj)
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lsx = ON_OFF_AUTO_AUTO;
+    cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
                              loongarch_set_lsx);
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -XXX,XX +XXX,XX @@ typedef struct LoongArchTLB LoongArchTLB;
 
 enum loongarch_features {
     LOONGARCH_FEATURE_LSX,
+    LOONGARCH_FEATURE_LASX,
     LOONGARCH_FEATURE_LBT, /* loongson binary translation extension */
     LOONGARCH_FEATURE_PMU,
 };
@@ -XXX,XX +XXX,XX @@ struct ArchCPU {
     OnOffAuto lbt;
     OnOffAuto pmu;
     OnOffAuto lsx;
+    OnOffAuto lasx;
 
     /* 'compatible' string for this CPU for Linux device trees */
     const char *dtb_compatible;
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index XXXXXXX..XXXXXXX 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -XXX,XX +XXX,XX @@ static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature)
         }
         return false;
 
+    case LOONGARCH_FEATURE_LASX:
+        attr.group = KVM_LOONGARCH_VM_FEAT_CTRL;
+        attr.attr = KVM_LOONGARCH_VM_FEAT_LASX;
+        ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr);
+        if (ret == 0) {
+            return true;
+        }
+
+        /* Fallback to old kernel detect interface */
+        val = 0;
+        attr.group = KVM_LOONGARCH_VCPU_CPUCFG;
+        /* Cpucfg2 */
+        attr.attr  = 2;
+        attr.addr = (uint64_t)&val;
+        ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+        if (!ret) {
+            ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+            if (ret) {
+                return false;
+            }
+
+            ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX);
+            return (ret != 0);
+        }
+        return false;
+
     case LOONGARCH_FEATURE_LBT:
         /*
          * Return all if all the LBT features are supported such as:
@@ -XXX,XX +XXX,XX @@ static int kvm_cpu_check_lsx(CPUState *cs, Error **errp)
     return 0;
 }
 
+static int kvm_cpu_check_lasx(CPUState *cs, Error **errp)
+{
+    CPULoongArchState *env = cpu_env(cs);
+    LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+    bool kvm_supported;
+
+    kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX);
+    env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0);
+    if (cpu->lasx == ON_OFF_AUTO_ON) {
+        if (kvm_supported) {
+            env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+        } else {
+            error_setg(errp, "'lasx' feature not supported by KVM on host");
+            return -ENOTSUP;
+        }
+    } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) {
+        env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1);
+    }
+
+    return 0;
+}
+
 static int kvm_cpu_check_lbt(CPUState *cs, Error **errp)
 {
     CPULoongArchState *env = cpu_env(cs);
@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)
         error_report_err(local_err);
     }
 
+    ret = kvm_cpu_check_lasx(cs, &local_err);
+    if (ret < 0) {
+        error_report_err(local_err);
+    }
+
     ret = kvm_cpu_check_lbt(cs, &local_err);
     if (ret < 0) {
         error_report_err(local_err);
-- 
2.43.5