1
The following changes since commit 262312d7ba6e2966acedb4f9c134fd19176b4083:
1
The following changes since commit 848a6caa88b9f082c89c9b41afa975761262981d:
2
2
3
Merge tag 'pull-testing-next-010323-1' of https://gitlab.com/stsquad/qemu into staging (2023-03-02 13:02:53 +0000)
3
Merge tag 'migration-20230602-pull-request' of https://gitlab.com/juan.quintela/qemu into staging (2023-06-02 17:33:29 -0700)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230303
7
https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230605
8
8
9
for you to fetch changes up to 0d588c4f999699a430b32c563fe9ccc1710b8fd7:
9
for you to fetch changes up to 8555ddc671203969b0e6eb651e538d02a9a79b3a:
10
10
11
hw/loongarch/virt: add system_powerdown hmp command support (2023-03-03 09:37:30 +0800)
11
hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxes (2023-06-05 11:08:55 +0800)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
pull-loongarch-20230303
14
Fixes Coverity CID: 1512452, 1512453
15
Fixes: 78464f023b54 ("hw/loongarch/virt: Modify ipi as percpu device")
15
16
16
----------------------------------------------------------------
17
----------------------------------------------------------------
17
Bibo Mao (1):
18
Jiaxun Yang (1):
18
hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE
19
hw/intc/loongarch_ipi: Bring back all 4 IPI mailboxes
19
20
20
Song Gao (4):
21
hw/intc/loongarch_ipi.c | 6 +++---
21
loongarch: Add smbios command line option.
22
include/hw/intc/loongarch_ipi.h | 4 +++-
22
docs/system/loongarch: update loongson3.rst and rename it to virt.rst
23
2 files changed, 6 insertions(+), 4 deletions(-)
23
target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
24
hw/loongarch/virt: add system_powerdown hmp command support
25
26
docs/system/loongarch/{loongson3.rst => virt.rst} | 97 +++++++++--------------
27
hw/loongarch/acpi-build.c | 3 +-
28
hw/loongarch/virt.c | 20 ++++-
29
include/hw/loongarch/virt.h | 1 +
30
include/hw/pci-host/ls7a.h | 17 ++--
31
qemu-options.hx | 2 +-
32
target/loongarch/cpu.c | 2 +
33
target/loongarch/cpu.h | 1 +
34
8 files changed, 70 insertions(+), 73 deletions(-)
35
rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)
diff view generated by jsdifflib
1
From: Bibo Mao <maobibo@loongson.cn>
1
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
2
2
3
In theory gsi base can start from 0 on loongarch virt machine,
3
As per "Loongson 3A5000/3B5000 Processor Reference Manual",
4
however gsi base is hard-coded in linux kernel loongarch system,
4
Loongson 3A5000's IPI implementation have 4 mailboxes per
5
else system fails to boot.
5
core.
6
6
7
This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE,
7
However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
8
keeps value unchanged. GSI base is common concept in acpi spec
8
percpu device"), the number of IPI mailboxes was reduced to
9
and easy to understand.
9
one, which mismatches actual hardware.
10
10
11
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
11
It won't affect LoongArch based system as LoongArch boot code
12
only uses the first mailbox, however MIPS based Loongson boot
13
code uses all 4 mailboxes.
14
15
Fixes Coverity CID: 1512452, 1512453
16
Fixes: 78464f023b54 ("hw/loongarch/virt: Modify ipi as percpu device")
17
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
12
Reviewed-by: Song Gao <gaosong@loongson.cn>
18
Reviewed-by: Song Gao <gaosong@loongson.cn>
13
Message-Id: <20221228030719.991878-1-maobibo@loongson.cn>
19
Message-Id: <20230521102307.87081-2-jiaxun.yang@flygoat.com>
14
Signed-off-by: Song Gao <gaosong@loongson.cn>
20
Signed-off-by: Song Gao <gaosong@loongson.cn>
15
---
21
---
16
hw/loongarch/acpi-build.c | 2 +-
22
hw/intc/loongarch_ipi.c | 6 +++---
17
hw/loongarch/virt.c | 8 ++++----
23
include/hw/intc/loongarch_ipi.h | 4 +++-
18
include/hw/pci-host/ls7a.h | 17 +++++++++--------
24
2 files changed, 6 insertions(+), 4 deletions(-)
19
3 files changed, 14 insertions(+), 13 deletions(-)
20
25
21
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
26
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
22
index XXXXXXX..XXXXXXX 100644
27
index XXXXXXX..XXXXXXX 100644
23
--- a/hw/loongarch/acpi-build.c
28
--- a/hw/intc/loongarch_ipi.c
24
+++ b/hw/loongarch/acpi-build.c
29
+++ b/hw/intc/loongarch_ipi.c
25
@@ -XXX,XX +XXX,XX @@ static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
30
@@ -XXX,XX +XXX,XX @@ static void loongarch_ipi_init(Object *obj)
26
.pio.size = VIRT_PCI_IO_SIZE,
31
27
.ecam.base = VIRT_PCI_CFG_BASE,
32
static const VMStateDescription vmstate_ipi_core = {
28
.ecam.size = VIRT_PCI_CFG_SIZE,
33
.name = "ipi-single",
29
- .irq = PCH_PIC_IRQ_OFFSET + VIRT_DEVICE_IRQS,
34
- .version_id = 1,
30
+ .irq = VIRT_GSI_BASE + VIRT_DEVICE_IRQS,
35
- .minimum_version_id = 1,
31
.bus = lams->pci_bus,
36
+ .version_id = 2,
32
};
37
+ .minimum_version_id = 2,
33
38
.fields = (VMStateField[]) {
34
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
39
VMSTATE_UINT32(status, IPICore),
40
VMSTATE_UINT32(en, IPICore),
41
VMSTATE_UINT32(set, IPICore),
42
VMSTATE_UINT32(clear, IPICore),
43
- VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
44
+ VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2),
45
VMSTATE_END_OF_LIST()
46
}
47
};
48
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
35
index XXXXXXX..XXXXXXX 100644
49
index XXXXXXX..XXXXXXX 100644
36
--- a/hw/loongarch/virt.c
50
--- a/include/hw/intc/loongarch_ipi.h
37
+++ b/hw/loongarch/virt.c
51
+++ b/include/hw/intc/loongarch_ipi.h
38
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState
39
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR);
40
41
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
42
- qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - PCH_PIC_IRQ_OFFSET));
43
+ qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE));
44
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
45
return dev;
46
}
47
@@ -XXX,XX +XXX,XX @@ static DeviceState *create_platform_bus(DeviceState *pch_pic)
48
49
sysbus = SYS_BUS_DEVICE(dev);
50
for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) {
51
- irq = VIRT_PLATFORM_BUS_IRQ - PCH_PIC_IRQ_OFFSET + i;
52
+ irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i;
53
sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq));
54
}
55
56
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
57
58
serial_mm_init(get_system_memory(), VIRT_UART_BASE, 0,
59
qdev_get_gpio_in(pch_pic,
60
- VIRT_UART_IRQ - PCH_PIC_IRQ_OFFSET),
61
+ VIRT_UART_IRQ - VIRT_GSI_BASE),
62
115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
63
fdt_add_uart_node(lams);
64
65
@@ -XXX,XX +XXX,XX @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
66
create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4);
67
sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
68
qdev_get_gpio_in(pch_pic,
69
- VIRT_RTC_IRQ - PCH_PIC_IRQ_OFFSET));
70
+ VIRT_RTC_IRQ - VIRT_GSI_BASE));
71
fdt_add_rtc_node(lams);
72
73
pm_mem = g_new(MemoryRegion, 1);
74
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
75
index XXXXXXX..XXXXXXX 100644
76
--- a/include/hw/pci-host/ls7a.h
77
+++ b/include/hw/pci-host/ls7a.h
78
@@ -XXX,XX +XXX,XX @@
52
@@ -XXX,XX +XXX,XX @@
79
#define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
53
#define MAIL_SEND_OFFSET 0
80
54
#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
81
/*
55
82
- * According to the kernel pch irq start from 64 offset
56
+#define IPI_MBX_NUM 4
83
- * 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
57
+
84
- * used for pci device.
58
#define TYPE_LOONGARCH_IPI "loongarch_ipi"
85
+ * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
59
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchIPI, LOONGARCH_IPI)
86
+ * 0 - 15 GSI for ISA devices even if there is no ISA devices
60
87
+ * 16 - 63 GSI for CPU devices such as timers/perf monitor etc
61
@@ -XXX,XX +XXX,XX @@ typedef struct IPICore {
88
+ * 64 - GSI for external devices
62
uint32_t set;
89
*/
63
uint32_t clear;
90
#define VIRT_PCH_PIC_IRQ_NUM 32
64
/* 64bit buf divide into 2 32bit buf */
91
-#define PCH_PIC_IRQ_OFFSET 64
65
- uint32_t buf[2];
92
+#define VIRT_GSI_BASE 64
66
+ uint32_t buf[IPI_MBX_NUM * 2];
93
#define VIRT_DEVICE_IRQS 16
67
qemu_irq irq;
94
-#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
68
} IPICore;
95
+#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
69
96
#define VIRT_UART_BASE 0x1fe001e0
97
#define VIRT_UART_SIZE 0X100
98
-#define VIRT_RTC_IRQ (PCH_PIC_IRQ_OFFSET + 3)
99
+#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 3)
100
#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
101
#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
102
#define VIRT_RTC_LEN 0x100
103
-#define VIRT_SCI_IRQ (PCH_PIC_IRQ_OFFSET + 4)
104
+#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 4)
105
106
#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000
107
#define VIRT_PLATFORM_BUS_SIZE 0x2000000
108
#define VIRT_PLATFORM_BUS_NUM_IRQS 2
109
-#define VIRT_PLATFORM_BUS_IRQ 69
110
+#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 5)
111
#endif
112
--
70
--
113
2.31.1
71
2.39.1
diff view generated by jsdifflib
Deleted patch
1
LoongArch has enabled CONFIG_SMBIOS, but didn't enable CLI '-smbios'.
2
1
3
Fixes: 3efa6fa1e629 ("hw/loongarch: Add smbios support")
4
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5
Reviewed-by: Markus Armbruster <armbru@redhat.com>
6
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
7
Signed-off-by: Song Gao <gaosong@loongson.cn>
8
Message-Id: <20230227035905.1290953-2-gaosong@loongson.cn>
9
---
10
qemu-options.hx | 2 +-
11
1 file changed, 1 insertion(+), 1 deletion(-)
12
13
diff --git a/qemu-options.hx b/qemu-options.hx
14
index XXXXXXX..XXXXXXX 100644
15
--- a/qemu-options.hx
16
+++ b/qemu-options.hx
17
@@ -XXX,XX +XXX,XX @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
18
" specify SMBIOS type 17 fields\n"
19
"-smbios type=41[,designation=str][,kind=str][,instance=%d][,pcidev=str]\n"
20
" specify SMBIOS type 41 fields\n",
21
- QEMU_ARCH_I386 | QEMU_ARCH_ARM)
22
+ QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH)
23
SRST
24
``-smbios file=binary``
25
Load SMBIOS entry from binary file.
26
--
27
2.31.1
diff view generated by jsdifflib
Deleted patch
1
Since the EDK2 had already support LoongArch, update build bios,
2
and update cpu type, cross-tools.
3
1
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Signed-off-by: Song Gao <gaosong@loongson.cn>
6
Message-Id: <20230227035905.1290953-1-gaosong@loongson.cn>
7
---
8
.../loongarch/{loongson3.rst => virt.rst} | 97 ++++++++-----------
9
1 file changed, 38 insertions(+), 59 deletions(-)
10
rename docs/system/loongarch/{loongson3.rst => virt.rst} (51%)
11
12
diff --git a/docs/system/loongarch/loongson3.rst b/docs/system/loongarch/virt.rst
13
similarity index 51%
14
rename from docs/system/loongarch/loongson3.rst
15
rename to docs/system/loongarch/virt.rst
16
index XXXXXXX..XXXXXXX 100644
17
--- a/docs/system/loongarch/loongson3.rst
18
+++ b/docs/system/loongarch/virt.rst
19
@@ -XXX,XX +XXX,XX @@ The ``virt`` machine supports:
20
- Fw_cfg device
21
- PCI/PCIe devices
22
- Memory device
23
-- CPU device. Type: la464-loongarch-cpu.
24
+- CPU device. Type: la464.
25
26
CPU and machine Type
27
--------------------
28
29
The ``qemu-system-loongarch64`` provides emulation for virt
30
machine. You can specify the machine type ``virt`` and
31
-cpu type ``la464-loongarch-cpu``.
32
+cpu type ``la464``.
33
34
Boot options
35
------------
36
@@ -XXX,XX +XXX,XX @@ We can boot the LoongArch virt machine by specifying the uefi bios,
37
initrd, and linux kernel. And those source codes and binary files
38
can be accessed by following steps.
39
40
-(1) booting command:
41
+(1) Build qemu-system-loongarch64:
42
43
.. code-block:: bash
44
45
- $ qemu-system-loongarch64 -machine virt -m 4G -cpu la464-loongarch-cpu \
46
- -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd initrd.img \
47
- -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
48
- --nographic
49
-
50
-Note: The running speed may be a little slow, as the performance of our
51
-qemu and uefi bios is not perfect, and it is being fixed.
52
-
53
-(2) cross compiler tools:
54
-
55
-.. code-block:: bash
56
-
57
- wget https://github.com/loongson/build-tools/releases/download/ \
58
- 2022.05.29/loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
59
-
60
- tar -vxf loongarch64-clfs-5.0-cross-tools-gcc-full.tar.xz
61
-
62
-(3) qemu compile configure option:
63
-
64
-.. code-block:: bash
65
-
66
- ./configure --disable-rdma --disable-pvrdma --prefix=usr \
67
+ ./configure --disable-rdma --disable-pvrdma --prefix=/usr \
68
--target-list="loongarch64-softmmu" \
69
--disable-libiscsi --disable-libnfs --disable-libpmem \
70
--disable-glusterfs --enable-libusb --enable-usb-redir \
71
--disable-opengl --disable-xen --enable-spice \
72
--enable-debug --disable-capstone --disable-kvm \
73
--enable-profiler
74
- make
75
+ make -j8
76
77
-(4) uefi bios source code and compile method:
78
+(2) Set cross tools:
79
80
.. code-block:: bash
81
82
- git clone https://github.com/loongson/edk2-LoongarchVirt.git
83
-
84
- cd edk2-LoongarchVirt
85
-
86
- git submodule update --init
87
-
88
- export PATH=$YOUR_COMPILER_PATH/bin:$PATH
89
-
90
- export WORKSPACE=`pwd`
91
+ wget https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz
92
93
- export PACKAGES_PATH=$WORKSPACE/edk2-LoongarchVirt
94
+ tar -vxf loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz -C /opt
95
96
- export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
97
+ export PATH=/opt/cross-tools/bin:$PATH
98
+ export LD_LIBRARY_PATH=/opt/cross-tools/lib:$LD_LIBRARY_PATH
99
+ export LD_LIBRARY_PATH=/opt/cross-tools/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
100
101
- edk2-LoongarchVirt/edksetup.sh
102
+Note: You need get the latest cross-tools at https://github.com/loongson/build-tools
103
104
- make -C edk2-LoongarchVirt/BaseTools
105
+(3) Build BIOS:
106
107
- build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64 --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
108
+ See: https://github.com/tianocore/edk2-platforms/tree/master/Platform/Loongson/LoongArchQemuPkg#readme
109
110
- build --buildtarget=RELEASE --tagname=GCC5 --arch=LOONGARCH64 --platform=OvmfPkg/LoongArchQemu/Loongson.dsc
111
+Note: To build the release version of the bios, set --buildtarget=RELEASE,
112
+ the bios file path: Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
113
114
-The efi binary file path:
115
-
116
- Build/LoongArchQemu/DEBUG_GCC5/FV/QEMU_EFI.fd
117
-
118
- Build/LoongArchQemu/RELEASE_GCC5/FV/QEMU_EFI.fd
119
-
120
-(5) linux kernel source code and compile method:
121
+(4) Build kernel:
122
123
.. code-block:: bash
124
125
git clone https://github.com/loongson/linux.git
126
127
- export PATH=$YOUR_COMPILER_PATH/bin:$PATH
128
-
129
- export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/lib:$LD_LIBRARY_PATH
130
+ cd linux
131
132
- export LD_LIBRARY_PATH=$YOUR_COMPILER_PATH/loongarch64-unknown-linux-gnu/lib/:$LD_LIBRARY_PATH
133
+ git checkout loongarch-next
134
135
make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- loongson3_defconfig
136
137
- make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu-
138
-
139
- make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- install
140
-
141
- make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- modules_install
142
+ make ARCH=loongarch CROSS_COMPILE=loongarch64-unknown-linux-gnu- -j32
143
144
Note: The branch of linux source code is loongarch-next.
145
+ the kernel file: arch/loongarch/boot/vmlinuz.efi
146
147
-(6) initrd file:
148
+(5) Get initrd:
149
150
You can use busybox tool and the linux modules to make a initrd file. Or you can access the
151
binary files: https://github.com/yangxiaojuan-loongson/qemu-binary
152
+
153
+.. code-block:: bash
154
+
155
+ git clone https://github.com/yangxiaojuan-loongson/qemu-binary
156
+
157
+Note: the initrd file is ramdisk
158
+
159
+(6) Booting LoongArch:
160
+
161
+.. code-block:: bash
162
+
163
+ $ ./build/qemu-system-loongarch64 -machine virt -m 4G -cpu la464 \
164
+ -smp 1 -bios QEMU_EFI.fd -kernel vmlinuz.efi -initrd ramdisk \
165
+ -serial stdio -monitor telnet:localhost:4495,server,nowait \
166
+ -append "root=/dev/ram rdinit=/sbin/init console=ttyS0,115200" \
167
+ --nographic
168
--
169
2.31.1
diff view generated by jsdifflib
Deleted patch
1
According to the 3A5000 manual 4.1 implement Chip Configuration
2
Version Register(0x0000).
3
1
4
Signed-off-by: Song Gao <gaosong@loongson.cn>
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Message-Id: <20230227071046.1445572-1-gaosong@loongson.cn>
7
---
8
target/loongarch/cpu.c | 2 ++
9
target/loongarch/cpu.h | 1 +
10
2 files changed, 3 insertions(+)
11
12
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/target/loongarch/cpu.c
15
+++ b/target/loongarch/cpu.c
16
@@ -XXX,XX +XXX,XX @@ static void loongarch_qemu_write(void *opaque, hwaddr addr,
17
static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)
18
{
19
switch (addr) {
20
+ case VERSION_REG:
21
+ return 0x11ULL;
22
case FEATURE_REG:
23
return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
24
1ULL << IOCSRF_CSRIPI;
25
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
26
index XXXXXXX..XXXXXXX 100644
27
--- a/target/loongarch/cpu.h
28
+++ b/target/loongarch/cpu.h
29
@@ -XXX,XX +XXX,XX @@
30
#define IOCSRF_GMOD 9
31
#define IOCSRF_VM 11
32
33
+#define VERSION_REG 0x0
34
#define FEATURE_REG 0x8
35
#define VENDOR_REG 0x10
36
#define CPUNAME_REG 0x20
37
--
38
2.31.1
diff view generated by jsdifflib
Deleted patch
1
For loongarch virt machine, add powerdown notification callback
2
and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add
3
acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this
4
patch.
5
1
6
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Signed-off-by: Song Gao <gaosong@loongson.cn>
8
Message-Id: <20230303010548.295580-1-gaosong@loongson.cn>
9
---
10
hw/loongarch/acpi-build.c | 1 +
11
hw/loongarch/virt.c | 12 ++++++++++++
12
include/hw/loongarch/virt.h | 1 +
13
3 files changed, 14 insertions(+)
14
15
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
16
index XXXXXXX..XXXXXXX 100644
17
--- a/hw/loongarch/acpi-build.c
18
+++ b/hw/loongarch/acpi-build.c
19
@@ -XXX,XX +XXX,XX @@ build_la_ged_aml(Aml *dsdt, MachineState *machine)
20
AML_SYSTEM_MEMORY,
21
VIRT_GED_MEM_ADDR);
22
}
23
+ acpi_dsdt_add_power_button(dsdt);
24
}
25
26
static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
27
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
28
index XXXXXXX..XXXXXXX 100644
29
--- a/hw/loongarch/virt.c
30
+++ b/hw/loongarch/virt.c
31
@@ -XXX,XX +XXX,XX @@ static void virt_machine_done(Notifier *notifier, void *data)
32
loongarch_acpi_setup(lams);
33
}
34
35
+static void virt_powerdown_req(Notifier *notifier, void *opaque)
36
+{
37
+ LoongArchMachineState *s = container_of(notifier,
38
+ LoongArchMachineState, powerdown_notifier);
39
+
40
+ acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
41
+}
42
+
43
struct memmap_entry {
44
uint64_t address;
45
uint64_t length;
46
@@ -XXX,XX +XXX,XX @@ static void loongarch_init(MachineState *machine)
47
VIRT_PLATFORM_BUS_IRQ);
48
lams->machine_done.notify = virt_machine_done;
49
qemu_add_machine_init_done_notifier(&lams->machine_done);
50
+ /* connect powerdown request */
51
+ lams->powerdown_notifier.notify = virt_powerdown_req;
52
+ qemu_register_powerdown_notifier(&lams->powerdown_notifier);
53
+
54
fdt_add_pcie_node(lams);
55
/*
56
* Since lowmem region starts from 0 and Linux kernel legacy start address
57
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
58
index XXXXXXX..XXXXXXX 100644
59
--- a/include/hw/loongarch/virt.h
60
+++ b/include/hw/loongarch/virt.h
61
@@ -XXX,XX +XXX,XX @@ struct LoongArchMachineState {
62
/* State for other subsystems/APIs: */
63
FWCfgState *fw_cfg;
64
Notifier machine_done;
65
+ Notifier powerdown_notifier;
66
OnOffAuto acpi;
67
char *oem_id;
68
char *oem_table_id;
69
--
70
2.31.1
71
72
diff view generated by jsdifflib