[v1] enable write_misa() and RISCV_FEATURE_* cleanups

[PATCH 03/11] target/riscv: remove RISCV_FEATURE_MISA

Posted by Daniel Henrique Barboza 2 years, 12 months ago

This enum is no longer used after write_misa() started reading the value
from cpu->cfg.misa_w.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/cpu.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 103963b386..6509ffa951 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -89,7 +89,6 @@ enum {
     RISCV_FEATURE_MMU,
     RISCV_FEATURE_PMP,
     RISCV_FEATURE_EPMP,
-    RISCV_FEATURE_MISA,
     RISCV_FEATURE_DEBUG
 };
 
-- 
2.39.1

Re: [PATCH 03/11] target/riscv: remove RISCV_FEATURE_MISA

Posted by weiwei 2 years, 11 months ago

On 2023/2/10 21:36, Daniel Henrique Barboza wrote:
> This enum is no longer used after write_misa() started reading the value
> from cpu->cfg.misa_w.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>r

Regards,

Weiwei Li

> ---
>   target/riscv/cpu.h | 1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 103963b386..6509ffa951 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -89,7 +89,6 @@ enum {
>       RISCV_FEATURE_MMU,
>       RISCV_FEATURE_PMP,
>       RISCV_FEATURE_EPMP,
> -    RISCV_FEATURE_MISA,
>       RISCV_FEATURE_DEBUG
>   };
>