MAINTAINERS | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)
6 months ago Stefan Pejic stepped in as nanoMIPS maintainer
(see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS
ISA support in QEMU"), however today his email is bouncing:
** Message blocked **
Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information.
The response from the remote server was:
550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com]
To avoid unmaintained code, I feel forced to merge this code
back with the generic MIPS section.
Historical references:
- https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/
- https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/
Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
MAINTAINERS | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 32e495e165..0ba3b589bf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -239,16 +239,10 @@ R: Jiaxun Yang <jiaxun.yang@flygoat.com>
R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: target/mips/
-F: disas/mips.c
+F: disas/*mips.c
F: docs/system/cpu-models-mips.rst.inc
F: tests/tcg/mips/
-MIPS TCG CPUs (nanoMIPS ISA)
-M: Stefan Pejic <stefan.pejic@syrmia.com>
-S: Maintained
-F: disas/nanomips.*
-F: target/mips/tcg/*nanomips*
-
NiosII TCG CPUs
M: Chris Wulff <crwulff@gmail.com>
M: Marek Vasut <marex@denx.de>
--
2.37.3
6 months ago Stefan Pejic stepped in as nanoMIPS maintainer (see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS ISA support in QEMU"), however today his email is bouncing: ** Message blocked ** Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information. Hi, Stefan is no longer working with us, but I will be more than happy to take maintaining the nanoMIPS ISA on me! Regards, Milica ________________________________ From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Sunday, October 30, 2022 11:50 PM To: qemu-devel@nongnu.org <qemu-devel@nongnu.org> Cc: Philippe Mathieu-Daudé <philmd@linaro.org>; Richard Henderson <richard.henderson@linaro.org>; Milica Lazarevic <Milica.Lazarevic@Syrmia.com>; Thomas Huth <thuth@redhat.com>; Jiaxun Yang <jiaxun.yang@flygoat.com>; Markus Armbruster <armbru@redhat.com>; Vince Del Vecchio <Vince.DelVecchio@mediatek.com> Subject: [PATCH] MAINTAINERS: Inherit from nanoMIPS 6 months ago Stefan Pejic stepped in as nanoMIPS maintainer (see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS ISA support in QEMU"), however today his email is bouncing: ** Message blocked ** Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information. The response from the remote server was: 550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com] To avoid unmaintained code, I feel forced to merge this code back with the generic MIPS section. Historical references: - https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/ - https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/ Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- MAINTAINERS | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 32e495e165..0ba3b589bf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -239,16 +239,10 @@ R: Jiaxun Yang <jiaxun.yang@flygoat.com> R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> S: Odd Fixes F: target/mips/ -F: disas/mips.c +F: disas/*mips.c F: docs/system/cpu-models-mips.rst.inc F: tests/tcg/mips/ -MIPS TCG CPUs (nanoMIPS ISA) -M: Stefan Pejic <stefan.pejic@syrmia.com> -S: Maintained -F: disas/nanomips.* -F: target/mips/tcg/*nanomips* - NiosII TCG CPUs M: Chris Wulff <crwulff@gmail.com> M: Marek Vasut <marex@denx.de> -- 2.37.3
Hi, Stefan is no longer working with us, but I will be more than happy to take maintaining the nanoMIPS ISA on me! Regards, Milica Any comments on this?
Milica Lazarevic <Milica.Lazarevic@Syrmia.com> writes: > Hi, > > Stefan is no longer working with us, but I will be more than happy to take maintaining the nanoMIPS ISA on me! > > Regards, > Milica > Any comments on this? Suggest you post a patch to update MAINTAINERS, with a suitable cc:.
On 1/12/22 11:24, Markus Armbruster wrote: > Milica Lazarevic <Milica.Lazarevic@Syrmia.com> writes: > >> Hi, >> >> Stefan is no longer working with us, but I will be more than happy to take maintaining the nanoMIPS ISA on me! >> >> Regards, >> Milica >> Any comments on this? > > Suggest you post a patch to update MAINTAINERS, with a suitable cc:. nanoMIPS depends on the generic MIPS infra, reviewing overall MIPS patches also helps.
On 10/31/22 09:50, Philippe Mathieu-Daudé wrote: > 6 months ago Stefan Pejic stepped in as nanoMIPS maintainer > (see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS > ISA support in QEMU"), however today his email is bouncing: > > ** Message blocked ** > > Your message tostefan.pejic@syrmia.com has been blocked. See technical details below for more information. > > The response from the remote server was: > 550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com] > > To avoid unmaintained code, I feel forced to merge this code > back with the generic MIPS section. > > Historical references: > -https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/ > -https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/ > > Cc: Vince Del Vecchio<Vince.DelVecchio@mediatek.com> > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > MAINTAINERS | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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