Load FDT table into dram memory space, and the addr is 2 MiB.
Since lowmem region starts from 0, FDT base address is located
at 2 MiB to avoid NULL pointer access.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
hw/loongarch/virt.c | 18 +++++++++++-------
include/hw/loongarch/virt.h | 3 ---
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 29df99727d..fe33e7e3e4 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -159,7 +159,6 @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
2, base_mmio, 2, size_mmio);
g_free(nodename);
- qemu_fdt_dumpdtb(ms->fdt, lams->fdt_size);
}
static void fdt_add_irqchip_node(LoongArchMachineState *lams)
@@ -689,6 +688,7 @@ static void loongarch_init(MachineState *machine)
MemoryRegion *address_space_mem = get_system_memory();
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
int i;
+ hwaddr fdt_base;
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -793,12 +793,16 @@ static void loongarch_init(MachineState *machine)
lams->machine_done.notify = virt_machine_done;
qemu_add_machine_init_done_notifier(&lams->machine_done);
fdt_add_pcie_node(lams);
-
- /* load fdt */
- MemoryRegion *fdt_rom = g_new(MemoryRegion, 1);
- memory_region_init_rom(fdt_rom, NULL, "fdt", VIRT_FDT_SIZE, &error_fatal);
- memory_region_add_subregion(get_system_memory(), VIRT_FDT_BASE, fdt_rom);
- rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, VIRT_FDT_BASE);
+ /*
+ * Since lowmem region starts from 0, FDT base address is located
+ * at 2 MiB to avoid NULL pointer access.
+ *
+ * Put the FDT into the memory map as a ROM image: this will ensure
+ * the FDT is copied again upon reset, even if addr points into RAM.
+ */
+ fdt_base = 2 * MiB;
+ qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
+ rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
}
bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 09f1c88ee5..45c383f5a7 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -28,9 +28,6 @@
#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
-#define VIRT_FDT_BASE 0x1c400000
-#define VIRT_FDT_SIZE 0x100000
-
struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
--
2.31.1
在 2022/10/28 上午9:40, Xiaojuan Yang 写道:
> Load FDT table into dram memory space, and the addr is 2 MiB.
> Since lowmem region starts from 0, FDT base address is located
> at 2 MiB to avoid NULL pointer access.
>
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
> hw/loongarch/virt.c | 18 +++++++++++-------
> include/hw/loongarch/virt.h | 3 ---
> 2 files changed, 11 insertions(+), 10 deletions(-)
Acked-by: Song Gao <gaosong@loongson.cn>
Thanks.
Song Gao
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 29df99727d..fe33e7e3e4 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -159,7 +159,6 @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
> 1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
> 2, base_mmio, 2, size_mmio);
> g_free(nodename);
> - qemu_fdt_dumpdtb(ms->fdt, lams->fdt_size);
> }
>
> static void fdt_add_irqchip_node(LoongArchMachineState *lams)
> @@ -689,6 +688,7 @@ static void loongarch_init(MachineState *machine)
> MemoryRegion *address_space_mem = get_system_memory();
> LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
> int i;
> + hwaddr fdt_base;
>
> if (!cpu_model) {
> cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
> @@ -793,12 +793,16 @@ static void loongarch_init(MachineState *machine)
> lams->machine_done.notify = virt_machine_done;
> qemu_add_machine_init_done_notifier(&lams->machine_done);
> fdt_add_pcie_node(lams);
> -
> - /* load fdt */
> - MemoryRegion *fdt_rom = g_new(MemoryRegion, 1);
> - memory_region_init_rom(fdt_rom, NULL, "fdt", VIRT_FDT_SIZE, &error_fatal);
> - memory_region_add_subregion(get_system_memory(), VIRT_FDT_BASE, fdt_rom);
> - rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, VIRT_FDT_BASE);
> + /*
> + * Since lowmem region starts from 0, FDT base address is located
> + * at 2 MiB to avoid NULL pointer access.
> + *
> + * Put the FDT into the memory map as a ROM image: this will ensure
> + * the FDT is copied again upon reset, even if addr points into RAM.
> + */
> + fdt_base = 2 * MiB;
> + qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
> + rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
> }
>
> bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
> diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
> index 09f1c88ee5..45c383f5a7 100644
> --- a/include/hw/loongarch/virt.h
> +++ b/include/hw/loongarch/virt.h
> @@ -28,9 +28,6 @@
> #define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
> #define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
>
> -#define VIRT_FDT_BASE 0x1c400000
> -#define VIRT_FDT_SIZE 0x100000
> -
> struct LoongArchMachineState {
> /*< private >*/
> MachineState parent_obj;
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