Changes for v6:
* Fix rebase error wrt xn bit extract.
Changes for v5:
* Rebase, including 12 patches.
* Add regime_is_stage2, which I should have done ages ago.
* Reorg attribute extraction/merging vs descriptor modifications.
Patches lacking review:
02-target-arm-Add-ptw_idx-to-S1Translate.patch
11-target-arm-Tidy-merging-of-attributes-from-descri.patch
13-target-arm-Implement-FEAT_HAFDBS-dirty-bit-portio.patch
r~
Richard Henderson (14):
target/arm: Introduce regime_is_stage2
target/arm: Add ptw_idx to S1Translate
target/arm: Add isar predicates for FEAT_HAFDBS
target/arm: Extract HA and HD in aa64_va_parameters
target/arm: Move S1_ptw_translate outside arm_ld[lq]_ptw
target/arm: Add ARMFault_UnsuppAtomicUpdate
target/arm: Remove loop from get_phys_addr_lpae
target/arm: Fix fault reporting in get_phys_addr_lpae
target/arm: Don't shift attrs in get_phys_addr_lpae
target/arm: Consider GP an attribute in get_phys_addr_lpae
target/arm: Tidy merging of attributes from descriptor and table
target/arm: Implement FEAT_HAFDBS, access flag portion
target/arm: Implement FEAT_HAFDBS, dirty bit portion
target/arm: Use the max page size in a 2-stage ptw
docs/system/arm/emulation.rst | 1 +
target/arm/cpu.h | 10 +
target/arm/internals.h | 11 +
target/arm/cpu64.c | 1 +
target/arm/helper.c | 22 +-
target/arm/ptw.c | 505 +++++++++++++++++++++++-----------
6 files changed, 380 insertions(+), 170 deletions(-)
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2.34.1