[PATCH] target/riscv: Implement PMU CSR predicate function for U-mode

Aurelien Jarno posted 1 patch 3 years, 5 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220902164649.4122331-1-aurelien@aurel32.net
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>
target/riscv/csr.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
[PATCH] target/riscv: Implement PMU CSR predicate function for U-mode
Posted by Aurelien Jarno 3 years, 5 months ago
Recently the Linux kernel started to use a non default value, for
the scounteren CSR, which is ignored by QEMU. Fix that by implementing
the PMU CSR predicate function for U-mode.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target/riscv/csr.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 235f2a011e..8aba1b35d9 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -137,6 +137,55 @@ static RISCVException ctr(CPURISCVState *env, int csrno)
                 break;
             }
         }
+    } else if (env->priv == PRV_U) {
+        switch (csrno) {
+        case CSR_CYCLE:
+            if (!get_field(env->scounteren, COUNTEREN_CY)) {
+                return RISCV_EXCP_ILLEGAL_INST;
+            }
+            break;
+        case CSR_TIME:
+            if (!get_field(env->scounteren, COUNTEREN_TM)) {
+                return RISCV_EXCP_ILLEGAL_INST;
+            }
+            break;
+        case CSR_INSTRET:
+            if (!get_field(env->scounteren, COUNTEREN_IR)) {
+                return RISCV_EXCP_ILLEGAL_INST;
+            }
+            break;
+        case CSR_HPMCOUNTER3...CSR_HPMCOUNTER31:
+            ctr_index = csrno - CSR_CYCLE;
+            if (!get_field(env->scounteren, 1 << ctr_index)) {
+                return RISCV_EXCP_ILLEGAL_INST;
+            }
+            break;
+        }
+        if (rv32) {
+            switch (csrno) {
+            case CSR_CYCLEH:
+                if (!get_field(env->scounteren, COUNTEREN_CY)) {
+                    return RISCV_EXCP_ILLEGAL_INST;
+                }
+                break;
+            case CSR_TIMEH:
+                if (!get_field(env->scounteren, COUNTEREN_TM)) {
+                    return RISCV_EXCP_ILLEGAL_INST;
+                }
+                break;
+            case CSR_INSTRETH:
+                if (!get_field(env->scounteren, COUNTEREN_IR)) {
+                    return RISCV_EXCP_ILLEGAL_INST;
+                }
+                break;
+            case CSR_HPMCOUNTER3H...CSR_HPMCOUNTER31H:
+                ctr_index = csrno - CSR_CYCLEH;
+                if (!get_field(env->scounteren, 1 << ctr_index)) {
+                    return RISCV_EXCP_ILLEGAL_INST;
+                }
+                break;
+            }
+        }
     }
 
     if (riscv_cpu_virt_enabled(env)) {
-- 
2.35.1
Re: [PATCH] target/riscv: Implement PMU CSR predicate function for U-mode
Posted by Aurelien Jarno 3 years, 5 months ago
On 2022-09-02 18:46, Aurelien Jarno wrote:
> Recently the Linux kernel started to use a non default value, for
> the scounteren CSR, which is ignored by QEMU. Fix that by implementing
> the PMU CSR predicate function for U-mode.
> 
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
>  target/riscv/csr.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 49 insertions(+)
> 

Please ignore that patch, I have been pointed out this is fixed by this
better patch that has been already reviewed:

https://www.mail-archive.com/qemu-devel@nongnu.org/msg906303.html

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net