Floating-point OE/UE exception bug

[PATCH 0/2] Floating-point OE/UE exception bug

Posted by Lucas Mateus Castro(alqotel) 3 years, 6 months ago

From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>

Changes in v2:
    - Completely reworked the solution:
        * Created re_bias in FloatFmt, it is 3/4 of the total exponent
          range of a FP type
        * Added rebias bools that dictates if the result should have
          its exponent add/subtract the re_bias value if an
          overflow/underflow occurs.
        * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset

The PowerISA defines that if an overflow exception happen with FPSCR.OE
set, the exponent of the intermediate result is subtracted 1536 in
double precision operations and is added 1536 in an underflow exception,
currently this behavior is not QEMU's behavior, this patch series fixes
that.

Currently there's no test in this patch series as there's no way to
disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
exception with OE/UE set causes a trapping exception.

Lucas Mateus Castro (alqotel) (2):
  fpu: Add rebias bool, value and operation
  target/ppc: Bugfix FP when OE/UE are set

 fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
 fpu/softfloat.c               |  2 ++
 include/fpu/softfloat-types.h |  4 ++++
 target/ppc/cpu.c              |  2 ++
 target/ppc/fpu_helper.c       |  2 --
 5 files changed, 27 insertions(+), 4 deletions(-)

-- 
2.31.1

Re: [PATCH 0/2] Floating-point OE/UE exception bug

Posted by Daniel Henrique Barboza 3 years, 6 months ago

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,


Daniel

On 8/5/22 11:15, Lucas Mateus Castro(alqotel) wrote:
> From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
> 
> Changes in v2:
>      - Completely reworked the solution:
>          * Created re_bias in FloatFmt, it is 3/4 of the total exponent
>            range of a FP type
>          * Added rebias bools that dictates if the result should have
>            its exponent add/subtract the re_bias value if an
>            overflow/underflow occurs.
>          * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset
> 
> The PowerISA defines that if an overflow exception happen with FPSCR.OE
> set, the exponent of the intermediate result is subtracted 1536 in
> double precision operations and is added 1536 in an underflow exception,
> currently this behavior is not QEMU's behavior, this patch series fixes
> that.
> 
> Currently there's no test in this patch series as there's no way to
> disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
> exception with OE/UE set causes a trapping exception.
> 
> Lucas Mateus Castro (alqotel) (2):
>    fpu: Add rebias bool, value and operation
>    target/ppc: Bugfix FP when OE/UE are set
> 
>   fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
>   fpu/softfloat.c               |  2 ++
>   include/fpu/softfloat-types.h |  4 ++++
>   target/ppc/cpu.c              |  2 ++
>   target/ppc/fpu_helper.c       |  2 --
>   5 files changed, 27 insertions(+), 4 deletions(-)
>

Re: [PATCH 0/2] Floating-point OE/UE exception bug

Posted by Richard Henderson 3 years, 6 months ago

On 8/5/22 07:15, Lucas Mateus Castro(alqotel) wrote:
> Currently there's no test in this patch series as there's no way to
> disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
> exception with OE/UE set causes a trapping exception.

You could check the value in the fp register in the signal handler.  The exception is 
supposed to occur after the register writeback.

r~

Re: [PATCH 0/2] Floating-point OE/UE exception bug

Posted by Lucas Mateus Martins Araujo e Castro 3 years, 6 months ago

It's missing from the title but this is a v2.

v1 id:
Message-Id: <20220803122217.20847-1-lucas.araujo@eldorado.org.br>

On 05/08/2022 11:15, Lucas Mateus Castro(alqotel) wrote:
> From: "Lucas Mateus Castro (alqotel)"<lucas.araujo@eldorado.org.br>
>
> Changes in v2:
>      - Completely reworked the solution:
>          * Created re_bias in FloatFmt, it is 3/4 of the total exponent
>            range of a FP type
>          * Added rebias bools that dictates if the result should have
>            its exponent add/subtract the re_bias value if an
>            overflow/underflow occurs.
>          * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset
>
> The PowerISA defines that if an overflow exception happen with FPSCR.OE
> set, the exponent of the intermediate result is subtracted 1536 in
> double precision operations and is added 1536 in an underflow exception,
> currently this behavior is not QEMU's behavior, this patch series fixes
> that.
>
> Currently there's no test in this patch series as there's no way to
> disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
> exception with OE/UE set causes a trapping exception.
>
> Lucas Mateus Castro (alqotel) (2):
>    fpu: Add rebias bool, value and operation
>    target/ppc: Bugfix FP when OE/UE are set
>
>   fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
>   fpu/softfloat.c               |  2 ++
>   include/fpu/softfloat-types.h |  4 ++++
>   target/ppc/cpu.c              |  2 ++
>   target/ppc/fpu_helper.c       |  2 --
>   5 files changed, 27 insertions(+), 4 deletions(-)
>
-- 
Lucas Mateus M. Araujo e Castro
Instituto de Pesquisas ELDORADO 
<https://www.eldorado.org.br/?utm_campaign=assinatura_de_e-mail&utm_medium=email&utm_source=RD+Station>
Departamento Computação Embarcada
Analista de Software Trainee
Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>

Re: [PATCH 0/2] Floating-point OE/UE exception bug

Posted by Alex Bennée 3 years, 6 months ago

"Lucas Mateus Castro(alqotel)" <lucas.araujo@eldorado.org.br> writes:

> From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
>
> Changes in v2:
>     - Completely reworked the solution:
>         * Created re_bias in FloatFmt, it is 3/4 of the total exponent
>           range of a FP type

I thought this might have an effect on the efficiency of the FloatFmt
extraction/packing but I couldn't see any real difference in fpbench. I
doubt the compiler can dead code it away if not used by a front-end.

Anyway have a:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

for the series.

>         * Added rebias bools that dictates if the result should have
>           its exponent add/subtract the re_bias value if an
>           overflow/underflow occurs.
>         * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset
>
> The PowerISA defines that if an overflow exception happen with FPSCR.OE
> set, the exponent of the intermediate result is subtracted 1536 in
> double precision operations and is added 1536 in an underflow exception,
> currently this behavior is not QEMU's behavior, this patch series fixes
> that.
>
> Currently there's no test in this patch series as there's no way to
> disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
> exception with OE/UE set causes a trapping exception.

Could you do it with a system mode test? Probably overkill for this
though. I suspect tweaking testfloat would be tricky.

>
> Lucas Mateus Castro (alqotel) (2):
>   fpu: Add rebias bool, value and operation
>   target/ppc: Bugfix FP when OE/UE are set
>
>  fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
>  fpu/softfloat.c               |  2 ++
>  include/fpu/softfloat-types.h |  4 ++++
>  target/ppc/cpu.c              |  2 ++
>  target/ppc/fpu_helper.c       |  2 --
>  5 files changed, 27 insertions(+), 4 deletions(-)


-- 
Alex Bennée

Re: [PATCH 0/2] Floating-point OE/UE exception bug

Posted by Lucas Mateus Martins Araujo e Castro 3 years, 6 months ago

On 05/08/2022 13:20, Alex Bennée wrote:
> "Lucas Mateus Castro(alqotel)"<lucas.araujo@eldorado.org.br>  writes:
>
>> From: "Lucas Mateus Castro (alqotel)"<lucas.araujo@eldorado.org.br>
>>
>> Changes in v2:
>>      - Completely reworked the solution:
>>          * Created re_bias in FloatFmt, it is 3/4 of the total exponent
>>            range of a FP type
> I thought this might have an effect on the efficiency of the FloatFmt
> extraction/packing but I couldn't see any real difference in fpbench. I
> doubt the compiler can dead code it away if not used by a front-end.
>
> Anyway have a:
>
> Reviewed-by: Alex Bennée<alex.bennee@linaro.org>
>
> for the series.
>
>>          * Added rebias bools that dictates if the result should have
>>            its exponent add/subtract the re_bias value if an
>>            overflow/underflow occurs.
>>          * ppc_store_fpscr sets/unsets rebias if OE/UE is set/unset
>>
>> The PowerISA defines that if an overflow exception happen with FPSCR.OE
>> set, the exponent of the intermediate result is subtracted 1536 in
>> double precision operations and is added 1536 in an underflow exception,
>> currently this behavior is not QEMU's behavior, this patch series fixes
>> that.
>>
>> Currently there's no test in this patch series as there's no way to
>> disable MSR.FE0 and MSR.FE1 in linux user, so any overflow/underflow
>> exception with OE/UE set causes a trapping exception.
> Could you do it with a system mode test? Probably overkill for this
> though. I suspect tweaking testfloat would be tricky.

Matheus currently has a patch to enable prctl, it still needs to change 
some places that have hardcoded values for linux-user 
(https://github.com/PPC64/qemu/tree/alqotel-ferst-prctl-patch has 
Matheus' patch and a patch to remove the ifdef from fp_exceptions_enabled).

With that change it should be possible to create a normal test for this 
(I sent a basic one along with v1, 
Message-Id=<20220803124324.23593-1-lucas.araujo@eldorado.org.br>) built 
on top of that branch.

Thanks,

>> Lucas Mateus Castro (alqotel) (2):
>>    fpu: Add rebias bool, value and operation
>>    target/ppc: Bugfix FP when OE/UE are set
>>
>>   fpu/softfloat-parts.c.inc     | 21 +++++++++++++++++++--
>>   fpu/softfloat.c               |  2 ++
>>   include/fpu/softfloat-types.h |  4 ++++
>>   target/ppc/cpu.c              |  2 ++
>>   target/ppc/fpu_helper.c       |  2 --
>>   5 files changed, 27 insertions(+), 4 deletions(-)
>
> --
> Alex Bennée
-- 
Lucas Mateus M. Araujo e Castro
Instituto de Pesquisas ELDORADO 
<https://www.eldorado.org.br/?utm_campaign=assinatura_de_e-mail&utm_medium=email&utm_source=RD+Station>
Departamento Computação Embarcada
Analista de Software Trainee
Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>