[PULL 0/3] target-arm queue
[PULL v2 00/25] target-arm queue
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Only thing for Arm for rc1 is RTH's fix for the KVM SVE probe code.
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v2: drop npcm7xx sdhci tests: new tests assert on some platforms.
2
2
3
-- PMM
3
-- PMM
4
4
5
The following changes since commit 4e06b3fc1b5e1ec03f22190eabe56891dc9c2236:
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The following changes since commit e670f6d825d4dee248b311197fd4048469d6772b:
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Merge tag 'pull-hex-20220731' of https://github.com/quic/qemu into staging (2022-07-31 21:38:54 -0700)
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Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220218' into staging (2022-02-20 15:05:41 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220801
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220221-1
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for you to fetch changes up to 5265d24c981dfdda8d29b44f7e84a514da75eedc:
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for you to fetch changes up to ca511604925eef8572e22ecbf0d3c758d7277924:
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target/arm: Move sve probe inside kvm >= 4.15 branch (2022-08-01 16:21:18 +0100)
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ui/cocoa: Fix the leak of qemu_console_get_label (2022-02-21 13:30:21 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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arm, cocoa and misc:
19
* Fix KVM SVE ID register probe code
19
* MAINTAINERS file updates
20
* Mark remaining global TypeInfo instances as const
21
* checkpatch: Ensure that TypeInfos are const
22
* arm hvf: Handle unknown ID registers as RES0
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* Make KVM -cpu max exactly like -cpu host
24
* Fix '-cpu max' for HVF
25
* Support PAuth extension for hvf
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* Kconfig: Add I2C_DEVICES device group
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* Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus
28
* hw/arm/armv7m: Handle disconnected clock inputs
29
* osdep.h: pull out various things into new header files
30
* hw/timer: fix a9gtimer vmstate
31
* hw/arm: add initial mori-bmc board
32
* ui/cocoa: Remove allowedFileTypes restriction in SavePanel
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* ui/cocoa: Do not alert even without block devices
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* ui/cocoa: Fix the leak of qemu_console_get_label
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35
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----------------------------------------------------------------
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----------------------------------------------------------------
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Richard Henderson (3):
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Akihiko Odaki (3):
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target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_features
38
MAINTAINERS: Add Akihiko Odaki to macOS-relateds
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target/arm: Set KVM_ARM_VCPU_SVE while probing the host
39
ui/cocoa: Do not alert even without block devices
25
target/arm: Move sve probe inside kvm >= 4.15 branch
40
ui/cocoa: Fix the leak of qemu_console_get_label
26
41
27
target/arm/kvm64.c | 45 ++++++++++++++++++++++-----------------------
42
Alexander Graf (2):
28
1 file changed, 22 insertions(+), 23 deletions(-)
43
hvf: arm: Use macros for sysreg shift/masking
44
hvf: arm: Handle unknown ID registers as RES0
45
46
Ani Sinha (1):
47
MAINTAINERS: Adding myself as a reviewer of some components
48
49
Bernhard Beschow (2):
50
Mark remaining global TypeInfo instances as const
51
checkpatch: Ensure that TypeInfos are const
52
53
Patrick Venture (1):
54
hw/arm: add initial mori-bmc board
55
56
Pavel Dovgalyuk (1):
57
hw/timer: fix a9gtimer vmstate
58
59
Peter Maydell (14):
60
target/arm: Move '-cpu host' code to cpu64.c
61
target/arm: Use aarch64_cpu_register() for 'host' CPU type
62
target/arm: Make KVM -cpu max exactly like -cpu host
63
target/arm: Unindent unnecessary else-clause
64
target/arm: Fix '-cpu max' for HVF
65
target/arm: Support PAuth extension for hvf
66
Kconfig: Add I2C_DEVICES device group
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Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus
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hw/arm/armv7m: Handle disconnected clock inputs
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include: Move qemu_madvise() and related #defines to new qemu/madvise.h
70
include: Move qemu_mprotect_*() to new qemu/mprotect.h
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include: Move QEMU_MAP_* constants to mmap-alloc.h
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include: Move qemu_[id]cache_* declarations to new qemu/cacheinfo.h
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include: Move hardware version declarations to new qemu/hw-version.h
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75
Philippe Mathieu-Daudé (1):
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ui/cocoa: Remove allowedFileTypes restriction in SavePanel
77
78
docs/devel/kconfig.rst | 8 +-
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docs/system/arm/nuvoton.rst | 1 +
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include/qemu/cacheinfo.h | 21 +++
81
include/qemu/hw-version.h | 27 ++++
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include/qemu/madvise.h | 95 +++++++++++++
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include/qemu/mmap-alloc.h | 23 +++
84
include/qemu/mprotect.h | 14 ++
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include/qemu/osdep.h | 132 ------------------
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accel/tcg/translate-all.c | 1 +
87
backends/hostmem-file.c | 1 +
88
backends/hostmem.c | 1 +
89
hw/arm/armv7m.c | 26 +++-
90
hw/arm/npcm7xx_boards.c | 32 +++++
91
hw/arm/nseries.c | 1 +
92
hw/core/generic-loader.c | 2 +-
93
hw/core/guest-loader.c | 2 +-
94
hw/display/bcm2835_fb.c | 2 +-
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hw/display/i2c-ddc.c | 2 +-
96
hw/display/macfb.c | 4 +-
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hw/display/virtio-vga.c | 2 +-
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hw/dma/bcm2835_dma.c | 2 +-
99
hw/i386/pc_piix.c | 2 +-
100
hw/i386/sgx-epc.c | 2 +-
101
hw/ide/core.c | 1 +
102
hw/intc/bcm2835_ic.c | 2 +-
103
hw/intc/bcm2836_control.c | 2 +-
104
hw/ipmi/ipmi.c | 4 +-
105
hw/mem/nvdimm.c | 2 +-
106
hw/mem/pc-dimm.c | 2 +-
107
hw/misc/bcm2835_mbox.c | 2 +-
108
hw/misc/bcm2835_powermgt.c | 2 +-
109
hw/misc/bcm2835_property.c | 2 +-
110
hw/misc/bcm2835_rng.c | 2 +-
111
hw/misc/pvpanic-isa.c | 2 +-
112
hw/misc/pvpanic-pci.c | 2 +-
113
hw/net/fsl_etsec/etsec.c | 2 +-
114
hw/ppc/prep_systemio.c | 2 +-
115
hw/ppc/spapr_iommu.c | 2 +-
116
hw/s390x/s390-pci-bus.c | 2 +-
117
hw/s390x/sclp.c | 2 +-
118
hw/s390x/tod-kvm.c | 2 +-
119
hw/s390x/tod-tcg.c | 2 +-
120
hw/s390x/tod.c | 2 +-
121
hw/scsi/lsi53c895a.c | 2 +-
122
hw/scsi/megasas.c | 1 +
123
hw/scsi/scsi-bus.c | 1 +
124
hw/scsi/scsi-disk.c | 1 +
125
hw/sd/allwinner-sdhost.c | 2 +-
126
hw/sd/aspeed_sdhci.c | 2 +-
127
hw/sd/bcm2835_sdhost.c | 2 +-
128
hw/sd/cadence_sdhci.c | 2 +-
129
hw/sd/npcm7xx_sdhci.c | 2 +-
130
hw/timer/a9gtimer.c | 21 +++
131
hw/usb/dev-mtp.c | 2 +-
132
hw/usb/host-libusb.c | 2 +-
133
hw/vfio/igd.c | 2 +-
134
hw/virtio/virtio-balloon.c | 1 +
135
hw/virtio/virtio-pmem.c | 2 +-
136
migration/postcopy-ram.c | 1 +
137
migration/qemu-file.c | 1 +
138
migration/ram.c | 1 +
139
plugins/loader.c | 1 +
140
qom/object.c | 4 +-
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softmmu/physmem.c | 1 +
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softmmu/vl.c | 1 +
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target/arm/cpu.c | 30 ----
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target/arm/cpu64.c | 331 ++++++++++++++++++++++++--------------------
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target/arm/hvf/hvf.c | 83 ++++++++---
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target/i386/cpu.c | 1 +
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target/s390x/cpu_models.c | 1 +
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tcg/region.c | 3 +
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tcg/tcg.c | 1 +
150
util/atomic64.c | 1 +
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util/cacheflush.c | 1 +
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util/cacheinfo.c | 1 +
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util/osdep.c | 3 +
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util/oslib-posix.c | 1 +
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MAINTAINERS | 5 +
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hw/arm/Kconfig | 10 ++
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hw/i2c/Kconfig | 5 +
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hw/rtc/Kconfig | 2 +
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hw/sensor/Kconfig | 5 +
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scripts/checkpatch.pl | 1 +
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ui/cocoa.m | 15 +-
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84 files changed, 606 insertions(+), 393 deletions(-)
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create mode 100644 include/qemu/cacheinfo.h
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create mode 100644 include/qemu/hw-version.h
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create mode 100644 include/qemu/madvise.h
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create mode 100644 include/qemu/mprotect.h
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diff view generated by jsdifflib
[PULL 1/3] target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_features
Deleted patch
1
From: Richard Henderson <richard.henderson@linaro.org>
2
1
3
Indication for support for SVE will not depend on whether we
4
perform the query on the main kvm_state or the temp vcpu.
5
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
Message-id: 20220726045828.53697-2-richard.henderson@linaro.org
8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
---
11
target/arm/kvm64.c | 2 +-
12
1 file changed, 1 insertion(+), 1 deletion(-)
13
14
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
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index XXXXXXX..XXXXXXX 100644
16
--- a/target/arm/kvm64.c
17
+++ b/target/arm/kvm64.c
18
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
19
}
20
}
21
22
- sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0;
23
+ sve_supported = kvm_arm_sve_supported();
24
25
/* Add feature bits that can't appear until after VCPU init. */
26
if (sve_supported) {
27
--
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2.25.1
diff view generated by jsdifflib
[PULL 2/3] target/arm: Set KVM_ARM_VCPU_SVE while probing the host
Deleted patch
1
From: Richard Henderson <richard.henderson@linaro.org>
2
1
3
Because we weren't setting this flag, our probe of ID_AA64ZFR0
4
was always returning zero. This also obviates the adjustment
5
of ID_AA64PFR0, which had sanitized the SVE field.
6
7
The effects of the bug are not visible, because the only thing that
8
ID_AA64ZFR0 is used for within qemu at present is tcg translation.
9
The other tests for SVE within KVM are via ID_AA64PFR0.SVE.
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11
Reported-by: Zenghui Yu <yuzenghui@huawei.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20220726045828.53697-3-richard.henderson@linaro.org
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
17
target/arm/kvm64.c | 27 +++++++++++++--------------
18
1 file changed, 13 insertions(+), 14 deletions(-)
19
20
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
21
index XXXXXXX..XXXXXXX 100644
22
--- a/target/arm/kvm64.c
23
+++ b/target/arm/kvm64.c
24
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
25
bool sve_supported;
26
bool pmu_supported = false;
27
uint64_t features = 0;
28
- uint64_t t;
29
int err;
30
31
/* Old kernels may not know about the PREFERRED_TARGET ioctl: however
32
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
33
struct kvm_vcpu_init init = { .target = -1, };
34
35
/*
36
- * Ask for Pointer Authentication if supported. We can't play the
37
- * SVE trick of synthesising the ID reg as KVM won't tell us
38
- * whether we have the architected or IMPDEF version of PAuth, so
39
- * we have to use the actual ID regs.
40
+ * Ask for SVE if supported, so that we can query ID_AA64ZFR0,
41
+ * which is otherwise RAZ.
42
+ */
43
+ sve_supported = kvm_arm_sve_supported();
44
+ if (sve_supported) {
45
+ init.features[0] |= 1 << KVM_ARM_VCPU_SVE;
46
+ }
47
+
48
+ /*
49
+ * Ask for Pointer Authentication if supported, so that we get
50
+ * the unsanitized field values for AA64ISAR1_EL1.
51
*/
52
if (kvm_arm_pauth_supported()) {
53
init.features[0] |= (1 << KVM_ARM_VCPU_PTRAUTH_ADDRESS |
54
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
55
}
56
}
57
58
- sve_supported = kvm_arm_sve_supported();
59
-
60
- /* Add feature bits that can't appear until after VCPU init. */
61
if (sve_supported) {
62
- t = ahcf->isar.id_aa64pfr0;
63
- t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
64
- ahcf->isar.id_aa64pfr0 = t;
65
-
66
/*
67
* There is a range of kernels between kernel commit 73433762fcae
68
* and f81cb2c3ad41 which have a bug where the kernel doesn't expose
69
* SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabled
70
- * SVE support, so we only read it here, rather than together with all
71
- * the other ID registers earlier.
72
+ * SVE support, which resulted in an error rather than RAZ.
73
+ * So only read the register if we set KVM_ARM_VCPU_SVE above.
74
*/
75
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
76
ARM64_SYS_REG(3, 0, 0, 4, 4));
77
--
78
2.25.1
diff view generated by jsdifflib
[PULL 3/3] target/arm: Move sve probe inside kvm >= 4.15 branch
Deleted patch
1
From: Richard Henderson <richard.henderson@linaro.org>
2
1
3
The test for the IF block indicates no ID registers are exposed, much
4
less host support for SVE. Move the SVE probe into the ELSE block.
5
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
Message-id: 20220726045828.53697-4-richard.henderson@linaro.org
8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
9
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
10
---
11
target/arm/kvm64.c | 22 +++++++++++-----------
12
1 file changed, 11 insertions(+), 11 deletions(-)
13
14
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
15
index XXXXXXX..XXXXXXX 100644
16
--- a/target/arm/kvm64.c
17
+++ b/target/arm/kvm64.c
18
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
19
err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
20
ARM64_SYS_REG(3, 3, 9, 12, 0));
21
}
22
- }
23
24
- if (sve_supported) {
25
- /*
26
- * There is a range of kernels between kernel commit 73433762fcae
27
- * and f81cb2c3ad41 which have a bug where the kernel doesn't expose
28
- * SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabled
29
- * SVE support, which resulted in an error rather than RAZ.
30
- * So only read the register if we set KVM_ARM_VCPU_SVE above.
31
- */
32
- err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
33
- ARM64_SYS_REG(3, 0, 0, 4, 4));
34
+ if (sve_supported) {
35
+ /*
36
+ * There is a range of kernels between kernel commit 73433762fcae
37
+ * and f81cb2c3ad41 which have a bug where the kernel doesn't
38
+ * expose SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has
39
+ * enabled SVE support, which resulted in an error rather than RAZ.
40
+ * So only read the register if we set KVM_ARM_VCPU_SVE above.
41
+ */
42
+ err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
43
+ ARM64_SYS_REG(3, 0, 0, 4, 4));
44
+ }
45
}
46
47
kvm_arm_destroy_scratch_host_vcpu(fdarray);
48
--
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2.25.1
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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