| 1 | Only thing for Arm for rc1 is RTH's fix for the KVM SVE probe code. | 1 | v1->v2 changes: fix a clang warning about bitfields; |
|---|---|---|---|
| 2 | drop a patch from Julia that I accidentally included | ||
| 3 | (it will likely be in a future series). | ||
| 2 | 4 | ||
| 3 | -- PMM | 5 | The following changes since commit a8d2b0685681e2f291faaa501efbbd76875f8ec8: |
| 4 | 6 | ||
| 5 | The following changes since commit 4e06b3fc1b5e1ec03f22190eabe56891dc9c2236: | 7 | Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190118' into staging (2019-01-18 16:56:15 +0000) |
| 6 | |||
| 7 | Merge tag 'pull-hex-20220731' of https://github.com/quic/qemu into staging (2022-07-31 21:38:54 -0700) | ||
| 8 | 8 | ||
| 9 | are available in the Git repository at: | 9 | are available in the Git repository at: |
| 10 | 10 | ||
| 11 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220801 | 11 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190121 |
| 12 | 12 | ||
| 13 | for you to fetch changes up to 5265d24c981dfdda8d29b44f7e84a514da75eedc: | 13 | for you to fetch changes up to 0d4bfd7df809863b1f45fad35229fb9419527d06: |
| 14 | 14 | ||
| 15 | target/arm: Move sve probe inside kvm >= 4.15 branch (2022-08-01 16:21:18 +0100) | 15 | target/arm: Implement PMSWINC (2019-01-21 10:38:56 +0000) |
| 16 | 16 | ||
| 17 | ---------------------------------------------------------------- | 17 | ---------------------------------------------------------------- |
| 18 | target-arm queue: | 18 | target-arm queue: |
| 19 | * Fix KVM SVE ID register probe code | 19 | * hw/char/stm32f2xx_usart: Do not update data register when device is disabled |
| 20 | * hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node | ||
| 21 | * target/arm: Allow Aarch32 exception return to switch from Mon->Hyp | ||
| 22 | * ftgmac100: implement the new MDIO interface on Aspeed SoC | ||
| 23 | * implement the ARMv8.3-PAuth extension | ||
| 24 | * improve emulation of the ARM PMU | ||
| 20 | 25 | ||
| 21 | ---------------------------------------------------------------- | 26 | ---------------------------------------------------------------- |
| 22 | Richard Henderson (3): | 27 | Aaron Lindsay (13): |
| 23 | target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_features | 28 | migration: Add post_save function to VMStateDescription |
| 24 | target/arm: Set KVM_ARM_VCPU_SVE while probing the host | 29 | target/arm: Reorganize PMCCNTR accesses |
| 25 | target/arm: Move sve probe inside kvm >= 4.15 branch | 30 | target/arm: Swap PMU values before/after migrations |
| 31 | target/arm: Filter cycle counter based on PMCCFILTR_EL0 | ||
| 32 | target/arm: Allow AArch32 access for PMCCFILTR | ||
| 33 | target/arm: Implement PMOVSSET | ||
| 34 | target/arm: Define FIELDs for ID_DFR0 | ||
| 35 | target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23] | ||
| 36 | target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 | ||
| 37 | target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER | ||
| 38 | target/arm: PMU: Add instruction and cycle events | ||
| 39 | target/arm: PMU: Set PMCR.N to 4 | ||
| 40 | target/arm: Implement PMSWINC | ||
| 26 | 41 | ||
| 27 | target/arm/kvm64.c | 45 ++++++++++++++++++++++----------------------- | 42 | Alexander Graf (1): |
| 28 | 1 file changed, 22 insertions(+), 23 deletions(-) | 43 | target/arm: Allow Aarch32 exception return to switch from Mon->Hyp |
| 44 | |||
| 45 | Cédric Le Goater (1): | ||
| 46 | ftgmac100: implement the new MDIO interface on Aspeed SoC | ||
| 47 | |||
| 48 | Eric Auger (1): | ||
| 49 | hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node | ||
| 50 | |||
| 51 | Philippe Mathieu-Daudé (1): | ||
| 52 | hw/char/stm32f2xx_usart: Do not update data register when device is disabled | ||
| 53 | |||
| 54 | Richard Henderson (31): | ||
| 55 | target/arm: Add state for the ARMv8.3-PAuth extension | ||
| 56 | target/arm: Add SCTLR bits through ARMv8.5 | ||
| 57 | target/arm: Add PAuth active bit to tbflags | ||
| 58 | target/arm: Introduce raise_exception_ra | ||
| 59 | target/arm: Add PAuth helpers | ||
| 60 | target/arm: Decode PAuth within system hint space | ||
| 61 | target/arm: Rearrange decode in disas_data_proc_1src | ||
| 62 | target/arm: Decode PAuth within disas_data_proc_1src | ||
| 63 | target/arm: Decode PAuth within disas_data_proc_2src | ||
| 64 | target/arm: Move helper_exception_return to helper-a64.c | ||
| 65 | target/arm: Add new_pc argument to helper_exception_return | ||
| 66 | target/arm: Rearrange decode in disas_uncond_b_reg | ||
| 67 | target/arm: Decode PAuth within disas_uncond_b_reg | ||
| 68 | target/arm: Decode Load/store register (pac) | ||
| 69 | target/arm: Move cpu_mmu_index out of line | ||
| 70 | target/arm: Introduce arm_mmu_idx | ||
| 71 | target/arm: Introduce arm_stage1_mmu_idx | ||
| 72 | target/arm: Create ARMVAParameters and helpers | ||
| 73 | target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII | ||
| 74 | target/arm: Export aa64_va_parameters to internals.h | ||
| 75 | target/arm: Add aa64_va_parameters_both | ||
| 76 | target/arm: Decode TBID from TCR | ||
| 77 | target/arm: Reuse aa64_va_parameters for setting tbflags | ||
| 78 | target/arm: Implement pauth_strip | ||
| 79 | target/arm: Implement pauth_auth | ||
| 80 | target/arm: Implement pauth_addpac | ||
| 81 | target/arm: Implement pauth_computepac | ||
| 82 | target/arm: Add PAuth system registers | ||
| 83 | target/arm: Enable PAuth for -cpu max | ||
| 84 | target/arm: Enable PAuth for user-only | ||
| 85 | target/arm: Tidy TBI handling in gen_a64_set_pc | ||
| 86 | |||
| 87 | target/arm/Makefile.objs | 1 + | ||
| 88 | include/hw/acpi/acpi-defs.h | 2 + | ||
| 89 | include/migration/vmstate.h | 1 + | ||
| 90 | target/arm/cpu.h | 244 +++++---- | ||
| 91 | target/arm/helper-a64.h | 14 + | ||
| 92 | target/arm/helper.h | 1 - | ||
| 93 | target/arm/internals.h | 77 +++ | ||
| 94 | target/arm/translate.h | 5 +- | ||
| 95 | hw/arm/virt-acpi-build.c | 1 + | ||
| 96 | hw/char/stm32f2xx_usart.c | 3 +- | ||
| 97 | hw/net/ftgmac100.c | 80 ++- | ||
| 98 | migration/vmstate.c | 13 +- | ||
| 99 | target/arm/cpu.c | 19 +- | ||
| 100 | target/arm/cpu64.c | 68 ++- | ||
| 101 | target/arm/helper-a64.c | 155 ++++++ | ||
| 102 | target/arm/helper.c | 1222 +++++++++++++++++++++++++++++++++---------- | ||
| 103 | target/arm/machine.c | 24 + | ||
| 104 | target/arm/op_helper.c | 174 +----- | ||
| 105 | target/arm/pauth_helper.c | 497 ++++++++++++++++++ | ||
| 106 | target/arm/translate-a64.c | 537 ++++++++++++++++--- | ||
| 107 | docs/devel/migration.rst | 9 +- | ||
| 108 | 21 files changed, 2515 insertions(+), 632 deletions(-) | ||
| 109 | create mode 100644 target/arm/pauth_helper.c | ||
| 110 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | Indication for support for SVE will not depend on whether we | ||
| 4 | perform the query on the main kvm_state or the temp vcpu. | ||
| 5 | |||
| 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 7 | Message-id: 20220726045828.53697-2-richard.henderson@linaro.org | ||
| 8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | --- | ||
| 11 | target/arm/kvm64.c | 2 +- | ||
| 12 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 13 | |||
| 14 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/arm/kvm64.c | ||
| 17 | +++ b/target/arm/kvm64.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
| 19 | } | ||
| 20 | } | ||
| 21 | |||
| 22 | - sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0; | ||
| 23 | + sve_supported = kvm_arm_sve_supported(); | ||
| 24 | |||
| 25 | /* Add feature bits that can't appear until after VCPU init. */ | ||
| 26 | if (sve_supported) { | ||
| 27 | -- | ||
| 28 | 2.25.1 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | Because we weren't setting this flag, our probe of ID_AA64ZFR0 | ||
| 4 | was always returning zero. This also obviates the adjustment | ||
| 5 | of ID_AA64PFR0, which had sanitized the SVE field. | ||
| 6 | |||
| 7 | The effects of the bug are not visible, because the only thing that | ||
| 8 | ID_AA64ZFR0 is used for within qemu at present is tcg translation. | ||
| 9 | The other tests for SVE within KVM are via ID_AA64PFR0.SVE. | ||
| 10 | |||
| 11 | Reported-by: Zenghui Yu <yuzenghui@huawei.com> | ||
| 12 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 13 | Message-id: 20220726045828.53697-3-richard.henderson@linaro.org | ||
| 14 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 16 | --- | ||
| 17 | target/arm/kvm64.c | 27 +++++++++++++-------------- | ||
| 18 | 1 file changed, 13 insertions(+), 14 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
| 21 | index XXXXXXX..XXXXXXX 100644 | ||
| 22 | --- a/target/arm/kvm64.c | ||
| 23 | +++ b/target/arm/kvm64.c | ||
| 24 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
| 25 | bool sve_supported; | ||
| 26 | bool pmu_supported = false; | ||
| 27 | uint64_t features = 0; | ||
| 28 | - uint64_t t; | ||
| 29 | int err; | ||
| 30 | |||
| 31 | /* Old kernels may not know about the PREFERRED_TARGET ioctl: however | ||
| 32 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
| 33 | struct kvm_vcpu_init init = { .target = -1, }; | ||
| 34 | |||
| 35 | /* | ||
| 36 | - * Ask for Pointer Authentication if supported. We can't play the | ||
| 37 | - * SVE trick of synthesising the ID reg as KVM won't tell us | ||
| 38 | - * whether we have the architected or IMPDEF version of PAuth, so | ||
| 39 | - * we have to use the actual ID regs. | ||
| 40 | + * Ask for SVE if supported, so that we can query ID_AA64ZFR0, | ||
| 41 | + * which is otherwise RAZ. | ||
| 42 | + */ | ||
| 43 | + sve_supported = kvm_arm_sve_supported(); | ||
| 44 | + if (sve_supported) { | ||
| 45 | + init.features[0] |= 1 << KVM_ARM_VCPU_SVE; | ||
| 46 | + } | ||
| 47 | + | ||
| 48 | + /* | ||
| 49 | + * Ask for Pointer Authentication if supported, so that we get | ||
| 50 | + * the unsanitized field values for AA64ISAR1_EL1. | ||
| 51 | */ | ||
| 52 | if (kvm_arm_pauth_supported()) { | ||
| 53 | init.features[0] |= (1 << KVM_ARM_VCPU_PTRAUTH_ADDRESS | | ||
| 54 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
| 55 | } | ||
| 56 | } | ||
| 57 | |||
| 58 | - sve_supported = kvm_arm_sve_supported(); | ||
| 59 | - | ||
| 60 | - /* Add feature bits that can't appear until after VCPU init. */ | ||
| 61 | if (sve_supported) { | ||
| 62 | - t = ahcf->isar.id_aa64pfr0; | ||
| 63 | - t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1); | ||
| 64 | - ahcf->isar.id_aa64pfr0 = t; | ||
| 65 | - | ||
| 66 | /* | ||
| 67 | * There is a range of kernels between kernel commit 73433762fcae | ||
| 68 | * and f81cb2c3ad41 which have a bug where the kernel doesn't expose | ||
| 69 | * SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabled | ||
| 70 | - * SVE support, so we only read it here, rather than together with all | ||
| 71 | - * the other ID registers earlier. | ||
| 72 | + * SVE support, which resulted in an error rather than RAZ. | ||
| 73 | + * So only read the register if we set KVM_ARM_VCPU_SVE above. | ||
| 74 | */ | ||
| 75 | err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0, | ||
| 76 | ARM64_SYS_REG(3, 0, 0, 4, 4)); | ||
| 77 | -- | ||
| 78 | 2.25.1 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
| 2 | 1 | ||
| 3 | The test for the IF block indicates no ID registers are exposed, much | ||
| 4 | less host support for SVE. Move the SVE probe into the ELSE block. | ||
| 5 | |||
| 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 7 | Message-id: 20220726045828.53697-4-richard.henderson@linaro.org | ||
| 8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 10 | --- | ||
| 11 | target/arm/kvm64.c | 22 +++++++++++----------- | ||
| 12 | 1 file changed, 11 insertions(+), 11 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/arm/kvm64.c | ||
| 17 | +++ b/target/arm/kvm64.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
| 19 | err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0, | ||
| 20 | ARM64_SYS_REG(3, 3, 9, 12, 0)); | ||
| 21 | } | ||
| 22 | - } | ||
| 23 | |||
| 24 | - if (sve_supported) { | ||
| 25 | - /* | ||
| 26 | - * There is a range of kernels between kernel commit 73433762fcae | ||
| 27 | - * and f81cb2c3ad41 which have a bug where the kernel doesn't expose | ||
| 28 | - * SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabled | ||
| 29 | - * SVE support, which resulted in an error rather than RAZ. | ||
| 30 | - * So only read the register if we set KVM_ARM_VCPU_SVE above. | ||
| 31 | - */ | ||
| 32 | - err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0, | ||
| 33 | - ARM64_SYS_REG(3, 0, 0, 4, 4)); | ||
| 34 | + if (sve_supported) { | ||
| 35 | + /* | ||
| 36 | + * There is a range of kernels between kernel commit 73433762fcae | ||
| 37 | + * and f81cb2c3ad41 which have a bug where the kernel doesn't | ||
| 38 | + * expose SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has | ||
| 39 | + * enabled SVE support, which resulted in an error rather than RAZ. | ||
| 40 | + * So only read the register if we set KVM_ARM_VCPU_SVE above. | ||
| 41 | + */ | ||
| 42 | + err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0, | ||
| 43 | + ARM64_SYS_REG(3, 0, 0, 4, 4)); | ||
| 44 | + } | ||
| 45 | } | ||
| 46 | |||
| 47 | kvm_arm_destroy_scratch_host_vcpu(fdarray); | ||
| 48 | -- | ||
| 49 | 2.25.1 | diff view generated by jsdifflib |