hw/riscv/boot.c | 4 +--- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/shakti_c.c | 3 +-- hw/riscv/spike.c | 2 +- hw/riscv/virt.c | 2 +- include/hw/riscv/boot.h | 2 +- 6 files changed, 6 insertions(+), 9 deletions(-)
The 'fdt' param is not being used in riscv_setup_rom_reset_vec().
Simplify the API by removing it. While we're at it, remove the redundant
'return' statement at the end of function.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Cc: Vijai Kumar K <vijai@behindbytes.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/riscv/boot.c | 4 +---
hw/riscv/microchip_pfsoc.c | 2 +-
hw/riscv/shakti_c.c | 3 +--
hw/riscv/spike.c | 2 +-
hw/riscv/virt.c | 2 +-
include/hw/riscv/boot.h | 2 +-
6 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 06b4fc5ac3..1ae7596873 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -286,7 +286,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts
hwaddr start_addr,
hwaddr rom_base, hwaddr rom_size,
uint64_t kernel_entry,
- uint64_t fdt_load_addr, void *fdt)
+ uint64_t fdt_load_addr)
{
int i;
uint32_t start_addr_hi32 = 0x00000000;
@@ -326,8 +326,6 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts
rom_base, &address_space_memory);
riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec),
kernel_entry);
-
- return;
}
void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr)
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 10a5d0e501..7313153606 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -583,7 +583,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, firmware_load_addr,
memmap[MICROCHIP_PFSOC_ENVM_DATA].base,
memmap[MICROCHIP_PFSOC_ENVM_DATA].size,
- kernel_entry, fdt_load_addr, machine->fdt);
+ kernel_entry, fdt_load_addr);
}
}
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 90e2cf609f..e43cc9445c 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -66,8 +66,7 @@ static void shakti_c_machine_state_init(MachineState *mstate)
riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus,
shakti_c_memmap[SHAKTI_C_RAM].base,
shakti_c_memmap[SHAKTI_C_ROM].base,
- shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0,
- NULL);
+ shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0);
if (mstate->firmware) {
riscv_load_firmware(mstate->firmware,
shakti_c_memmap[SHAKTI_C_RAM].base,
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index e41b6aa9f0..5ba34543c8 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -308,7 +308,7 @@ static void spike_board_init(MachineState *machine)
riscv_setup_rom_reset_vec(machine, &s->soc[0], memmap[SPIKE_DRAM].base,
memmap[SPIKE_MROM].base,
memmap[SPIKE_MROM].size, kernel_entry,
- fdt_load_addr, s->fdt);
+ fdt_load_addr);
/* initialize HTIF using symbols found in load_kernel */
htif_mm_init(system_memory, mask_rom,
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index bc424dd2f5..2e9ed2628c 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1299,7 +1299,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr,
virt_memmap[VIRT_MROM].base,
virt_memmap[VIRT_MROM].size, kernel_entry,
- fdt_load_addr, machine->fdt);
+ fdt_load_addr);
/*
* Only direct boot kernel is currently supported for KVM VM,
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index d2db29721a..a36f7618f5 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -51,7 +51,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts
hwaddr saddr,
hwaddr rom_base, hwaddr rom_size,
uint64_t kernel_entry,
- uint64_t fdt_load_addr, void *fdt);
+ uint64_t fdt_load_addr);
void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base,
hwaddr rom_size,
uint32_t reset_vec_size,
--
2.36.1
On Fri, Jul 29, 2022 at 4:19 AM Daniel Henrique Barboza <danielhb413@gmail.com> wrote: > > The 'fdt' param is not being used in riscv_setup_rom_reset_vec(). > Simplify the API by removing it. While we're at it, remove the redundant > 'return' statement at the end of function. > > Cc: Palmer Dabbelt <palmer@dabbelt.com> > Cc: Alistair Francis <alistair.francis@wdc.com> > Cc: Bin Meng <bin.meng@windriver.com> > Cc: Vijai Kumar K <vijai@behindbytes.com> > Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > hw/riscv/boot.c | 4 +--- > hw/riscv/microchip_pfsoc.c | 2 +- > hw/riscv/shakti_c.c | 3 +-- > hw/riscv/spike.c | 2 +- > hw/riscv/virt.c | 2 +- > include/hw/riscv/boot.h | 2 +- > 6 files changed, 6 insertions(+), 9 deletions(-) > > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c > index 06b4fc5ac3..1ae7596873 100644 > --- a/hw/riscv/boot.c > +++ b/hw/riscv/boot.c > @@ -286,7 +286,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > hwaddr start_addr, > hwaddr rom_base, hwaddr rom_size, > uint64_t kernel_entry, > - uint64_t fdt_load_addr, void *fdt) > + uint64_t fdt_load_addr) > { > int i; > uint32_t start_addr_hi32 = 0x00000000; > @@ -326,8 +326,6 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > rom_base, &address_space_memory); > riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec), > kernel_entry); > - > - return; > } > > void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr) > diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c > index 10a5d0e501..7313153606 100644 > --- a/hw/riscv/microchip_pfsoc.c > +++ b/hw/riscv/microchip_pfsoc.c > @@ -583,7 +583,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) > riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, firmware_load_addr, > memmap[MICROCHIP_PFSOC_ENVM_DATA].base, > memmap[MICROCHIP_PFSOC_ENVM_DATA].size, > - kernel_entry, fdt_load_addr, machine->fdt); > + kernel_entry, fdt_load_addr); > } > } > > diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c > index 90e2cf609f..e43cc9445c 100644 > --- a/hw/riscv/shakti_c.c > +++ b/hw/riscv/shakti_c.c > @@ -66,8 +66,7 @@ static void shakti_c_machine_state_init(MachineState *mstate) > riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus, > shakti_c_memmap[SHAKTI_C_RAM].base, > shakti_c_memmap[SHAKTI_C_ROM].base, > - shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0, > - NULL); > + shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0); > if (mstate->firmware) { > riscv_load_firmware(mstate->firmware, > shakti_c_memmap[SHAKTI_C_RAM].base, > diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c > index e41b6aa9f0..5ba34543c8 100644 > --- a/hw/riscv/spike.c > +++ b/hw/riscv/spike.c > @@ -308,7 +308,7 @@ static void spike_board_init(MachineState *machine) > riscv_setup_rom_reset_vec(machine, &s->soc[0], memmap[SPIKE_DRAM].base, > memmap[SPIKE_MROM].base, > memmap[SPIKE_MROM].size, kernel_entry, > - fdt_load_addr, s->fdt); > + fdt_load_addr); > > /* initialize HTIF using symbols found in load_kernel */ > htif_mm_init(system_memory, mask_rom, > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index bc424dd2f5..2e9ed2628c 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -1299,7 +1299,7 @@ static void virt_machine_done(Notifier *notifier, void *data) > riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, > virt_memmap[VIRT_MROM].base, > virt_memmap[VIRT_MROM].size, kernel_entry, > - fdt_load_addr, machine->fdt); > + fdt_load_addr); > > /* > * Only direct boot kernel is currently supported for KVM VM, > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h > index d2db29721a..a36f7618f5 100644 > --- a/include/hw/riscv/boot.h > +++ b/include/hw/riscv/boot.h > @@ -51,7 +51,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > hwaddr saddr, > hwaddr rom_base, hwaddr rom_size, > uint64_t kernel_entry, > - uint64_t fdt_load_addr, void *fdt); > + uint64_t fdt_load_addr); > void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base, > hwaddr rom_size, > uint32_t reset_vec_size, > -- > 2.36.1 > >
On Fri, Jul 29, 2022 at 4:19 AM Daniel Henrique Barboza <danielhb413@gmail.com> wrote: > > The 'fdt' param is not being used in riscv_setup_rom_reset_vec(). > Simplify the API by removing it. While we're at it, remove the redundant > 'return' statement at the end of function. > > Cc: Palmer Dabbelt <palmer@dabbelt.com> > Cc: Alistair Francis <alistair.francis@wdc.com> > Cc: Bin Meng <bin.meng@windriver.com> > Cc: Vijai Kumar K <vijai@behindbytes.com> > Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/boot.c | 4 +--- > hw/riscv/microchip_pfsoc.c | 2 +- > hw/riscv/shakti_c.c | 3 +-- > hw/riscv/spike.c | 2 +- > hw/riscv/virt.c | 2 +- > include/hw/riscv/boot.h | 2 +- > 6 files changed, 6 insertions(+), 9 deletions(-) > > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c > index 06b4fc5ac3..1ae7596873 100644 > --- a/hw/riscv/boot.c > +++ b/hw/riscv/boot.c > @@ -286,7 +286,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > hwaddr start_addr, > hwaddr rom_base, hwaddr rom_size, > uint64_t kernel_entry, > - uint64_t fdt_load_addr, void *fdt) > + uint64_t fdt_load_addr) > { > int i; > uint32_t start_addr_hi32 = 0x00000000; > @@ -326,8 +326,6 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > rom_base, &address_space_memory); > riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec), > kernel_entry); > - > - return; > } > > void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr) > diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c > index 10a5d0e501..7313153606 100644 > --- a/hw/riscv/microchip_pfsoc.c > +++ b/hw/riscv/microchip_pfsoc.c > @@ -583,7 +583,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) > riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, firmware_load_addr, > memmap[MICROCHIP_PFSOC_ENVM_DATA].base, > memmap[MICROCHIP_PFSOC_ENVM_DATA].size, > - kernel_entry, fdt_load_addr, machine->fdt); > + kernel_entry, fdt_load_addr); > } > } > > diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c > index 90e2cf609f..e43cc9445c 100644 > --- a/hw/riscv/shakti_c.c > +++ b/hw/riscv/shakti_c.c > @@ -66,8 +66,7 @@ static void shakti_c_machine_state_init(MachineState *mstate) > riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus, > shakti_c_memmap[SHAKTI_C_RAM].base, > shakti_c_memmap[SHAKTI_C_ROM].base, > - shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0, > - NULL); > + shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0); > if (mstate->firmware) { > riscv_load_firmware(mstate->firmware, > shakti_c_memmap[SHAKTI_C_RAM].base, > diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c > index e41b6aa9f0..5ba34543c8 100644 > --- a/hw/riscv/spike.c > +++ b/hw/riscv/spike.c > @@ -308,7 +308,7 @@ static void spike_board_init(MachineState *machine) > riscv_setup_rom_reset_vec(machine, &s->soc[0], memmap[SPIKE_DRAM].base, > memmap[SPIKE_MROM].base, > memmap[SPIKE_MROM].size, kernel_entry, > - fdt_load_addr, s->fdt); > + fdt_load_addr); > > /* initialize HTIF using symbols found in load_kernel */ > htif_mm_init(system_memory, mask_rom, > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index bc424dd2f5..2e9ed2628c 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -1299,7 +1299,7 @@ static void virt_machine_done(Notifier *notifier, void *data) > riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, > virt_memmap[VIRT_MROM].base, > virt_memmap[VIRT_MROM].size, kernel_entry, > - fdt_load_addr, machine->fdt); > + fdt_load_addr); > > /* > * Only direct boot kernel is currently supported for KVM VM, > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h > index d2db29721a..a36f7618f5 100644 > --- a/include/hw/riscv/boot.h > +++ b/include/hw/riscv/boot.h > @@ -51,7 +51,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts > hwaddr saddr, > hwaddr rom_base, hwaddr rom_size, > uint64_t kernel_entry, > - uint64_t fdt_load_addr, void *fdt); > + uint64_t fdt_load_addr); > void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base, > hwaddr rom_size, > uint32_t reset_vec_size, > -- > 2.36.1 > >
On Fri, Jul 29, 2022 at 2:19 AM Daniel Henrique Barboza <danielhb413@gmail.com> wrote: > > The 'fdt' param is not being used in riscv_setup_rom_reset_vec(). > Simplify the API by removing it. While we're at it, remove the redundant > 'return' statement at the end of function. > > Cc: Palmer Dabbelt <palmer@dabbelt.com> > Cc: Alistair Francis <alistair.francis@wdc.com> > Cc: Bin Meng <bin.meng@windriver.com> > Cc: Vijai Kumar K <vijai@behindbytes.com> > Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> > --- > hw/riscv/boot.c | 4 +--- > hw/riscv/microchip_pfsoc.c | 2 +- > hw/riscv/shakti_c.c | 3 +-- > hw/riscv/spike.c | 2 +- > hw/riscv/virt.c | 2 +- > include/hw/riscv/boot.h | 2 +- > 6 files changed, 6 insertions(+), 9 deletions(-) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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