[PATCH V3 0/6] Improve the U/S/H extension related check

Weiwei Li posted 6 patches 1 year, 10 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220718130955.11899-1-liweiwei@iscas.ac.cn
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>
target/riscv/cpu.c |  17 ++
target/riscv/csr.c | 490 ++++++++++++++++++++++++---------------------
2 files changed, 278 insertions(+), 229 deletions(-)
[PATCH V3 0/6] Improve the U/S/H extension related check
Posted by Weiwei Li 1 year, 10 months ago
This patchset tries to improve the U/S/H related check:
* add check for the supported privilege modes conbinations: only supporting M,
S mode is not a suggested combination
* add check for "H extension depends on I extension"
* add check for "H extension implicitly requires S mode"
* add check for csrs only existed when U mode is supported
* fix and simplify the checks in hmode/hmode32

Any suggestions are welcome.

v3:
* Fix the issues suggested by Andrew Jones in commit messages

v2:
* update patch 3 to make the newlines start at the same position as above line
* update patch 5 to add check for "H extension implicitly requires S mode"

Weiwei Li (6):
  target/riscv: Add check for supported privilege mode combinations
  target/riscv: H extension depends on I extension
  target/riscv: Fix checkpatch warning may triggered in csr_ops table
  target/riscv: Add check for csrs existed with U extension
  target/riscv: Fix checks in hmode/hmode32
  target/riscv: Simplify the check in hmode to resue the check in
    riscv_csrrw_check

 target/riscv/cpu.c |  17 ++
 target/riscv/csr.c | 490 ++++++++++++++++++++++++---------------------
 2 files changed, 278 insertions(+), 229 deletions(-)

-- 
2.17.1
Re: [PATCH V3 0/6] Improve the U/S/H extension related check
Posted by Alistair Francis 1 year, 10 months ago
On Mon, Jul 18, 2022 at 11:10 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> This patchset tries to improve the U/S/H related check:
> * add check for the supported privilege modes conbinations: only supporting M,
> S mode is not a suggested combination
> * add check for "H extension depends on I extension"
> * add check for "H extension implicitly requires S mode"
> * add check for csrs only existed when U mode is supported
> * fix and simplify the checks in hmode/hmode32
>
> Any suggestions are welcome.
>
> v3:
> * Fix the issues suggested by Andrew Jones in commit messages
>
> v2:
> * update patch 3 to make the newlines start at the same position as above line
> * update patch 5 to add check for "H extension implicitly requires S mode"
>
> Weiwei Li (6):
>   target/riscv: Add check for supported privilege mode combinations
>   target/riscv: H extension depends on I extension
>   target/riscv: Fix checkpatch warning may triggered in csr_ops table
>   target/riscv: Add check for csrs existed with U extension
>   target/riscv: Fix checks in hmode/hmode32
>   target/riscv: Simplify the check in hmode to resue the check in
>     riscv_csrrw_check

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu.c |  17 ++
>  target/riscv/csr.c | 490 ++++++++++++++++++++++++---------------------
>  2 files changed, 278 insertions(+), 229 deletions(-)
>
> --
> 2.17.1
>
>