[PATCH 0/2] target/arm: Two SME fixes

Richard Henderson posted 2 patches 3 years, 7 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220713045848.217364-1-richard.henderson@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.c | 41 +++++++++++++++++++++++++++++++++--------
1 file changed, 33 insertions(+), 8 deletions(-)
[PATCH 0/2] target/arm: Two SME fixes
Posted by Richard Henderson 3 years, 7 months ago
Ho hum.  Let a feature loose on users and they find bugs.  Mark noticed
that the wrong value was being picked up for VL when SVE is disabled.
I had run the same test but failed to notice the vector length wasn't
as expected, though the test otherwise produced expected results.


r~


Richard Henderson (2):
  target/arm: Fill in VL for tbflags when SME enabled and SVE disabled
  target/arm: Fix aarch64_sve_change_el for SME

 target/arm/helper.c | 41 +++++++++++++++++++++++++++++++++--------
 1 file changed, 33 insertions(+), 8 deletions(-)

-- 
2.34.1
Re: [PATCH 0/2] target/arm: Two SME fixes
Posted by Peter Maydell 3 years, 6 months ago
On Wed, 13 Jul 2022 at 05:59, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Ho hum.  Let a feature loose on users and they find bugs.  Mark noticed
> that the wrong value was being picked up for VL when SVE is disabled.
> I had run the same test but failed to notice the vector length wasn't
> as expected, though the test otherwise produced expected results.
>
>



Applied to target-arm.next, thanks.

-- PMM