target/riscv: Fixes for Ibex and OpenTitan

[PATCH 0/2] target/riscv: Fixes for Ibex and OpenTitan

Alistair Francis posted 2 patches 3 years, 7 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20220629233102.275181-1-alistair.francis@opensource.wdc.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>

target/riscv/cpu.c | 2 +-
target/riscv/csr.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

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[PATCH 0/2] target/riscv: Fixes for Ibex and OpenTitan

Posted by Alistair Francis 3 years, 7 months ago

From: Alistair Francis <alistair.francis@wdc.com>

This fixes some issues discovered on the Ibex SoC when running OpenTitan tests.

Alistair Francis (2):
  target/riscv: Fixup MSECCFG minimum priv check
  target/riscv: Ibex: Support priv version 1.11

 target/riscv/cpu.c | 2 +-
 target/riscv/csr.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

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2.36.1