[PATCH 0/2] Add Block Protect (BP) and Top Bottom (TB) bits for write protect

Iris Chen posted 2 patches 3 years, 7 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220627185234.1911337-1-irischenlj@fb.com
Maintainers: Alistair Francis <alistair@alistair23.me>, Kevin Wolf <kwolf@redhat.com>, Hanna Reitz <hreitz@redhat.com>, "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Andrew Jeffery <andrew@aj.id.au>, Joel Stanley <joel@jms.id.au>, Thomas Huth <thuth@redhat.com>, Laurent Vivier <lvivier@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>
hw/block/m25p80.c             |  74 +++++++++++++++++++----
tests/qtest/aspeed_smc-test.c | 111 ++++++++++++++++++++++++++++++++++
2 files changed, 173 insertions(+), 12 deletions(-)
[PATCH 0/2] Add Block Protect (BP) and Top Bottom (TB) bits for write protect
Posted by Iris Chen 3 years, 7 months ago
Hey everyone,

Adding the 3 block protection bits and top bottom bits which configure which parts
of the flash are writable and read-only.

These patches are based on previous patches I just submitted:
hw: m25p80: fixing individual test failure when tests are running in isolation
hw: m25p80: add WP# pin and SRWD bit for write protection
hw: m25p80: add tests for write protect (WP# and SRWD bit)

The tests that were added iterates through every different memory protection
case so it takes a little longer to run. Let me know what you think about that
and if that's okay or not.

Thanks,
Iris

Iris Chen (2):
  hw: m25p80: Add Block Protect and Top Bottom bits for write protect
  hw: m25p80: add tests for BP and TB bit write protect

 hw/block/m25p80.c             |  74 +++++++++++++++++++----
 tests/qtest/aspeed_smc-test.c | 111 ++++++++++++++++++++++++++++++++++
 2 files changed, 173 insertions(+), 12 deletions(-)

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2.30.2