Change the parent type of the PnvPHB4 device to TYPE_PARENT since the
PCI bus is going to be initialized by the PnvPHB parent. Functions that
needs to access the bus via a PnvPHB4 object can do so via the
phb4->phb_base pointer.
pnv_phb4_pec now creates a PnvPHB object.
The powernv9 machine class will create PnvPHB devices with version '4'.
powernv10 will create using version '5'. Both are using global machine
properties in their class_init() to do that.
These changes will benefit us when adding PnvPHB user creatable devices
for powernv9 and powernv10.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/pci-host/pnv_phb4.c | 30 +++++-------------------------
hw/pci-host/pnv_phb4_pec.c | 3 +--
hw/ppc/pnv.c | 20 +++++++++++++++++++-
include/hw/pci-host/pnv_phb4.h | 5 ++++-
4 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index a7a4519f30..74cf62dc1a 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -49,7 +49,7 @@ static inline uint64_t SETFIELD(uint64_t mask, uint64_t word,
static PCIDevice *pnv_phb4_find_cfg_dev(PnvPHB4 *phb)
{
- PCIHostState *pci = PCI_HOST_BRIDGE(phb);
+ PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);
uint64_t addr = phb->regs[PHB_CONFIG_ADDRESS >> 3];
uint8_t bus, devfn;
@@ -145,7 +145,7 @@ static uint64_t pnv_phb4_config_read(PnvPHB4 *phb, unsigned off,
static void pnv_phb4_rc_config_write(PnvPHB4 *phb, unsigned off,
unsigned size, uint64_t val)
{
- PCIHostState *pci = PCI_HOST_BRIDGE(phb);
+ PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);
PCIDevice *pdev;
if (size != 4) {
@@ -166,7 +166,7 @@ static void pnv_phb4_rc_config_write(PnvPHB4 *phb, unsigned off,
static uint64_t pnv_phb4_rc_config_read(PnvPHB4 *phb, unsigned off,
unsigned size)
{
- PCIHostState *pci = PCI_HOST_BRIDGE(phb);
+ PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);
PCIDevice *pdev;
uint64_t val;
@@ -1574,8 +1574,6 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb)
static void pnv_phb4_realize(DeviceState *dev, Error **errp)
{
PnvPHB4 *phb = PNV_PHB4(dev);
- PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(phb->pec);
- PCIHostState *pci = PCI_HOST_BRIDGE(dev);
XiveSource *xsrc = &phb->xsrc;
int nr_irqs;
char name[32];
@@ -1589,12 +1587,6 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp)
memory_region_init_io(&phb->mr_regs, OBJECT(phb), &pnv_phb4_reg_ops, phb,
name, 0x2000);
- pnv_phb4_bus_init(dev, phb);
-
- /* Add a single Root port if running with defaults */
- pnv_phb_attach_root_port(pci, pecc->rp_model,
- phb->phb_id, phb->chip_id);
-
/* Setup XIVE Source */
if (phb->big_phb) {
nr_irqs = PNV_PHB4_MAX_INTs;
@@ -1614,16 +1606,6 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp)
pnv_phb4_xscom_realize(phb);
}
-static const char *pnv_phb4_root_bus_path(PCIHostState *host_bridge,
- PCIBus *rootbus)
-{
- PnvPHB4 *phb = PNV_PHB4(host_bridge);
-
- snprintf(phb->bus_path, sizeof(phb->bus_path), "00%02x:%02x",
- phb->chip_id, phb->phb_id);
- return phb->bus_path;
-}
-
/*
* Address base trigger mode (POWER10)
*
@@ -1708,19 +1690,17 @@ static Property pnv_phb4_properties[] = {
DEFINE_PROP_UINT32("chip-id", PnvPHB4, chip_id, 0),
DEFINE_PROP_LINK("pec", PnvPHB4, pec, TYPE_PNV_PHB4_PEC,
PnvPhb4PecState *),
+ DEFINE_PROP_LINK("phb-base", PnvPHB4, phb_base, TYPE_PNV_PHB, PnvPHB *),
DEFINE_PROP_END_OF_LIST(),
};
static void pnv_phb4_class_init(ObjectClass *klass, void *data)
{
- PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
XiveNotifierClass *xfc = XIVE_NOTIFIER_CLASS(klass);
- hc->root_bus_path = pnv_phb4_root_bus_path;
dc->realize = pnv_phb4_realize;
device_class_set_props(dc, pnv_phb4_properties);
- set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
dc->user_creatable = false;
xfc->notify = pnv_phb4_xive_notify;
@@ -1728,7 +1708,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, void *data)
static const TypeInfo pnv_phb4_type_info = {
.name = TYPE_PNV_PHB4,
- .parent = TYPE_PCIE_HOST_BRIDGE,
+ .parent = TYPE_DEVICE,
.instance_init = pnv_phb4_instance_init,
.instance_size = sizeof(PnvPHB4),
.class_init = pnv_phb4_class_init,
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index c9aaf1c28e..4a0a9fbe8b 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -115,8 +115,7 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
int stack_no,
Error **errp)
{
- PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
- PnvPHB4 *phb = PNV_PHB4(qdev_new(pecc->phb_type));
+ PnvPHB *phb = PNV_PHB(qdev_new(TYPE_PNV_PHB));
int phb_id = pnv_phb4_pec_get_phb_id(pec, stack_no);
object_property_add_child(OBJECT(pec), "phb[*]", OBJECT(phb));
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 1df91971b8..b7273f386e 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -672,7 +672,14 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon)
static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
{
Monitor *mon = opaque;
- PnvPHB4 *phb4 = (PnvPHB4 *) object_dynamic_cast(child, TYPE_PNV_PHB4);
+ PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
+ PnvPHB4 *phb4;
+
+ if (!phb) {
+ return 0;
+ }
+
+ phb4 = (PnvPHB4 *)phb->backend;
if (phb4) {
pnv_phb4_pic_print_info(phb4, mon);
@@ -2122,8 +2129,14 @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
static const char compat[] = "qemu,powernv9\0ibm,powernv";
+ static GlobalProperty phb_compat[] = {
+ { TYPE_PNV_PHB, "version", "4" },
+ };
+
mc->desc = "IBM PowerNV (Non-Virtualized) POWER9";
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
+ compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
+
xfc->match_nvt = pnv_match_nvt;
mc->alias = "powernv";
@@ -2140,8 +2153,13 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
XiveFabricClass *xfc = XIVE_FABRIC_CLASS(oc);
static const char compat[] = "qemu,powernv10\0ibm,powernv";
+ static GlobalProperty phb_compat[] = {
+ { TYPE_PNV_PHB, "version", "5" },
+ };
+
mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
+ compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
pmc->compat = compat;
pmc->compat_size = sizeof(compat);
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index 90843ac3a9..f22253358f 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -18,6 +18,7 @@
typedef struct PnvPhb4PecState PnvPhb4PecState;
typedef struct PnvPhb4PecStack PnvPhb4PecStack;
typedef struct PnvPHB4 PnvPHB4;
+typedef struct PnvPHB PnvPHB;
typedef struct PnvChip PnvChip;
/*
@@ -78,7 +79,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
#define PCI_MMIO_TOTAL_SIZE (0x1ull << 60)
struct PnvPHB4 {
- PCIExpressHost parent_obj;
+ DeviceState parent;
+
+ PnvPHB *phb_base;
uint32_t chip_id;
uint32_t phb_id;
--
2.36.1
On 24/06/2022 10:49, Daniel Henrique Barboza wrote:
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 1df91971b8..b7273f386e 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -672,7 +672,14 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon)
> static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
> {
> Monitor *mon = opaque;
> - PnvPHB4 *phb4 = (PnvPHB4 *) object_dynamic_cast(child, TYPE_PNV_PHB4);
> + PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
> + PnvPHB4 *phb4;
> +
> + if (!phb) {
> + return 0;
> + }
> +
> + phb4 = (PnvPHB4 *)phb->backend;
>
> if (phb4) {
> pnv_phb4_pic_print_info(phb4, mon);
The full code in pnv_chip_power9_pic_print_info_child() looks like this:
PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
PnvPHB4 *phb4;
if (!phb) {
return 0;
}
phb4 = (PnvPHB4 *)phb->backend;
if (phb4) {
pnv_phb4_pic_print_info(phb4, mon);
}
Which is correct. However, if I want to nitpick, phb->backend is defined
when the PnvPHB object is realized, so I don't think we can get here
with the pointer being null, so we could remove the second if statement
for readability. The reason I mention it is that we don't take that much
care in the pnv_chip_power8_pic_print_info() function just above, so it
looks a bit odd.
In any case:
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Fred
> @@ -2122,8 +2129,14 @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
> PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
> static const char compat[] = "qemu,powernv9\0ibm,powernv";
>
> + static GlobalProperty phb_compat[] = {
> + { TYPE_PNV_PHB, "version", "4" },
> + };
> +
> mc->desc = "IBM PowerNV (Non-Virtualized) POWER9";
> mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
> + compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
> +
> xfc->match_nvt = pnv_match_nvt;
>
> mc->alias = "powernv";
> @@ -2140,8 +2153,13 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
> XiveFabricClass *xfc = XIVE_FABRIC_CLASS(oc);
> static const char compat[] = "qemu,powernv10\0ibm,powernv";
>
> + static GlobalProperty phb_compat[] = {
> + { TYPE_PNV_PHB, "version", "5" },
> + };
> +
> mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
> mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
> + compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
>
> pmc->compat = compat;
> pmc->compat_size = sizeof(compat);
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index 90843ac3a9..f22253358f 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -18,6 +18,7 @@
> typedef struct PnvPhb4PecState PnvPhb4PecState;
> typedef struct PnvPhb4PecStack PnvPhb4PecStack;
> typedef struct PnvPHB4 PnvPHB4;
> +typedef struct PnvPHB PnvPHB;
> typedef struct PnvChip PnvChip;
>
> /*
> @@ -78,7 +79,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
> #define PCI_MMIO_TOTAL_SIZE (0x1ull << 60)
>
> struct PnvPHB4 {
> - PCIExpressHost parent_obj;
> + DeviceState parent;
> +
> + PnvPHB *phb_base;
>
> uint32_t chip_id;
> uint32_t phb_id;
On 7/27/22 14:41, Frederic Barrat wrote:
>
>
> On 24/06/2022 10:49, Daniel Henrique Barboza wrote:
>
>> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
>> index 1df91971b8..b7273f386e 100644
>> --- a/hw/ppc/pnv.c
>> +++ b/hw/ppc/pnv.c
>> @@ -672,7 +672,14 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon)
>> static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
>> {
>> Monitor *mon = opaque;
>> - PnvPHB4 *phb4 = (PnvPHB4 *) object_dynamic_cast(child, TYPE_PNV_PHB4);
>> + PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
>> + PnvPHB4 *phb4;
>> +
>> + if (!phb) {
>> + return 0;
>> + }
>> +
>> + phb4 = (PnvPHB4 *)phb->backend;
>> if (phb4) {
>> pnv_phb4_pic_print_info(phb4, mon);
>
>
> The full code in pnv_chip_power9_pic_print_info_child() looks like this:
>
> PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
> PnvPHB4 *phb4;
>
> if (!phb) {
> return 0;
> }
>
> phb4 = (PnvPHB4 *)phb->backend;
>
> if (phb4) {
> pnv_phb4_pic_print_info(phb4, mon);
> }
>
> Which is correct. However, if I want to nitpick, phb->backend is defined when the PnvPHB object is realized, so I don't think we can get here with the pointer being null, so we could remove the second if statement for readability. The reason I mention it is that we don't take that much care in the pnv_chip_power8_pic_print_info() function just above, so it looks a bit odd.
Good point. I changed it to look like this:
static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque)
{
Monitor *mon = opaque;
PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB);
if (!phb) {
return 0;
}
pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), mon);
return 0;
}
phb->backend being either NULL or not a PHB4 object is serious enough to assert
out, so the PNV_PHB4() macro seems justified.
Thanks,
Daniel
>
> In any case:
> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
>
> Fred
>
>
>
>
>> @@ -2122,8 +2129,14 @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data)
>> PnvMachineClass *pmc = PNV_MACHINE_CLASS(oc);
>> static const char compat[] = "qemu,powernv9\0ibm,powernv";
>> + static GlobalProperty phb_compat[] = {
>> + { TYPE_PNV_PHB, "version", "4" },
>> + };
>> +
>> mc->desc = "IBM PowerNV (Non-Virtualized) POWER9";
>> mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
>> + compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
>> +
>> xfc->match_nvt = pnv_match_nvt;
>> mc->alias = "powernv";
>> @@ -2140,8 +2153,13 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
>> XiveFabricClass *xfc = XIVE_FABRIC_CLASS(oc);
>> static const char compat[] = "qemu,powernv10\0ibm,powernv";
>> + static GlobalProperty phb_compat[] = {
>> + { TYPE_PNV_PHB, "version", "5" },
>> + };
>> +
>> mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
>> mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
>> + compat_props_add(mc->compat_props, phb_compat, G_N_ELEMENTS(phb_compat));
>> pmc->compat = compat;
>> pmc->compat_size = sizeof(compat);
>> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
>> index 90843ac3a9..f22253358f 100644
>> --- a/include/hw/pci-host/pnv_phb4.h
>> +++ b/include/hw/pci-host/pnv_phb4.h
>> @@ -18,6 +18,7 @@
>> typedef struct PnvPhb4PecState PnvPhb4PecState;
>> typedef struct PnvPhb4PecStack PnvPhb4PecStack;
>> typedef struct PnvPHB4 PnvPHB4;
>> +typedef struct PnvPHB PnvPHB;
>> typedef struct PnvChip PnvChip;
>> /*
>> @@ -78,7 +79,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
>> #define PCI_MMIO_TOTAL_SIZE (0x1ull << 60)
>> struct PnvPHB4 {
>> - PCIExpressHost parent_obj;
>> + DeviceState parent;
>> +
>> + PnvPHB *phb_base;
>> uint32_t chip_id;
>> uint32_t phb_id;
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