From: Matheus Ferst <matheus.ferst@eldorado.org.br>

In our "PowerISA Vector/VSX instruction batch" patch series, rth noted[1]
that helpers that only access vector registers should be declared with
DEF_HELPER_FLAGS_* and TCG_CALL_NO_RWG. We fixed helpers in that series,
but there are older helpers that could use the same optimization.

Guided by the presence of env as the first argument, in patches 1~4 we
change helpers that do not have access to the cpu_env pointer to modify
any globals. Then, we change other helpers that receive cpu_env but do
not use it and apply the same fix, taking the opportunity to move them
to decodetree.

[1] https://lists.gnu.org/archive/html/qemu-ppc/2022-02/msg00568.html

Matheus Ferst (12):
  target/ppc: declare darn32/darn64 helpers with TCG_CALL_NO_RWG
  target/ppc: use TCG_CALL_NO_RWG in vector helpers without env
  target/ppc: use TCG_CALL_NO_RWG in BCD helpers
  target/ppc: use TCG_CALL_NO_RWG in VSX helpers without env
  target/ppc: Use TCG_CALL_NO_RWG_SE in fsel helper
  target/ppc: declare xscvspdpn helper with call flags
  target/ppc: declare xvxsigsp helper with call flags
  target/ppc: declare xxextractuw and xxinsertw helpers with call flags
  target/ppc: introduce do_va_helper
  target/ppc: declare vmsum[um]bm helpers with call flags
  target/ppc: declare vmsumuhm helper with call flags
  target/ppc: declare vmsumshm helper with call flags

 target/ppc/fpu_helper.c             |  19 ++-
 target/ppc/helper.h                 | 226 ++++++++++++++--------------
 target/ppc/insn32.decode            |  28 +++-
 target/ppc/int_helper.c             |  22 +--
 target/ppc/translate/fp-impl.c.inc  |  30 +++-
 target/ppc/translate/fp-ops.c.inc   |   1 -
 target/ppc/translate/vmx-impl.c.inc |  62 ++++----
 target/ppc/translate/vmx-ops.c.inc  |   4 -
 target/ppc/translate/vsx-impl.c.inc | 103 ++++++++-----
 target/ppc/translate/vsx-ops.c.inc  |   4 -
 10 files changed, 282 insertions(+), 217 deletions(-)

-- 
2.25.1