[v4] target/m68k: Conditional traps + trap cleanup

[PATCH v4 12/17] target/m68k: Implement TRAPV

Posted by Richard Henderson 3 years, 9 months ago

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index bb5ed1b7b1..0cd7ef89e3 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4911,6 +4911,14 @@ DISAS_INSN(trapcc)
     do_trapcc(s, &c);
 }
 
+DISAS_INSN(trapv)
+{
+    DisasCompare c;
+
+    gen_cc_cond(&c, s, 9); /* V set */
+    do_trapcc(s, &c);
+}
+
 static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
 {
     switch (reg) {
@@ -6074,6 +6082,7 @@ void register_m68k_insns (CPUM68KState *env)
     BASE(nop,       4e71, ffff);
     INSN(rtd,       4e74, ffff, RTD);
     BASE(rts,       4e75, ffff);
+    INSN(trapv,     4e76, ffff, M68000);
     INSN(rtr,       4e77, ffff, M68000);
     BASE(jump,      4e80, ffc0);
     BASE(jump,      4ec0, ffc0);
-- 
2.34.1

Re: [PATCH v4 12/17] target/m68k: Implement TRAPV

Posted by Laurent Vivier 3 years, 8 months ago

Le 30/04/2022 à 19:53, Richard Henderson a écrit :
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/m68k/translate.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
> 
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index bb5ed1b7b1..0cd7ef89e3 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -4911,6 +4911,14 @@ DISAS_INSN(trapcc)
>       do_trapcc(s, &c);
>   }
>   
> +DISAS_INSN(trapv)
> +{
> +    DisasCompare c;
> +
> +    gen_cc_cond(&c, s, 9); /* V set */
> +    do_trapcc(s, &c);
> +}
> +
>   static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
>   {
>       switch (reg) {
> @@ -6074,6 +6082,7 @@ void register_m68k_insns (CPUM68KState *env)
>       BASE(nop,       4e71, ffff);
>       INSN(rtd,       4e74, ffff, RTD);
>       BASE(rts,       4e75, ffff);
> +    INSN(trapv,     4e76, ffff, M68000);
>       INSN(rtr,       4e77, ffff, M68000);
>       BASE(jump,      4e80, ffc0);
>       BASE(jump,      4ec0, ffc0);

Reviewed-by: Laurent Vivier <laurent@vivier.eu>