Patch series to implement AXV/AVX2 guest support in TCG.

All the system level code for this (cpid, xsave, wider registers, etc)
already exists, we just need to implement the instruction translation.

The majority of the new 256-bit operations operate on each 128-bit
"lane" independently, so in theory we could use a single set of 128-bit
helpers to implement both widths piecemeal. However this would further
complicate the already over-long gen_sse function. Instead I chose to
generate a whole new set of 256 bit "ymm" helpers using the framework
already in place for 64/128 bit mm/xmm operations.

I've included the tests I used during development to the linux-user
testsuite, and also ran these manually inside a debian x86-64 guest.

Appologies for the big patch, but I can't think of a good way to split
the bulk of the instruction translation.

Paul Brook (4):
  Add AVX_EN hflag
  TCG support for AVX
  Enable all x86-64 cpu features in user mode
  AVX tests

 linux-user/x86_64/target_elf.h |    2 +-
 target/i386/cpu.c              |    8 +-
 target/i386/cpu.h              |    3 +
 target/i386/helper.c           |   12 +
 target/i386/helper.h           |    2 +
 target/i386/ops_sse.h          | 2606 +++++++++++++-----
 target/i386/ops_sse_header.h   |  364 ++-
 target/i386/tcg/fpu_helper.c   |    4 +
 target/i386/tcg/translate.c    | 1902 ++++++++++---
 tests/tcg/i386/Makefile.target |   10 +-
 tests/tcg/i386/README          |    9 +
 tests/tcg/i386/test-avx.c      |  347 +++
 tests/tcg/i386/test-avx.py     |  352 +++
 tests/tcg/i386/x86.csv         | 4658 ++++++++++++++++++++++++++++++++
 14 files changed, 8988 insertions(+), 1291 deletions(-)
 create mode 100644 tests/tcg/i386/test-avx.c
 create mode 100755 tests/tcg/i386/test-avx.py
 create mode 100644 tests/tcg/i386/x86.csv

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2.35.2