1 | Couple of trivial fixes for rc3... | 1 | The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a: |
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2 | 2 | ||
3 | The following changes since commit 20661b75ea6093f5e59079d00a778a972d6732c5: | 3 | Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000) |
4 | |||
5 | Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into staging (2022-04-04 15:48:55 +0100) | ||
6 | 4 | ||
7 | are available in the Git repository at: | 5 | are available in the Git repository at: |
8 | 6 | ||
9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220405 | 7 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328 |
10 | 8 | ||
11 | for you to fetch changes up to 80b952bb694a90f7e530d407b01066894e64a443: | 9 | for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a: |
12 | 10 | ||
13 | docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. (2022-04-05 09:29:28 +0100) | 11 | target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100) |
14 | 12 | ||
15 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
16 | target-arm queue: | 14 | target-arm queue: |
17 | * docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. | 15 | * fix part of the "TCG-disabled builds are broken" issue |
18 | * xlnx-bbram: hw/nvram: Fix uninitialized Error * | ||
19 | 16 | ||
20 | ---------------------------------------------------------------- | 17 | ---------------------------------------------------------------- |
21 | Pavel Pisa (1): | 18 | Philippe Mathieu-Daudé (1): |
22 | docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. | 19 | target/arm/gdbstub: Only advertise M-profile features if TCG available |
23 | 20 | ||
24 | Tong Ho (1): | 21 | target/arm/gdbstub.c | 5 +++-- |
25 | xlnx-bbram: hw/nvram: Fix uninitialized Error * | 22 | 1 file changed, 3 insertions(+), 2 deletions(-) |
26 | 23 | ||
27 | docs/system/devices/can.rst | 6 +++--- | ||
28 | hw/nvram/xlnx-bbram.c | 2 +- | ||
29 | 2 files changed, 4 insertions(+), 4 deletions(-) | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Tong Ho <tong.ho@xilinx.com> | ||
2 | 1 | ||
3 | This adds required initialization of Error * variable. | ||
4 | |||
5 | Signed-off-by: Tong Ho <tong.ho@xilinx.com> | ||
6 | Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | --- | ||
9 | hw/nvram/xlnx-bbram.c | 2 +- | ||
10 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
11 | |||
12 | diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/hw/nvram/xlnx-bbram.c | ||
15 | +++ b/hw/nvram/xlnx-bbram.c | ||
16 | @@ -XXX,XX +XXX,XX @@ static bool bbram_pgm_enabled(XlnxBBRam *s) | ||
17 | |||
18 | static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail) | ||
19 | { | ||
20 | - Error *errp; | ||
21 | + Error *errp = NULL; | ||
22 | |||
23 | error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.", | ||
24 | blk_name(s->blk), detail); | ||
25 | -- | ||
26 | 2.25.1 | diff view generated by jsdifflib |
1 | From: Pavel Pisa <pisa@cmp.felk.cvut.cz> | 1 | From: Philippe Mathieu-Daudé <philmd@linaro.org> |
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2 | 2 | ||
3 | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | 3 | Cortex-M profile is only emulable from TCG accelerator. Restrict |
4 | Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> | 4 | the GDBstub features to its availability in order to avoid a link |
5 | Message-id: 20220402204523.32643-1-pisa@cmp.felk.cvut.cz | 5 | error when TCG is not enabled: |
6 | |||
7 | Undefined symbols for architecture arm64: | ||
8 | "_arm_v7m_get_sp_ptr", referenced from: | ||
9 | _m_sysreg_get in target_arm_gdbstub.c.o | ||
10 | "_arm_v7m_mrs_control", referenced from: | ||
11 | _arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o | ||
12 | ld: symbol(s) not found for architecture arm64 | ||
13 | clang: error: linker command failed with exit code 1 (use -v to see invocation) | ||
14 | |||
15 | Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext") | ||
16 | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
17 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
18 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
19 | Message-id: 20230322142902.69511-3-philmd@linaro.org | ||
20 | [PMM: add #include since I cherry-picked this patch from the series] | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 21 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 22 | --- |
8 | docs/system/devices/can.rst | 6 +++--- | 23 | target/arm/gdbstub.c | 5 +++-- |
9 | 1 file changed, 3 insertions(+), 3 deletions(-) | 24 | 1 file changed, 3 insertions(+), 2 deletions(-) |
10 | 25 | ||
11 | diff --git a/docs/system/devices/can.rst b/docs/system/devices/can.rst | 26 | diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c |
12 | index XXXXXXX..XXXXXXX 100644 | 27 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/docs/system/devices/can.rst | 28 | --- a/target/arm/gdbstub.c |
14 | +++ b/docs/system/devices/can.rst | 29 | +++ b/target/arm/gdbstub.c |
15 | @@ -XXX,XX +XXX,XX @@ Links to other resources | 30 | @@ -XXX,XX +XXX,XX @@ |
16 | (5) `GNU/Linux, CAN and CANopen in Real-time Control Applications Slides from LinuxDays 2017 (include updated RTLWS 2015 content) <https://www.linuxdays.cz/2017/video/Pavel_Pisa-CAN_canopen.pdf>`_ | 31 | #include "cpu.h" |
17 | (6) `Linux SocketCAN utilities <https://github.com/linux-can/can-utils>`_ | 32 | #include "exec/gdbstub.h" |
18 | (7) `CTU CAN FD project including core VHDL design, Linux driver, test utilities etc. <https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core>`_ | 33 | #include "gdbstub/helpers.h" |
19 | - (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf>`_ | 34 | +#include "sysemu/tcg.h" |
20 | - (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/ctu_can_fd_architecture.pdf>`_ | 35 | #include "internals.h" |
21 | - (10) `CTU CAN FD Driver Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/driver_doc/ctucanfd-driver.html>`_ | 36 | #include "cpregs.h" |
22 | + (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf>`_ | 37 | |
23 | + (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/System_Architecture.pdf>`_ | 38 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) |
24 | + (10) `CTU CAN FD Driver Documentation <https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/linux_driver/build/ctucanfd-driver.html>`_ | 39 | 2, "arm-vfp-sysregs.xml", 0); |
25 | (11) `Integration with PCIe interfacing for Intel/Altera Cyclone IV based board <https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd>`_ | 40 | } |
41 | } | ||
42 | - if (cpu_isar_feature(aa32_mve, cpu)) { | ||
43 | + if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) { | ||
44 | gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg, | ||
45 | 1, "arm-m-profile-mve.xml", 0); | ||
46 | } | ||
47 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) | ||
48 | arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), | ||
49 | "system-registers.xml", 0); | ||
50 | |||
51 | - if (arm_feature(env, ARM_FEATURE_M)) { | ||
52 | + if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { | ||
53 | gdb_register_coprocessor(cs, | ||
54 | arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, | ||
55 | arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs), | ||
26 | -- | 56 | -- |
27 | 2.25.1 | 57 | 2.34.1 |
58 | |||
59 | diff view generated by jsdifflib |