1 | Couple of trivial fixes for rc3... | 1 | Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx |
---|---|---|---|
2 | ethernet device failed 'make check' on big-endian hosts. | ||
2 | 3 | ||
3 | The following changes since commit 20661b75ea6093f5e59079d00a778a972d6732c5: | 4 | -- PMM |
4 | 5 | ||
5 | Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into staging (2022-04-04 15:48:55 +0100) | 6 | The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf: |
7 | |||
8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000) | ||
6 | 9 | ||
7 | are available in the Git repository at: | 10 | are available in the Git repository at: |
8 | 11 | ||
9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220405 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1 |
10 | 13 | ||
11 | for you to fetch changes up to 80b952bb694a90f7e530d407b01066894e64a443: | 14 | for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621: |
12 | 15 | ||
13 | docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. (2022-04-05 09:29:28 +0100) | 16 | target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000) |
14 | 17 | ||
15 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
16 | target-arm queue: | 19 | target-arm queue: |
17 | * docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. | 20 | * Correctly initialize MDCR_EL2.HPMN |
18 | * xlnx-bbram: hw/nvram: Fix uninitialized Error * | 21 | * versal: Use nr_apu_cpus in favor of hard coding 2 |
22 | * accel/tcg: Add URL of clang bug to comment about our workaround | ||
23 | * Add support for FEAT_DIT, Data Independent Timing | ||
24 | * Remove GPIO from unimplemented NPCM7XX | ||
25 | * Fix SCR RES1 handling | ||
26 | * Don't migrate CPUARMState.features | ||
19 | 27 | ||
20 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
21 | Pavel Pisa (1): | 29 | Aaron Lindsay (1): |
22 | docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. | 30 | target/arm: Don't migrate CPUARMState.features |
23 | 31 | ||
24 | Tong Ho (1): | 32 | Daniel Müller (1): |
25 | xlnx-bbram: hw/nvram: Fix uninitialized Error * | 33 | target/arm: Correctly initialize MDCR_EL2.HPMN |
26 | 34 | ||
27 | docs/system/devices/can.rst | 6 +++--- | 35 | Edgar E. Iglesias (1): |
28 | hw/nvram/xlnx-bbram.c | 2 +- | 36 | hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 |
29 | 2 files changed, 4 insertions(+), 4 deletions(-) | 37 | |
38 | Hao Wu (1): | ||
39 | hw/arm: Remove GPIO from unimplemented NPCM7XX | ||
40 | |||
41 | Mike Nawrocki (1): | ||
42 | target/arm: Fix SCR RES1 handling | ||
43 | |||
44 | Peter Maydell (2): | ||
45 | arm: Update infocenter.arm.com URLs | ||
46 | accel/tcg: Add URL of clang bug to comment about our workaround | ||
47 | |||
48 | Rebecca Cran (4): | ||
49 | target/arm: Add support for FEAT_DIT, Data Independent Timing | ||
50 | target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate | ||
51 | target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU | ||
52 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU | ||
53 | |||
54 | include/hw/dma/pl080.h | 7 ++-- | ||
55 | include/hw/misc/arm_integrator_debug.h | 2 +- | ||
56 | include/hw/ssi/pl022.h | 5 ++- | ||
57 | target/arm/cpu.h | 17 ++++++++ | ||
58 | target/arm/internals.h | 6 +++ | ||
59 | accel/tcg/cpu-exec.c | 25 +++++++++--- | ||
60 | hw/arm/aspeed_ast2600.c | 2 +- | ||
61 | hw/arm/musca.c | 4 +- | ||
62 | hw/arm/npcm7xx.c | 8 ---- | ||
63 | hw/arm/xlnx-versal.c | 4 +- | ||
64 | hw/misc/arm_integrator_debug.c | 2 +- | ||
65 | hw/timer/arm_timer.c | 7 ++-- | ||
66 | target/arm/cpu.c | 4 ++ | ||
67 | target/arm/cpu64.c | 5 +++ | ||
68 | target/arm/helper-a64.c | 27 +++++++++++-- | ||
69 | target/arm/helper.c | 71 +++++++++++++++++++++++++++------- | ||
70 | target/arm/machine.c | 2 +- | ||
71 | target/arm/op_helper.c | 9 +---- | ||
72 | target/arm/translate-a64.c | 12 ++++++ | ||
73 | 19 files changed, 164 insertions(+), 55 deletions(-) | ||
74 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Tong Ho <tong.ho@xilinx.com> | ||
2 | 1 | ||
3 | This adds required initialization of Error * variable. | ||
4 | |||
5 | Signed-off-by: Tong Ho <tong.ho@xilinx.com> | ||
6 | Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | --- | ||
9 | hw/nvram/xlnx-bbram.c | 2 +- | ||
10 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
11 | |||
12 | diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c | ||
13 | index XXXXXXX..XXXXXXX 100644 | ||
14 | --- a/hw/nvram/xlnx-bbram.c | ||
15 | +++ b/hw/nvram/xlnx-bbram.c | ||
16 | @@ -XXX,XX +XXX,XX @@ static bool bbram_pgm_enabled(XlnxBBRam *s) | ||
17 | |||
18 | static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail) | ||
19 | { | ||
20 | - Error *errp; | ||
21 | + Error *errp = NULL; | ||
22 | |||
23 | error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.", | ||
24 | blk_name(s->blk), detail); | ||
25 | -- | ||
26 | 2.25.1 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
2 | 1 | ||
3 | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
4 | Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> | ||
5 | Message-id: 20220402204523.32643-1-pisa@cmp.felk.cvut.cz | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
7 | --- | ||
8 | docs/system/devices/can.rst | 6 +++--- | ||
9 | 1 file changed, 3 insertions(+), 3 deletions(-) | ||
10 | |||
11 | diff --git a/docs/system/devices/can.rst b/docs/system/devices/can.rst | ||
12 | index XXXXXXX..XXXXXXX 100644 | ||
13 | --- a/docs/system/devices/can.rst | ||
14 | +++ b/docs/system/devices/can.rst | ||
15 | @@ -XXX,XX +XXX,XX @@ Links to other resources | ||
16 | (5) `GNU/Linux, CAN and CANopen in Real-time Control Applications Slides from LinuxDays 2017 (include updated RTLWS 2015 content) <https://www.linuxdays.cz/2017/video/Pavel_Pisa-CAN_canopen.pdf>`_ | ||
17 | (6) `Linux SocketCAN utilities <https://github.com/linux-can/can-utils>`_ | ||
18 | (7) `CTU CAN FD project including core VHDL design, Linux driver, test utilities etc. <https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core>`_ | ||
19 | - (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf>`_ | ||
20 | - (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/ctu_can_fd_architecture.pdf>`_ | ||
21 | - (10) `CTU CAN FD Driver Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/driver_doc/ctucanfd-driver.html>`_ | ||
22 | + (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf>`_ | ||
23 | + (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/System_Architecture.pdf>`_ | ||
24 | + (10) `CTU CAN FD Driver Documentation <https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/linux_driver/build/ctucanfd-driver.html>`_ | ||
25 | (11) `Integration with PCIe interfacing for Intel/Altera Cyclone IV based board <https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd>`_ | ||
26 | -- | ||
27 | 2.25.1 | diff view generated by jsdifflib |