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Couple of trivial fixes for rc3...
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v2: drop pvpanic-pci patches.
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The following changes since commit 20661b75ea6093f5e59079d00a778a972d6732c5:
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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Merge tag 'pull-ppc-20220404' of https://github.com/legoater/qemu into staging (2022-04-04 15:48:55 +0100)
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220405
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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for you to fetch changes up to 80b952bb694a90f7e530d407b01066894e64a443:
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation. (2022-04-05 09:29:28 +0100)
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation.
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* Implement IMPDEF pauth algorithm
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* xlnx-bbram: hw/nvram: Fix uninitialized Error *
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* Support ARMv8.4-SEL2
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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* docs: Build and install all the docs in a single manual
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----------------------------------------------------------------
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----------------------------------------------------------------
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Pavel Pisa (1):
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Gan Qixin (1):
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docs/system/devices/can.rst: correct links to CTU CAN FD IP core documentation.
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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Tong Ho (1):
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Peter Maydell (1):
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xlnx-bbram: hw/nvram: Fix uninitialized Error *
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docs: Build and install all the docs in a single manual
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docs/system/devices/can.rst | 6 +++---
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Philippe Mathieu-Daudé (1):
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hw/nvram/xlnx-bbram.c | 2 +-
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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2 files changed, 4 insertions(+), 4 deletions(-)
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Richard Henderson (7):
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target/arm: Implement an IMPDEF pauth algorithm
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target/arm: Add cpu properties to control pauth
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target/arm: Use object_property_add_bool for "sve" property
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target/arm: Introduce PREDDESC field definitions
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target/arm: Update PFIRST, PNEXT for pred_desc
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target/arm: Update ZIP, UZP, TRN for pred_desc
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target/arm: Update REV, PUNPK for pred_desc
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Rémi Denis-Courmont (19):
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target/arm: remove redundant tests
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target/arm: add arm_is_el2_enabled() helper
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target/arm: use arm_is_el2_enabled() where applicable
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target/arm: use arm_hcr_el2_eff() where applicable
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target/arm: factor MDCR_EL2 common handling
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target/arm: Define isar_feature function to test for presence of SEL2
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target/arm: add 64-bit S-EL2 to EL exception table
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target/arm: add MMU stage 1 for Secure EL2
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target/arm: add ARMv8.4-SEL2 system registers
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target/arm: handle VMID change in secure state
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target/arm: do S1_ptw_translate() before address space lookup
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target/arm: translate NS bit in page-walks
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target/arm: generalize 2-stage page-walk condition
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target/arm: secure stage 2 translation regime
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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target/arm: revector to run-time pick target EL
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target/arm: Implement SCR_EL2.EEL2
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target/arm: enable Secure EL2 in max CPU
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target/arm: refactor vae1_tlbmask()
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docs/conf.py | 46 ++++-
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docs/devel/conf.py | 15 --
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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diff view generated by jsdifflib
Deleted patch
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From: Tong Ho <tong.ho@xilinx.com>
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1
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This adds required initialization of Error * variable.
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Signed-off-by: Tong Ho <tong.ho@xilinx.com>
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Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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hw/nvram/xlnx-bbram.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/nvram/xlnx-bbram.c
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+++ b/hw/nvram/xlnx-bbram.c
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@@ -XXX,XX +XXX,XX @@ static bool bbram_pgm_enabled(XlnxBBRam *s)
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static void bbram_bdrv_error(XlnxBBRam *s, int rc, gchar *detail)
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{
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- Error *errp;
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+ Error *errp = NULL;
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error_setg_errno(&errp, -rc, "%s: BBRAM backstore %s failed.",
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blk_name(s->blk), detail);
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--
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2.25.1
diff view generated by jsdifflib
Deleted patch
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From: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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1
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Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
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Message-id: 20220402204523.32643-1-pisa@cmp.felk.cvut.cz
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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docs/system/devices/can.rst | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/docs/system/devices/can.rst b/docs/system/devices/can.rst
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index XXXXXXX..XXXXXXX 100644
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--- a/docs/system/devices/can.rst
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+++ b/docs/system/devices/can.rst
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@@ -XXX,XX +XXX,XX @@ Links to other resources
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(5) `GNU/Linux, CAN and CANopen in Real-time Control Applications Slides from LinuxDays 2017 (include updated RTLWS 2015 content) <https://www.linuxdays.cz/2017/video/Pavel_Pisa-CAN_canopen.pdf>`_
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(6) `Linux SocketCAN utilities <https://github.com/linux-can/can-utils>`_
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(7) `CTU CAN FD project including core VHDL design, Linux driver, test utilities etc. <https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core>`_
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- (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/Progdokum.pdf>`_
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- (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/ctu_can_fd_architecture.pdf>`_
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- (10) `CTU CAN FD Driver Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/driver_doc/ctucanfd-driver.html>`_
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+ (8) `CTU CAN FD Core Datasheet Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf>`_
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+ (9) `CTU CAN FD Core System Architecture Documentation <http://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/System_Architecture.pdf>`_
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+ (10) `CTU CAN FD Driver Documentation <https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/linux_driver/build/ctucanfd-driver.html>`_
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(11) `Integration with PCIe interfacing for Intel/Altera Cyclone IV based board <https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd>`_
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--
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2.25.1
diff view generated by jsdifflib