Add support to run softmmu tests for ppc64 and ppc64le.
To make it possible, a new "virtual" TCG test target,
ppc64le-softmmu, was created.

Also add the MMU tests from
https://github.com/legoater/pnv-test, that are the Microwatt
tests adapted to use a PowerNV console and to better integrate
with QEMU test infrastructure.

To be able to finish the test and return an exit code to the
calling process, the Processor Attention instruction is used.
As its behavior is implementation dependent, in QEMU PowerNV
it just calls exit with GPR[3] value, truncated to an uint8_t.

Cédric Le Goater (2):
  target/ppc: Add support for the Processor Attention instruction
  ppc/pnv: Activate support for the Processor Attention instruction

Leandro Lupori (4):
  tests/tcg/ppc64: add basic softmmu test support
  tests/tcg: add support for ppc64le softmmu tests
  tests/tcg/ppc64: add MMU test sources
  tests/tcg/ppc64: add rules to build PowerNV tests

 hw/ppc/pnv_core.c                         |   6 +
 include/hw/ppc/pnv_core.h                 |   1 +
 target/ppc/cpu.h                          |   8 +
 target/ppc/excp_helper.c                  |  27 +
 target/ppc/helper.h                       |   1 +
 target/ppc/translate.c                    |  14 +
 tests/Makefile.include                    |   7 +-
 tests/tcg/configure.sh                    |  11 +-
 tests/tcg/ppc64/Makefile.softmmu-target   |  80 +++
 tests/tcg/ppc64/system/include/asm.h      |  62 ++
 tests/tcg/ppc64/system/include/console.h  |  15 +
 tests/tcg/ppc64/system/include/io.h       |  61 ++
 tests/tcg/ppc64/system/include/pnv.h      |  21 +
 tests/tcg/ppc64/system/include/uart.h     |  54 ++
 tests/tcg/ppc64/system/lib/boot.S         |  68 ++
 tests/tcg/ppc64/system/lib/console.c      | 173 +++++
 tests/tcg/ppc64/system/lib/powerpc.lds    |  27 +
 tests/tcg/ppc64/system/mmu-head.S         | 142 ++++
 tests/tcg/ppc64/system/mmu.c              | 764 ++++++++++++++++++++++
 tests/tcg/ppc64/system/mmu.h              |   9 +
 tests/tcg/ppc64le/Makefile.softmmu-target |   7 +
 21 files changed, 1554 insertions(+), 4 deletions(-)
 create mode 100644 tests/tcg/ppc64/Makefile.softmmu-target
 create mode 100644 tests/tcg/ppc64/system/include/asm.h
 create mode 100644 tests/tcg/ppc64/system/include/console.h
 create mode 100644 tests/tcg/ppc64/system/include/io.h
 create mode 100644 tests/tcg/ppc64/system/include/pnv.h
 create mode 100644 tests/tcg/ppc64/system/include/uart.h
 create mode 100644 tests/tcg/ppc64/system/lib/boot.S
 create mode 100644 tests/tcg/ppc64/system/lib/console.c
 create mode 100644 tests/tcg/ppc64/system/lib/powerpc.lds
 create mode 100644 tests/tcg/ppc64/system/mmu-head.S
 create mode 100644 tests/tcg/ppc64/system/mmu.c
 create mode 100644 tests/tcg/ppc64/system/mmu.h
 create mode 100644 tests/tcg/ppc64le/Makefile.softmmu-target

-- 
2.25.1

On 3/24/22 13:08, Leandro Lupori wrote:
> To be able to finish the test and return an exit code to the
> calling process, the Processor Attention instruction is used.
> As its behavior is implementation dependent, in QEMU PowerNV
> it just calls exit with GPR[3] value, truncated to an uint8_t.

I think you're simply thinking too small here, and should consider using the attn 
instruction to implement a full -semihosting interface.  You might as well join arm and 
riscv with CONFIG_ARM_COMPATIBLE_SEMIHOSTING.


r~

On 3/26/22 14:13, Richard Henderson wrote:
> On 3/24/22 13:08, Leandro Lupori wrote:
>> To be able to finish the test and return an exit code to the
>> calling process, the Processor Attention instruction is used.
>> As its behavior is implementation dependent, in QEMU PowerNV
>> it just calls exit with GPR[3] value, truncated to an uint8_t.
> 
> I think you're simply thinking too small here, and should consider using the attn instruction to implement a full -semihosting interface.  You might as well join arm and riscv with CONFIG_ARM_COMPATIBLE_SEMIHOSTING.

yes. This looks like a good interface. We need an instruction
to generate the semihosting calls.

Thanks,

C.

Richard Henderson <richard.henderson@linaro.org> writes:

> On 3/24/22 13:08, Leandro Lupori wrote:
>> To be able to finish the test and return an exit code to the
>> calling process, the Processor Attention instruction is used.
>> As its behavior is implementation dependent, in QEMU PowerNV
>> it just calls exit with GPR[3] value, truncated to an uint8_t.
>
> I think you're simply thinking too small here, and should consider using the attn 
> instruction to implement a full -semihosting interface.  You might as well join arm and 
> riscv with CONFIG_ARM_COMPATIBLE_SEMIHOSTING.

I can't reach the semihosting docs at:
https://static.docs.arm.com/100863/0200/semihosting.pdf

Do we need to replace that URL with something else?

>
>
> r~

On 3/28/22 08:54, Fabiano Rosas wrote:
> I can't reach the semihosting docs at:
> https://static.docs.arm.com/100863/0200/semihosting.pdf
> 
> Do we need to replace that URL with something else?

It has been moved to

https://developer.arm.com/documentation/100863/latest


r~