target/i386: tcg: high bits SSE cmp operation must be ignored

[PATCH] target/i386: tcg: high bits SSE cmp operation must be ignored

Paolo Bonzini posted 1 patch 2 years, 1 month ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20220324080847.69459-1-pbonzini@redhat.com

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Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Eduardo Habkost <eduardo@habkost.net>

target/i386/tcg/translate.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)

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[PATCH] target/i386: tcg: high bits SSE cmp operation must be ignored

Posted by Paolo Bonzini 2 years, 1 month ago

High bits in the immediate operand of SSE comparisons are ignored, they
do not result in an undefined opcode exception.  This is mentioned
explicitly in the Intel documentation.

Reported-by: sonicadvance1@gmail.com
Closes: https://gitlab.com/qemu-project/qemu/-/issues/184
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/translate.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 2a94d33742..c393913fe0 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -4509,10 +4509,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
             sse_fn_ppi(s->ptr0, s->ptr1, tcg_const_i32(val));
             break;
         case 0xc2:
-            /* compare insns */
-            val = x86_ldub_code(env, s);
-            if (val >= 8)
-                goto unknown_op;
+            /* compare insns, bits 7:3 (7:5 for AVX) are ignored */
+            val = x86_ldub_code(env, s) & 7;
             sse_fn_epp = sse_op_table4[val][b1];
 
             tcg_gen_addi_ptr(s->ptr0, cpu_env, op1_offset);
-- 
2.35.1

Re: [PATCH] target/i386: tcg: high bits SSE cmp operation must be ignored

Posted by Richard Henderson 2 years, 1 month ago

On 3/24/22 02:08, Paolo Bonzini wrote:
> High bits in the immediate operand of SSE comparisons are ignored, they
> do not result in an undefined opcode exception.  This is mentioned
> explicitly in the Intel documentation.
> 
> Reported-by:sonicadvance1@gmail.com
> Closes:https://gitlab.com/qemu-project/qemu/-/issues/184
> Signed-off-by: Paolo Bonzini<pbonzini@redhat.com>
> ---
>   target/i386/tcg/translate.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~