[PATCH v3 0/5] target/nios2: Shadow register set, EIC and VIC

Amir Gonnen posted 5 patches 2 years, 1 month ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20220303153906.2024748-1-amir.gonnen@neuroblade.ai
Test checkpatch failed
Maintainers: Chris Wulff <crwulff@gmail.com>, Marek Vasut <marex@denx.de>
There is a newer version of this series
hw/intc/Kconfig           |   3 +
hw/intc/meson.build       |   1 +
hw/intc/nios2_vic.c       | 341 ++++++++++++++++++++++++++++++++++++++
hw/nios2/10m50_devboard.c |  64 ++++++-
hw/nios2/Kconfig          |   1 +
target/nios2/cpu.c        |  55 ++++--
target/nios2/cpu.h        |  69 +++++++-
target/nios2/helper.c     |  33 +++-
target/nios2/helper.h     |   1 +
target/nios2/op_helper.c  |  18 ++
target/nios2/translate.c  |  66 +++++++-
11 files changed, 621 insertions(+), 31 deletions(-)
create mode 100644 hw/intc/nios2_vic.c
[PATCH v3 0/5] target/nios2: Shadow register set, EIC and VIC
Posted by Amir Gonnen 2 years, 1 month ago
Based-on: 20220227182125.21809-1-richard.henderson@linaro.org
("target/nios2: Rewrite interrupt handling")

Implement nios2 Shadow register set, EIC and VIC.

Currently nios2 on QEMU contains an internal Interrupt Controller.
The nios2 architecture can support a more powerful External Interrupt
Controller (EIC) instead of the internal, and implements special cpu
features to support it: Shadow register set and External Interrupt
Controller Interface.

This patch series introduces the necessary changes to the nios2 cpu to
support an External Interrupt Controller, and includes a Vectored
Interrupt Controller (VIC) device that can be attached to the EIC.

Changes from v2
===============
- Rebase patchest on "target/nios2: Rewrite interrupt handling", which
  introduces fixes to nios2 interrupt handling
- Check supervisor on eret as a separate patch
- Check supervisor on rdprs and wrprs
- Use FIELD_EX32 and FIELD_DP32 to access IL, CRS and PRS
- Added a comment on helper_eret
- Compute rdprs and wrprs inline, without helper functions
- Check nios2_take_eic_irq on nios2_cpu_exec_interrupt
- Check regs[CR_IPENDING] instead of env->irq_pending
- Fix Kconfig (remove defaults and depends)
- Added URL to VIC documentaion on Intel website
- Removed LOG_VIC
- Added comments in nios_vic.c
- Report an error in case of write to invalid CSR address

Changes from v1
===============
- Splitted into several independant patches
- Added a board that wires up the VIC

Signed-off-by: Amir Gonnen

Amir Gonnen (5):
  target/nios2: Check supervisor on eret
  target/nios2: Shadow register set
  target/nios2: Exteral Interrupt Controller (EIC)
  hw/intc: Vectored Interrupt Controller (VIC)
  hw/nios2: Machine with a Vectored Interrupt Controller

 hw/intc/Kconfig           |   3 +
 hw/intc/meson.build       |   1 +
 hw/intc/nios2_vic.c       | 341 ++++++++++++++++++++++++++++++++++++++
 hw/nios2/10m50_devboard.c |  64 ++++++-
 hw/nios2/Kconfig          |   1 +
 target/nios2/cpu.c        |  55 ++++--
 target/nios2/cpu.h        |  69 +++++++-
 target/nios2/helper.c     |  33 +++-
 target/nios2/helper.h     |   1 +
 target/nios2/op_helper.c  |  18 ++
 target/nios2/translate.c  |  66 +++++++-
 11 files changed, 621 insertions(+), 31 deletions(-)
 create mode 100644 hw/intc/nios2_vic.c

-- 
2.25.1