The following changes since commit 09591fcf6eb3157ab9c50a9fbbef5f8a567fb49f:
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20220228' into staging (2022-03-01 15:55:31 +0000)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-ppc-20220302
for you to fetch changes up to 169518430562b454a1531610d2711c6b920929f6:
hw/ppc/spapr_vio.c: use g_autofree in spapr_dt_vdevice() (2022-03-02 06:51:40 +0100)
----------------------------------------------------------------
ppc-7.0 queue
* ppc/pnv fixes
* PMU EBB support
* target/ppc: PowerISA Vector/VSX instruction batch
* ppc/pnv: Extension of the powernv10 machine with XIVE2 ans PHB5 models
* spapr allocation cleanups
----------------------------------------------------------------
Bernhard Beschow (1):
hw/ppc/pnv: Determine ns16550's IRQ number from QOM property
Cédric Le Goater (18):
ppc/xive2: Introduce a XIVE2 core framework
ppc/xive2: Introduce a presenter matching routine
ppc/pnv: Add a XIVE2 controller to the POWER10 chip
ppc/pnv: Add a OCC model for POWER10
ppc/pnv: Add POWER10 quads
ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge
ppc/pnv: Add a HOMER model to POWER10
ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10)
ppc/xive2: Add support for notification injection on ESB pages
ppc/xive: Add support for PQ state bits offload
ppc/pnv: Add support for PQ offload on PHB5
ppc/pnv: Add support for PHB5 "Address-based trigger" mode
pnv/xive2: Introduce new capability bits
ppc/pnv: add XIVE Gen2 TIMA support
pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1)
xive2: Add a get_config() handler for the router configuration
pnv/xive2: Add support for automatic save&restore
pnv/xive2: Add support for 8bits thread id
Daniel Henrique Barboza (19):
ppc/pnv: fix default PHB4 QOM hierarchy
target/ppc: make power8-pmu.c CONFIG_TCG only
target/ppc: finalize pre-EBB PMU logic
target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions
target/ppc: trigger PERFM EBBs from power8-pmu.c
hw/ppc/spapr.c: use g_autofree in spapr_dt_chosen()
hw/ppc/spapr.c: fail early if no firmware found in machine_init()
hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_set_string()
hw/ppc/spapr_caps.c: use g_autofree in spapr_cap_get_string()
hw/ppc/spapr_caps.c: use g_autofree in spapr_caps_add_properties()
hw/ppc/spapr_drc.c: use g_auto in spapr_dt_drc()
hw/ppc/spapr_drc.c: use g_autofree in drc_realize()
hw/ppc/spapr_drc.c: use g_autofree in drc_unrealize()
hw/ppc/spapr_drc.c: use g_autofree in spapr_dr_connector_new()
hw/ppc/spapr_drc.c: use g_autofree in spapr_drc_by_index()
hw/ppc/spapr_numa.c: simplify spapr_numa_write_assoc_lookup_arrays()
spapr_pci_nvlink2.c: use g_autofree in spapr_phb_nvgpu_ram_populate_dt()
hw/ppc/spapr_rtas.c: use g_autofree in rtas_ibm_get_system_parameter()
hw/ppc/spapr_vio.c: use g_autofree in spapr_dt_vdevice()
Leandro Lupori (2):
target/ppc: implement plxsd/pstxsd
target/ppc: implement plxssp/pstxssp
Lucas Coutinho (3):
target/ppc: Move vexts[bhw]2[wd] to decodetree
target/ppc: Implement vextsd2q
target/ppc: implement lxvr[bhwd]/stxvr[bhwd]x
Lucas Mateus Castro (alqotel) (3):
target/ppc: moved vector even and odd multiplication to decodetree
target/ppc: Moved vector multiply high and low to decodetree
target/ppc: vmulh* instructions without helpers
Luis Pires (1):
target/ppc: Introduce TRANS*FLAGS macros
Matheus Ferst (29):
target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree
target/ppc: Move Vector Compare Not Equal or Zero to decodetree
target/ppc: Implement Vector Compare Equal Quadword
target/ppc: Implement Vector Compare Greater Than Quadword
target/ppc: Implement Vector Compare Quadword
target/ppc: implement vstri[bh][lr]
target/ppc: implement vclrlb
target/ppc: implement vclrrb
target/ppc: implement vcntmb[bhwd]
target/ppc: implement vgnb
target/ppc: move vs[lr][a][bhwd] to decodetree
target/ppc: implement vslq
target/ppc: implement vsrq
target/ppc: implement vsraq
target/ppc: move vrl[bhwd] to decodetree
target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetree
target/ppc: implement vrlq
target/ppc: implement vrlqnm
target/ppc: implement vrlqmi
target/ppc: Move vsel and vperm/vpermr to decodetree
target/ppc: Move xxsel to decodetree
target/ppc: move xxperm/xxpermr to decodetree
target/ppc: Move xxpermdi to decodetree
target/ppc: Implement xxpermx instruction
tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i
target/ppc: Implement xxeval
target/ppc: Implement xxgenpcv[bhwd]m instruction
target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree
target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]
Víctor Colombo (11):
target/ppc: Implement vmsumcud instruction
target/ppc: Implement vmsumudm instruction
target/ppc: Implement xvtlsbb instruction
target/ppc: Remove xscmpnedp instruction
target/ppc: Refactor VSX_SCALAR_CMP_DP
target/ppc: Implement xscmp{eq,ge,gt}qp
target/ppc: Move xscmp{eq,ge,gt}dp to decodetree
target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3
target/ppc: Refactor VSX_MAX_MINC helper
target/ppc: Implement xs{max,min}cqp
target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions
hw/intc/pnv_xive2_regs.h | 442 ++++++++
include/hw/pci-host/pnv_phb4.h | 12 +
include/hw/pci-host/pnv_phb4_regs.h | 3 +
include/hw/ppc/pnv.h | 39 +
include/hw/ppc/pnv_homer.h | 3 +
include/hw/ppc/pnv_occ.h | 2 +
include/hw/ppc/pnv_xive.h | 71 ++
include/hw/ppc/pnv_xscom.h | 15 +
include/hw/ppc/xive.h | 10 +-
include/hw/ppc/xive2.h | 109 ++
include/hw/ppc/xive2_regs.h | 210 ++++
include/tcg/tcg-op-gvec.h | 22 +
target/ppc/cpu.h | 10 +-
target/ppc/helper.h | 155 ++-
target/ppc/power8-pmu.h | 4 +-
target/ppc/insn32.decode | 234 +++-
target/ppc/insn64.decode | 56 +-
hw/intc/pnv_xive.c | 37 +-
hw/intc/pnv_xive2.c | 2128 +++++++++++++++++++++++++++++++++++
hw/intc/spapr_xive.c | 25 +
hw/intc/xive.c | 77 +-
hw/intc/xive2.c | 1018 +++++++++++++++++
hw/pci-host/pnv_phb4.c | 143 ++-
hw/pci-host/pnv_phb4_pec.c | 53 +
hw/ppc/pnv.c | 227 +++-
hw/ppc/pnv_homer.c | 64 ++
hw/ppc/pnv_occ.c | 16 +
hw/ppc/pnv_psi.c | 38 +-
hw/ppc/spapr.c | 31 +-
hw/ppc/spapr_caps.c | 22 +-
hw/ppc/spapr_drc.c | 47 +-
hw/ppc/spapr_numa.c | 16 +-
hw/ppc/spapr_pci_nvlink2.c | 10 +-
hw/ppc/spapr_rtas.c | 25 +-
hw/ppc/spapr_vio.c | 6 +-
target/ppc/cpu_init.c | 20 +-
target/ppc/excp_helper.c | 81 ++
target/ppc/fpu_helper.c | 219 ++--
target/ppc/int_helper.c | 406 ++++---
target/ppc/machine.c | 6 +-
target/ppc/power8-pmu.c | 39 +-
target/ppc/translate.c | 58 +-
tcg/tcg-op-gvec.c | 146 +++
target/ppc/translate/vmx-impl.c.inc | 1348 ++++++++++++++++++++--
target/ppc/translate/vmx-ops.c.inc | 59 +-
target/ppc/translate/vsx-impl.c.inc | 842 +++++++++++---
target/ppc/translate/vsx-ops.c.inc | 67 --
tcg/ppc/tcg-target.c.inc | 6 +
hw/intc/meson.build | 4 +-
hw/pci-host/trace-events | 2 +
target/ppc/meson.build | 2 +-
51 files changed, 7737 insertions(+), 948 deletions(-)
create mode 100644 hw/intc/pnv_xive2_regs.h
create mode 100644 include/hw/ppc/xive2.h
create mode 100644 include/hw/ppc/xive2_regs.h
create mode 100644 hw/intc/pnv_xive2.c
create mode 100644 hw/intc/xive2.c