target/riscv: Fix vill field write in vtype

[PATCH] target/riscv: Fix vill field write in vtype

LIU Zhiwei posted 1 patch 2 years, 3 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20220201064601.41143-1-zhiwei_liu@c-sky.com

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bin.meng@windriver.com>, Alistair Francis <alistair.francis@wdc.com>

target/riscv/vector_helper.c | 1 +
1 file changed, 1 insertion(+)

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[PATCH] target/riscv: Fix vill field write in vtype

Posted by LIU Zhiwei 2 years, 3 months ago

The guest should be able to set the vill bit as part of vsetvl.

Currently we may set env->vill to 1 in the vsetvl helper, but there
is nowhere that we set it to 0, so once it transitions to 1 it's stuck
there until the system is reset.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
 target/riscv/vector_helper.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 020d2e841f..3bd4aac9c9 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -71,6 +71,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
     env->vl = vl;
     env->vtype = s2;
     env->vstart = 0;
+    env->vill = 0;
     return vl;
 }
 
-- 
2.25.1

Re: [PATCH] target/riscv: Fix vill field write in vtype

Posted by Richard Henderson 2 years, 3 months ago

On 2/1/22 17:46, LIU Zhiwei wrote:
> The guest should be able to set the vill bit as part of vsetvl.
> 
> Currently we may set env->vill to 1 in the vsetvl helper, but there
> is nowhere that we set it to 0, so once it transitions to 1 it's stuck
> there until the system is reset.
> 
> Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
> ---
>   target/riscv/vector_helper.c | 1 +
>   1 file changed, 1 insertion(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH] target/riscv: Fix vill field write in vtype

Posted by Alistair Francis 2 years, 3 months ago

On Tue, Feb 1, 2022 at 5:08 PM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> The guest should be able to set the vill bit as part of vsetvl.
>
> Currently we may set env->vill to 1 in the vsetvl helper, but there
> is nowhere that we set it to 0, so once it transitions to 1 it's stuck
> there until the system is reset.
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/vector_helper.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 020d2e841f..3bd4aac9c9 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -71,6 +71,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
>      env->vl = vl;
>      env->vtype = s2;
>      env->vstart = 0;
> +    env->vill = 0;
>      return vl;
>  }
>
> --
> 2.25.1
>
>