[PULL 00/32] target-arm queue

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docs/conf.py                               |    2 +-
hw/intc/gicv3_internal.h                   |   43 +-
include/hw/arm/xlnx-versal.h               |   30 +-
include/hw/dma/xlnx_csu_dma.h              |   24 +-
include/hw/intc/arm_gicv3_its_common.h     |    1 -
include/hw/misc/xlnx-versal-pmc-iou-slcr.h |   78 ++
include/hw/ssi/xlnx-versal-ospi.h          |  111 ++
include/qemu-common.h                      |    5 +-
include/sysemu/rtc.h                       |   58 +
target/arm/internals.h                     |    2 +-
hw/arm/armv7m.c                            |    4 +-
hw/arm/aspeed_ast2600.c                    |    2 +-
hw/arm/omap1.c                             |    2 +-
hw/arm/pxa2xx.c                            |    2 +-
hw/arm/strongarm.c                         |    2 +-
hw/arm/xlnx-versal-virt.c                  |   25 +-
hw/arm/xlnx-versal.c                       |  190 ++-
hw/block/m25p80.c                          |    2 +
hw/char/exynos4210_uart.c                  |    2 +-
hw/dma/xlnx_csu_dma.c                      |   17 +
hw/intc/arm_gicv3.c                        |    1 +
hw/intc/arm_gicv3_common.c                 |    9 +
hw/intc/arm_gicv3_its.c                    |  258 +++-
hw/intc/arm_gicv3_redist.c                 |  115 +-
hw/misc/mac_via.c                          |    2 +-
hw/misc/macio/cuda.c                       |    2 +-
hw/misc/macio/pmu.c                        |    2 +-
hw/misc/xlnx-versal-pmc-iou-slcr.c         | 1446 ++++++++++++++++++++++
hw/ppc/spapr_rtc.c                         |    2 +-
hw/rtc/allwinner-rtc.c                     |    2 +-
hw/rtc/aspeed_rtc.c                        |    2 +-
hw/rtc/ds1338.c                            |    2 +-
hw/rtc/exynos4210_rtc.c                    |    2 +-
hw/rtc/goldfish_rtc.c                      |    2 +-
hw/rtc/m41t80.c                            |    2 +-
hw/rtc/m48t59.c                            |    2 +-
hw/rtc/mc146818rtc.c                       |    2 +-
hw/rtc/pl031.c                             |    2 +-
hw/rtc/twl92230.c                          |    2 +-
hw/rtc/xlnx-zynqmp-rtc.c                   |    2 +-
hw/s390x/tod-tcg.c                         |    2 +-
hw/scsi/megasas.c                          |    2 +-
hw/ssi/xlnx-versal-ospi.c                  | 1853 ++++++++++++++++++++++++++++
net/dump.c                                 |    2 +-
softmmu/rtc.c                              |    2 +-
target/arm/helper.c                        |   13 +-
target/arm/m_helper.c                      |    2 +-
MAINTAINERS                                |    7 +-
hw/intc/trace-events                       |    8 +
hw/misc/meson.build                        |    5 +-
hw/ssi/meson.build                         |    1 +
scripts/update-linux-headers.sh            |   16 +
52 files changed, 4300 insertions(+), 74 deletions(-)
create mode 100644 include/hw/misc/xlnx-versal-pmc-iou-slcr.h
create mode 100644 include/hw/ssi/xlnx-versal-ospi.h
create mode 100644 include/sysemu/rtc.h
create mode 100644 hw/misc/xlnx-versal-pmc-iou-slcr.c
create mode 100644 hw/ssi/xlnx-versal-ospi.c
[PULL 00/32] target-arm queue
Posted by Peter Maydell 2 years, 3 months ago
The following changes since commit b367db48126d4ee14579af6cf5cdbffeb9496627:

  Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20220127' into staging (2022-01-28 11:05:29 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220128

for you to fetch changes up to 2c023d3675a3ffb54fc30504dcd715bc6f6e234f:

  target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp (2022-01-28 14:30:36 +0000)

----------------------------------------------------------------
target-arm queue:
 * Update copyright dates to 2022
 * hw/armv7m: Fix broken VMStateDescription
 * hw/char/exynos4210_uart: Fix crash on trying to load VM state
 * rtc: Move RTC function prototypes to their own header
 * xlnx-versal-virt: Support PMC SLCR
 * xlnx-versal-virt: Support OSPI flash memory controller
 * scripts: Explain the difference between linux-headers and standard-headers
 * target/arm: Log CPU index in 'Taking exception' log
 * arm_gicv3_its: Various bugfixes and cleanups
 * arm_gicv3_its: Implement the missing MOVI and MOVALL commands
 * ast2600: Fix address mapping of second SPI controller
 * target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp

----------------------------------------------------------------
Andrew Baumann (1):
      MAINTAINERS: Remove myself (for raspi).

Cédric Le Goater (1):
      hw/arm: ast2600: Fix address mapping of second SPI controller

Francisco Iglesias (10):
      hw/misc: Add a model of Versal's PMC SLCR
      hw/arm/xlnx-versal: 'Or' the interrupts from the BBRAM and RTC models
      hw/arm/xlnx-versal: Connect Versal's PMC SLCR
      include/hw/dma/xlnx_csu_dma: Add in missing includes in the header
      hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method
      hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller
      hw/arm/xlnx-versal: Connect the OSPI flash memory controller model
      hw/block/m25p80: Add support for Micron Xccela flash mt35xu01g
      hw/arm/xlnx-versal-virt: Connect mt35xu01g flashes to the OSPI
      MAINTAINERS: Add an entry for Xilinx Versal OSPI

Peter Maydell (20):
      Update copyright dates to 2022
      hw/armv7m: Fix broken VMStateDescription
      hw/char/exynos4210_uart: Fix crash on trying to load VM state
      rtc: Move RTC function prototypes to their own header
      scripts: Explain the difference between linux-headers and standard-headers
      target/arm: Log CPU index in 'Taking exception' log
      hw/intc/arm_gicv3_its: Add tracepoints
      hw/intc/arm_gicv3: Initialise dma_as in GIC, not ITS
      hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set
      hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER
      hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs
      hw/intc/arm_gicv3_its: Sort ITS command list into numeric order
      hw/intc/arm_gicv3_redist: Remove unnecessary zero checks
      hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported
      hw/intc/arm_gicv3_its: Provide read accessor for translation_ops
      hw/intc/arm_gicv3_its: Make GITS_BASER<n> RAZ/WI for unimplemented registers
      hw/intc/arm_gicv3_its: Check table bounds against correct limit
      hw/intc/arm_gicv3_its: Implement MOVALL
      hw/intc/arm_gicv3_its: Implement MOVI
      target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp

 docs/conf.py                               |    2 +-
 hw/intc/gicv3_internal.h                   |   43 +-
 include/hw/arm/xlnx-versal.h               |   30 +-
 include/hw/dma/xlnx_csu_dma.h              |   24 +-
 include/hw/intc/arm_gicv3_its_common.h     |    1 -
 include/hw/misc/xlnx-versal-pmc-iou-slcr.h |   78 ++
 include/hw/ssi/xlnx-versal-ospi.h          |  111 ++
 include/qemu-common.h                      |    5 +-
 include/sysemu/rtc.h                       |   58 +
 target/arm/internals.h                     |    2 +-
 hw/arm/armv7m.c                            |    4 +-
 hw/arm/aspeed_ast2600.c                    |    2 +-
 hw/arm/omap1.c                             |    2 +-
 hw/arm/pxa2xx.c                            |    2 +-
 hw/arm/strongarm.c                         |    2 +-
 hw/arm/xlnx-versal-virt.c                  |   25 +-
 hw/arm/xlnx-versal.c                       |  190 ++-
 hw/block/m25p80.c                          |    2 +
 hw/char/exynos4210_uart.c                  |    2 +-
 hw/dma/xlnx_csu_dma.c                      |   17 +
 hw/intc/arm_gicv3.c                        |    1 +
 hw/intc/arm_gicv3_common.c                 |    9 +
 hw/intc/arm_gicv3_its.c                    |  258 +++-
 hw/intc/arm_gicv3_redist.c                 |  115 +-
 hw/misc/mac_via.c                          |    2 +-
 hw/misc/macio/cuda.c                       |    2 +-
 hw/misc/macio/pmu.c                        |    2 +-
 hw/misc/xlnx-versal-pmc-iou-slcr.c         | 1446 ++++++++++++++++++++++
 hw/ppc/spapr_rtc.c                         |    2 +-
 hw/rtc/allwinner-rtc.c                     |    2 +-
 hw/rtc/aspeed_rtc.c                        |    2 +-
 hw/rtc/ds1338.c                            |    2 +-
 hw/rtc/exynos4210_rtc.c                    |    2 +-
 hw/rtc/goldfish_rtc.c                      |    2 +-
 hw/rtc/m41t80.c                            |    2 +-
 hw/rtc/m48t59.c                            |    2 +-
 hw/rtc/mc146818rtc.c                       |    2 +-
 hw/rtc/pl031.c                             |    2 +-
 hw/rtc/twl92230.c                          |    2 +-
 hw/rtc/xlnx-zynqmp-rtc.c                   |    2 +-
 hw/s390x/tod-tcg.c                         |    2 +-
 hw/scsi/megasas.c                          |    2 +-
 hw/ssi/xlnx-versal-ospi.c                  | 1853 ++++++++++++++++++++++++++++
 net/dump.c                                 |    2 +-
 softmmu/rtc.c                              |    2 +-
 target/arm/helper.c                        |   13 +-
 target/arm/m_helper.c                      |    2 +-
 MAINTAINERS                                |    7 +-
 hw/intc/trace-events                       |    8 +
 hw/misc/meson.build                        |    5 +-
 hw/ssi/meson.build                         |    1 +
 scripts/update-linux-headers.sh            |   16 +
 52 files changed, 4300 insertions(+), 74 deletions(-)
 create mode 100644 include/hw/misc/xlnx-versal-pmc-iou-slcr.h
 create mode 100644 include/hw/ssi/xlnx-versal-ospi.h
 create mode 100644 include/sysemu/rtc.h
 create mode 100644 hw/misc/xlnx-versal-pmc-iou-slcr.c
 create mode 100644 hw/ssi/xlnx-versal-ospi.c

Re: [PULL 00/32] target-arm queue
Posted by Peter Maydell 2 years, 3 months ago
On Fri, 28 Jan 2022 at 15:30, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> The following changes since commit b367db48126d4ee14579af6cf5cdbffeb9496627:
>
>   Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20220127' into staging (2022-01-28 11:05:29 +0000)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220128
>
> for you to fetch changes up to 2c023d3675a3ffb54fc30504dcd715bc6f6e234f:
>
>   target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp (2022-01-28 14:30:36 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * Update copyright dates to 2022
>  * hw/armv7m: Fix broken VMStateDescription
>  * hw/char/exynos4210_uart: Fix crash on trying to load VM state
>  * rtc: Move RTC function prototypes to their own header
>  * xlnx-versal-virt: Support PMC SLCR
>  * xlnx-versal-virt: Support OSPI flash memory controller
>  * scripts: Explain the difference between linux-headers and standard-headers
>  * target/arm: Log CPU index in 'Taking exception' log
>  * arm_gicv3_its: Various bugfixes and cleanups
>  * arm_gicv3_its: Implement the missing MOVI and MOVALL commands
>  * ast2600: Fix address mapping of second SPI controller
>  * target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.

-- PMM