| 1 | The following changes since commit 7bb1272f40bdbdebcaec1737c412dcb52e414842: | 1 | The following changes since commit 2480f3bbd03814b0651a1f74959f5c6631ee5819: |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/python-pull-request' into staging (2022-01-11 14:20:42 +0000) | 3 | Merge tag 'linux-user-for-7.1-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging (2022-08-03 08:32:44 -0700) |
| 4 | 4 | ||
| 5 | are available in the Git repository at: | 5 | are available in the Git repository at: |
| 6 | 6 | ||
| 7 | https://github.com/legoater/qemu/ tags/pull-ppc-20220112 | 7 | https://gitlab.com/danielhb/qemu.git tags/pull-ppc-20220804 |
| 8 | 8 | ||
| 9 | for you to fetch changes up to f83460bb203a49dd1693bf8b664d2a935a5be621: | 9 | for you to fetch changes up to ed021daf2d6c19499ae406055156dc19c073228f: |
| 10 | 10 | ||
| 11 | ppc/pnv: use stack->pci_regs[] in pnv_pec_stk_pci_xscom_write() (2022-01-12 11:28:27 +0100) | 11 | hw/ppc: sam460ex.c: store all GPIO lines in mal_irqs[] (2022-08-04 15:20:14 -0300) |
| 12 | 12 | ||
| 13 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
| 14 | ppc 7.0 queue: | 14 | ppc patch queue for 2022-08-04: |
| 15 | 15 | ||
| 16 | * New SLOF for PPC970 and POWER5+ (Alexey) | 16 | In this short queue we have a fix in the sam460ex machine where we're |
| 17 | * Fixes for POWER5+ pseries (Cedric) | 17 | not storing all GPIO lines in sam460ex_init(). |
| 18 | * Updates of documentation (Leonardo and Thomas) | 18 | |
| 19 | * First step of exception model cleanup (Fabiano) | 19 | This is not causing problems (as far as we're aware of) at this moment, |
| 20 | * User created PHB3/PHB4 devices (Daniel and Cedric) | 20 | but this is getting in the way of a ppc405 rework we want to do for 7.2, |
| 21 | so let's fix it now. | ||
| 21 | 22 | ||
| 22 | ---------------------------------------------------------------- | 23 | ---------------------------------------------------------------- |
| 23 | Alexey Kardashevskiy (1): | 24 | Daniel Henrique Barboza (1): |
| 24 | pseries: Update SLOF firmware image | 25 | hw/ppc: sam460ex.c: store all GPIO lines in mal_irqs[] |
| 25 | 26 | ||
| 26 | Cédric Le Goater (9): | 27 | hw/ppc/sam460ex.c | 2 +- |
| 27 | Merge tag 'qemu-slof-20220110' of github.com:aik/qemu into ppc-7.0 | 28 | 1 file changed, 1 insertion(+), 1 deletion(-) |
| 28 | target/ppc: Add popcntb instruction to POWER5+ processors | ||
| 29 | spapr: Fix support of POWER5+ processors | ||
| 30 | target/ppc: Add extra float instructions to POWER5P processors | ||
| 31 | ppc/pnv: Attach PHB3 root port device when defaults are enabled | ||
| 32 | ppc/pnv: Introduce support for user created PHB3 devices | ||
| 33 | ppc/pnv: Reparent user created PHB3 devices to the PnvChip | ||
| 34 | ppc/pnv: Complete user created PHB3 devices | ||
| 35 | ppc/pnv: Move num_phbs under Pnv8Chip | ||
| 36 | |||
| 37 | Daniel Henrique Barboza (14): | ||
| 38 | pnv_phb3.c: add unique chassis and slot for pnv_phb3_root_port | ||
| 39 | pnv_phb4.c: add unique chassis and slot for pnv_phb4_root_port | ||
| 40 | pnv_phb4.c: make pnv-phb4-root-port user creatable | ||
| 41 | pnv_phb4.c: check if root port exists in rc_config functions | ||
| 42 | pnv_phb3.h: change TYPE_PNV_PHB3_ROOT_BUS name | ||
| 43 | pnv_phb4.c: change TYPE_PNV_PHB4_ROOT_BUS name | ||
| 44 | pnv_phb4_pec.c: move pnv_pec_phb_offset() to pnv_phb4.c | ||
| 45 | pnv_phb4_pec: use pnv_phb4_pec_get_phb_id() in pnv_pec_dt_xscom() | ||
| 46 | ppc/pnv: set phb4 properties in stk_realize() | ||
| 47 | ppc/pnv: move PHB4 XSCOM init to phb4_realize() | ||
| 48 | ppc/pnv: turn 'phb' into a pointer in struct PnvPhb4PecStack | ||
| 49 | ppc/pnv: Introduce user creatable pnv-phb4 devices | ||
| 50 | ppc/pnv: turn pnv_phb4_update_regions() into static | ||
| 51 | ppc/pnv: use stack->pci_regs[] in pnv_pec_stk_pci_xscom_write() | ||
| 52 | |||
| 53 | Fabiano Rosas (8): | ||
| 54 | target/ppc: powerpc_excp: Extract software TLB logging into a function | ||
| 55 | target/ppc: powerpc_excp: Keep 60x/7x5 soft MMU logs active | ||
| 56 | target/ppc: powerpc_excp: Group unimplemented exceptions | ||
| 57 | target/ppc: Add HV support to ppc_interrupts_little_endian | ||
| 58 | target/ppc: Add MSR_ILE support to ppc_interrupts_little_endian | ||
| 59 | target/ppc: Use ppc_interrupts_little_endian in powerpc_excp | ||
| 60 | target/ppc: Introduce a wrapper for powerpc_excp | ||
| 61 | target/ppc: Set the correct endianness for powernv memory dumps | ||
| 62 | |||
| 63 | Leonardo Garcia (1): | ||
| 64 | docs: Clarifications and formatting changes in ppc docs. | ||
| 65 | |||
| 66 | Thomas Huth (2): | ||
| 67 | docs/system/ppc: Merge the PEF information into the pseries page | ||
| 68 | MAINTAINERS: Improve the PowerPC machines section | ||
| 69 | |||
| 70 | docs/papr-pef.txt | 30 --- | ||
| 71 | docs/specs/ppc-spapr-hcalls.rst | 21 +- | ||
| 72 | docs/system/ppc/pseries.rst | 75 +++++-- | ||
| 73 | include/hw/pci-host/pnv_phb3.h | 4 +- | ||
| 74 | include/hw/pci-host/pnv_phb4.h | 14 +- | ||
| 75 | include/hw/ppc/pnv.h | 8 +- | ||
| 76 | target/ppc/cpu.h | 25 ++- | ||
| 77 | hw/pci-host/pnv_phb3.c | 57 ++++- | ||
| 78 | hw/pci-host/pnv_phb4.c | 486 ++++++++++++++++++++++++++++++++++++---- | ||
| 79 | hw/pci-host/pnv_phb4_pec.c | 347 ++-------------------------- | ||
| 80 | hw/ppc/pnv.c | 55 ++++- | ||
| 81 | hw/ppc/spapr.c | 10 +- | ||
| 82 | target/ppc/arch_dump.c | 2 +- | ||
| 83 | target/ppc/cpu_init.c | 2 + | ||
| 84 | target/ppc/excp_helper.c | 185 +++++---------- | ||
| 85 | MAINTAINERS | 12 +- | ||
| 86 | pc-bios/README | 2 +- | ||
| 87 | pc-bios/slof.bin | Bin 991920 -> 992384 bytes | ||
| 88 | roms/SLOF | 2 +- | ||
| 89 | 19 files changed, 737 insertions(+), 600 deletions(-) | ||
| 90 | delete mode 100644 docs/papr-pef.txt | ||
| 91 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Alexey Kardashevskiy <aik@ozlabs.ru> | ||
| 2 | 1 | ||
| 3 | The only change is that SLOF is compiled with -mcpu=power5 | ||
| 4 | to make it work on PPC970 too. | ||
| 5 | |||
| 6 | Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> | ||
| 7 | --- | ||
| 8 | pc-bios/README | 2 +- | ||
| 9 | pc-bios/slof.bin | Bin 991920 -> 992384 bytes | ||
| 10 | roms/SLOF | 2 +- | ||
| 11 | 3 files changed, 2 insertions(+), 2 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/pc-bios/README b/pc-bios/README | ||
| 14 | index XXXXXXX..XXXXXXX 100644 | ||
| 15 | --- a/pc-bios/README | ||
| 16 | +++ b/pc-bios/README | ||
| 17 | @@ -XXX,XX +XXX,XX @@ | ||
| 18 | - SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware | ||
| 19 | implementation for certain IBM POWER hardware. The sources are at | ||
| 20 | https://github.com/aik/SLOF, and the image currently in qemu is | ||
| 21 | - built from git tag qemu-slof-20211112. | ||
| 22 | + built from git tag qemu-slof-20220110. | ||
| 23 | |||
| 24 | - VOF (Virtual Open Firmware) is a minimalistic firmware to work with | ||
| 25 | -machine pseries,x-vof=on. When enabled, the firmware acts as a slim shim and | ||
| 26 | diff --git a/pc-bios/slof.bin b/pc-bios/slof.bin | ||
| 27 | index XXXXXXX..XXXXXXX 100644 | ||
| 28 | GIT binary patch | ||
| 29 | delta 267695 | ||
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| 1897 | z;eWi|Zk~#hWv;34O6RZes|Xy+hnegSmKDSJFcT}rQ!z*?w4y@R6&226rchB8IL6ME | ||
| 1898 | zL&Z3~VhB_?!{qwI#_mLw0d7nMSMRppb|YukIle+DF@LSmUttDw1&;Qz!Ya(1S}{uo | ||
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| 1904 | zDLJi|RaxEy5658F`iE8abWC8JKCF@qHYFK>cf7f#9Wg;FcEmIlMLsaXjXe&1lzc?g | ||
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| 1910 | z%Q<sf`ezmFA5l5VM|m81t>};PD_=R~gB*Fp$Z^;Ya#hja>+_yfWtg}h(n`}Er4}Q{ | ||
| 1911 | z(AV+>jyz@L_o*D})%|l?X9bNIFGTc*cnz|4kqY9p3iU%<j@m01y;1wbTH)Firj?S% | ||
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| 1914 | z8hK17p*||sAO1sAk^@Mv1E{n3+|mH_WpgJprb$-UW43A3m|ZGz7SQKn$AQ~L=Z@Fx | ||
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| 1916 | zSezE;-sadk6(30cauqs5kF&JSHj1^e&BoeGV(ne!8wB*%2CM9ur0AMD539Uo`x>5K | ||
| 1917 | z==@>{?rXSP)_fdYCx2XTeMuQNQr6+)FzG`a7<Uz_?d$mGW&IUWnSb0Y1_ia*N=J3x | ||
| 1918 | zRJjzLH%H|e>^ha8_`DXmNSt@jh`*3~hpOI$;VXk{bxl@b-|tNHX->pkcZ|`F9-kj4 | ||
| 1919 | zE%R65`DqZ1Ud3VFnS76yd(JP>WjKF;l;Ql^<Y4$XzfSpvAfzSQ)%nY%(awKVvTKq< | ||
| 1920 | z*%VrFyxCS9KS_nioh(&2zD6aOoh{tChFhntk8e;p#O4{lQib5H-}r}}7#pMv<JJAx | ||
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| 1922 | zjNb+jt%vcCTITvO9tW||fdk`T2iK~=xpjoW>RuJsa*nFbqQj9KEkEGs$C0N#E`1yz | ||
| 1923 | z<J)zeT!6;}Y_AJ&`_<)2Ae_#Fk1K|U0Db}9yVew+l3<U&V1kT<3nDTSE-<_P7vS2j | ||
| 1924 | zarf!cUVu9hj=KpsanEhU33wBSU4BA9T4n-vJ1fv$*hr}Gj_$I=NU{IIjy~a0lV4-< | ||
| 1925 | z2X)LBq61ezeBol8WWlQE!n{figApA4BB>EFUr2+>l3608w-9^)k<0};#*1*cfiYh6 | ||
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| 2527 | a>5${g1^Dm&4;^0~c;wc-zxi};+y4jIZp5?z | ||
| 2528 | |||
| 2529 | delta 267618 | ||
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| 2557 | z$67!T(fSVW+Y9W|+4ReQy>$i$@gi^Eg8y&aP9!{WdyIjYrJbt{?a}Jt|HK&XKM`Z} | ||
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| 2564 | zX?iBQ8#ByR&7g=gWY4+^7UU0QBlK-cU=3BUaQ{wb@*iPle=|!2t6Rb9<9`9GSEVi@ | ||
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| 2567 | z&j$c#@4Np4(7N~e{V4a<-En%`5LKOB7MxlYaZmU_kdSYvfJlgE%7#Z6pUBi!O~hAC | ||
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| 2569 | zCGk_h-YiLbOI7VBP+<Y9Yq`u6On~LYlw`xW?;7MHwV0!xeSy-XSy#;zYgyY-nm|pf | ||
| 2570 | znS#7^l!uw@^PUdbBaS{tN;py%6bwzpETQ7B$94UI*;h-*T8vzpH{bx3_rCL;OTzFl | ||
| 2571 | z#e0_8IP*-^V@q?z(f#~7;r&t<9}fNh4HdPdL8BFf?184MvpE<Orhh1XhhfsVC-@z< | ||
| 2572 | zY{tE6%M+gLkUfqPwY4Z4BKOXljc#2og9>%5|4KKAhgVhJJB{Wes&gpZGLiT+?+bJ; | ||
| 2573 | z-y65g7T<Qvy$a&s<XBg87Ob)*Oy8Ey3fmSi7n*GJKHuUZ8<mu{I{_`mLlk7UKjDc- | ||
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| 4013 | z@zd||hClQVf2Z+}HP-ZyKh_GY6WAcINnne>c7Z8@odVMWySl?q2zA0kK8Xm7b%P6r | ||
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| 4017 | zr_E009|V7h@CZcc7x9mNGc-Kc$pPh7BFV+<sAC3wi`X?_4^kc=XCLg@mc141@x8Iv | ||
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| 4027 | zi^tt(^8Xde@5P0Ug!DP&v43MKh<!l&bQ`qq^Vo+?BeBh?4C6aI_6uew*k#Wa2)h;9 | ||
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| 4029 | zwlh6|&I+FA(Vr<|x`RFrUKnv}pe1fv?+Xnp+q+fx<>0UI^qy-HdKKt5c=T75{v_y) | ||
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| 4031 | zl*fM4JOy^(9rMO_LQ`{pqb=To#*X)--p1EpqPsdv#R?MDr_5u&lV*BgDClcF`hMh$ | ||
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| 4042 | zbFJ#X(i3{i%>FmnIGzv(HL&q@kA1|f2fOT@q_7LY&RDAs0Jm2Q=s)n(o{uv*PzCza | ||
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| 4044 | z!|?W8EvwOZ4rNS8FPVFY{kAxxSAjzrQ}bKqDPkW(M(Cm?F0|1ze#Cr8>_bJ&4(<iJ | ||
| 4045 | z$zwlf@*lx`b=*`u0;v<4r|FRTFHh<j(@5-eT8ykjeN=etJ!U7d57aW-se<-zJoa&O | ||
| 4046 | zl-PSEEp)$;oiWh%;tTnZ%~v(qr@$VSp)F1W1)!hn(O+y~Z++0<>{%ZDJ+mI>a$nyq | ||
| 4047 | z!JzN5mwD`W%mc*UC)z=>db7uV(d-9%!0Vl&-D0}7hsNi<-l{mnGX_@6P*eE*(6Gj% | ||
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| 4049 | z2IuZevru5H;|!piuD*naha5B?ejl?cI!&(u6Fu&GCch0_WdRPz7@V(|iZ%@W=R1Wz | ||
| 4050 | z6zppv?kspq%p}_|^xr}n>7sqWfQ;&U#_WW8?%Sozc2Z#9?fE`rjuQL%6U+|o0Q*so | ||
| 4051 | zebfy4cT~oaxUe4vJEJO}MI81*QU<)_sdXL{dII!!JbH&&4|BO4r<ff;?gxD4v7a{& | ||
| 4052 | z5c^qeYSMAe%E;4Rv!B>Ugx#+k>{3rVZBBz7c-0JlG_*YTJq@iEQvaMOb<d+P@<vQT | ||
| 4053 | z066Q19{VNp6tUmc-T*wS+s5WYV!xPXZD%XkzxT8cn*1MNEO+9&+iWCjfaM--VBst* | ||
| 4054 | z)B`U@SRum0(Z|eANag;fU2MVCz>FdNYjc#?>4dN`qz7K-xq8tI+5uP3o7p=;Ik_T3 | ||
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| 4056 | z9QcN3?j>^??6S97ncX)A_QxLk1*ySc2k56g`di2%U4bMX1AgA4A2G{+2ydNjmg_k8 | ||
| 4057 | z1Af<IpD_1;UDlkj=AB*XvELN6p%`^%XG}i_3)oz6Cg^pZ{C@KxdD~kf-gbli4UdgY | ||
| 4058 | z+hg3dkKs0_te;2$oc*#VbwCnI>($vAh5zy?kuL)Mk6xmiJ5Bpz7`>fc%<qF534hMB | ||
| 4059 | zx6d4fyWC&52zwpa8F%$Z%%GiMztt($Tfx5E(>`Qo?+oRXWeFD`yw2mkh*<2k1N7TH | ||
| 4060 | z`l~ri4j|0%eO|1awwczQi1koR_+!D(xZnJ>*-ybdCrt@rq6%kBxUZYjV3!>|$lA1b | ||
| 4061 | z44?449@8Qi2zthSB@TG(6~ymB8Jp;RW_dfjbxN?#9<WDdZY}R2_TE<3?vn;PV^V$B | ||
| 4062 | zJOy^(J@ZC8M(Dl}O9l2qDr4^amC64POucV(Fq=XibZ<sNj+w-NAR*755Plo@JG~~Q | ||
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| 4064 | z7kO-K)rtL57qf#f9Ld<tzGc>f9sK2Cv-L-zDWf~m;^bb48PCe=+O%!v;EzJ%&wryx | ||
| 4065 | z<hDTWRX5#3{;YD?h($8${(zbKV?<$I6E%Rrj%WTIvz*v3q=XGPxWHq-Xzn5Q>jlDw | ||
| 4066 | z^T8QA_;<`xV3!?}1ks{9IHSG~H;CFv&@&FL4oga$p`ibR=k2h`-vw{S+eK|9*cluA | ||
| 4067 | zUz-YIzo#uFZx4IgxZei5?4ShWbb|ea$9^%!Rs&@9#fUpYH@Ap4fWaBJQm>n%yD;5! | ||
| 4068 | zm_h$ZF^RU*0jZ1y^9?hb*w3WdNMN($49VQMnf1heek-$S*E?jU7t`D30b;*%O4xC* | ||
| 4069 | zmwN2OW<S_@`&)(G1ol68k(+hRKS6mu*Cy;bu-iQC=grig!1&P=vx5(V-QltKnB~NN | ||
| 4070 | zPWxyb*vC9JZnlX1E4Z^)Jq{4V9(%ueirCL+<lB&zT^@Un`S2&$P{E~M(F;5-Hr$Ux | ||
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| 4072 | zALtVL2+)6;L4SPE?oiRNzy_0kD>Te(+7}vRZrB$Z5Ex<#_l1T9`wufs`w-P=%U{rc | ||
| 4073 | z8qCn)FhN}XCeiP3r2h;6qD#~+o!;`KJ%Pwi>%iY6Ki9<ehlZcO%*Rd%d#%vpghM+; | ||
| 4074 | zzoB-cN$d|zHD-S(V(!@=3Jrb*^bGsw7nv07ny0|aJtRDd>HH!w@_|Y3$NhVVW_J1! | ||
| 4075 | zK5@xO=zAv8i6(D1ae(t51+kk4k@}I)eb%$HOg+@_%+d+a1Bd}6t`{CAZZWN$a6XV6 | ||
| 4076 | z|1*9hF)R^|4D4q*N&N%}FyU7pHnjO=aNEGSrWfupQ%LLxSc`hHhhJrCiH(YKcJ#tN | ||
| 4077 | zW}3hbl$#WRHVbl(L2!Cc;oOMnBB`rPd|>vlU~Y?vy#mvFA$e|3={(0Izz!6c);^HV | ||
| 4078 | zn`M%O&Nb}-=P!W5jrj4UB9EFtbYK7E;fRoYrNN>)@n!h)LrvsWuxr37=!L!8#9u`R | ||
| 4079 | zU>rEKi}tIJC^Yq?zWEI79n7W)pcn0P3QQ+yZ#)D0VapD5ncCOT{z6kopq{ba7TBKe | ||
| 4080 | z>KRx52-8HuD^1&Ln4c4-Hh@gVHk<T8v}P1d2mjquYhtU3y$-FD1cn9An`9C|b0JOV | ||
| 4081 | z9{#pZ``9FjjX@oV_hettVA_fOBv_MsVW&-+*r>h$-52=!WqPTJ900ootd+g651Tl# | ||
| 4082 | zheCUHPxcpZLqY5<VAF>He8#`9*R&G*GqB=4*)z~B#I6C09?Sc*XKZPH1Kboiy|}(G | ||
| 4083 | zW(tX&6h)u%g~v=Su`v-le-IG>zQU2BTGK@AdqMbD{P?tsPMH+3i@`EI*%u{E7qJh5 | ||
| 4084 | zMQQhGU;Lzr9RwSF8TevP_9ge41hJ`{?&!&$xy2-jjik}k?KggDlWC{gniT@Sq9=b= | ||
| 4085 | z0oC5{T<Xkk_rl(4B5#6CGYySkU+A+=nK-fQVf@0L?Ae{B9_&DoX}>-DbA2N5`%No} | ||
| 4086 | zBN2iAJ;mn?HJv1$FzsI>@i|+Y4?%i2Bp37|ebN+y9f+Bjm7Y7-)Dk}5qzKfTCIZ`; | ||
| 4087 | z_^2i3cEHRPJx$FEnJx(D#=&~77dGa_Ux9rLVPjnQlTbX?B#4b9I3s#tx0xidN%I>$ | ||
| 4088 | z*(Fz*c49YyMTPInaLFE%CiW??j`w8GpJXD3!L9}Cv0m8snmDnk-Iw%aUxsCl*hOFs | ||
| 4089 | z>4kljX(e_NtY>;*V;&@SC(?3OPj+cm^RK~8fLquLcZ(?`b~{*j-PGUg($7pSu}i_) | ||
| 4090 | z(vw}b!Zd*$SZz`O=dXoC#_A3XS2$9(0f6Y_-@QQJXu3#^*k8quZ^>G)N$5Vc1$UU( | ||
| 4091 | z5jefmBnXT($s?GJFP~0uc<vG?WqHQ_5r0w)mCH;!v1tj+46#7i*s_taCKEpj@GyfN | ||
| 4092 | zc0CAIrWoC8x_(aMq4K1uC#kq;1uzdB4YdVuewl{(kv{X(qwro8Gfl*vB5ZAuvWu*C | ||
| 4093 | zpp-$v3S)61lYxy4QWn_L>x}pVadB|mB;JC9_ks4skESvt><>&5JJP(Wk9_=y@INu_ | ||
| 4094 | zP{+p9?o+EL(gt;S?zh0rbe6-?)%Tgm+crzITn4ML2_UqC!2webESCle>1tE!MfZeh | ||
| 4095 | zeH)Qf|3&y3X)E)WV9Q3vLL^3eoYXr2)0*k`bkjs&t|=sdofUvt{!S<dsj{2~CVihs | ||
| 4096 | zt*p6=L8nQcgB5=1G!r|9;4T*D8e9WAUpmtyz&82ELJ{f=`um<^p^&LK7Ai1L;jh73 | ||
| 4097 | z;;PwZnvR9?bMF*`+M2W&{JM#}i&(c=yMY5HPS_#4{SVeeOeavY{#}GS*8UxsVp>U} | ||
| 4098 | zh_N`=UriOGKjGe~c|!ENOw)1bUv?b&S@!QhnDmDQugGCEW>S!##1Z(p=>o`oMPijE | ||
| 4099 | z1Zp|fWg!!L4^ktj*oOs|-C+`h-f7bB5xR}Jt-{?U@DrB$3rP(}6!8-PIi{VkNeqga | ||
| 4100 | zSi{&l3vz!VK}f;^TRDg;e{Nb~!R&kwZR%vjW9;gx(apbsQIsadbJcWHNNA}rv2~`X | ||
| 4101 | zuUczTMBZeY2s~s}wu=fDA0j@+yxnYIuPCNX?0qojn*>1aA_-4()WqR^sfwj)xnsVx | ||
| 4102 | zk<qOT_L=nih~Y~IE$R+cwb3dzx>))%6aOt*I_S4(=@L_qzjLqld2MHnt5=!`*jP$Q | ||
| 4103 | zBd~?B76wOH)i>M%s`{}hJP94gbP>QTMWBGeji!k(OfUesw5Q1!uz?giU%rin@c@T} | ||
| 4104 | zcQCexK_?S&r$oF{Ch<Fft4)$XoyBrD^lr8`$-=n(AmLWVPMP`-fDJGa0ujdYOq{R+ | ||
| 4105 | z#-?-XuPJ5pDh9hO$bD9vX;r1U4cF{tsRPX)qJOSA##on0eF(c*rVt=^zE8D_RaY!B | ||
| 4106 | zO(a!ir2@6AgOm|*E35jv(#<GM`YZOCSQq@Qc#WmgtoyO)B3*2CdT~n!e58BrBGcYw | ||
| 4107 | z-CE&VlOPQ1CA+n%`yiPyI|pN;idp9OaC_}RmOjbg6z6T_KvVzwj8c<K1q)eu<!aLj | ||
| 4108 | zHad@_0-G6Z72W$;_XD5fxafXjYCnSGm8VSMM^GNfAjic10Bn-Qa%oM^3_8KOtL`ve | ||
| 4109 | zq_c%}npo#y#&(+oSqNE>o9DAo#}-z{m_1S0wm~?OP<9a;!Er3vs$uLg6Zsesul|XN | ||
| 4110 | zTlgf~c){mFCa2YVS^1Eux6(K`CR^Bh)6}yj%XEGWG)GX(=!6yt`YluVN96r`zVKQ& | ||
| 4111 | z`ZYYS=B@F~i$QU{25YQ!@+|qLwbmNPZJwoe3H;2Y-~<DwmcR(c3N4naE0^|o8+)$1 | ||
| 4112 | z(Ih{CaJ@-?f>zXh-LwPEz1tV(Zjo*hvDete+a~fS(mKYjJ~DBOerD?bWaF@41eecs | ||
| 4113 | zI1C`_OhFTjuC&0c{}bjx6c|bT#T1@G3^b53W~5-6V^}-T)Pfy|HPi3u^xMC!3!V_s | ||
| 4114 | z4JHM)S$-;1nCl-er$puz6Z>zpVeMfy+hw}QZWaSfX8#Rrt!XE4qe-7V;B%jkT<<I6 | ||
| 4115 | zoH*OM{#KJFxw}l^paIw^UXS(vQ`o-#Tg|l=Z#AvJ^R9ms@)^URPm$<9X6mhcJIT?s | ||
| 4116 | zZ9x@-l@_=&s&r%@DUo%Xn*RqX4J0%yc*As4Na#vF+Nl4FsRf$bPyEX0=+nf0ZyIQt | ||
| 4117 | zz&@W$dYk75TSLO8{Swhx&7;pUDRMH`bo~!}-n7faJ_Fo<Rq`{Cr!&}1+vH)vn@^eq | ||
| 4118 | zsHWmGbTn?&NFvVQDh3S<aGy=Qb_RPHoG_6;gP6r2#$YCc8U`B~G?`A4tY^^B{1+fe | ||
| 4119 | zMp_x*#Z;1LXRw<j%zJ+heLfgiVY2=bIxldLIVVilU(i{by3q2E@iPEF?iG$~`pm>m | ||
| 4120 | zBc}sF>xF#_CO%^0{HIs;DU&324%l>@;WOUQYTAhnj`K=S_E)e20Xwky+pXBv-dgbO | ||
| 4121 | zNVYxp2vqizy|wn+ac~=O1K7(w_pN)rU7tNH@78qhj&2(Z55sd&2)&u!T=?xyaO2SJ | ||
| 4122 | zr45@mTGN|ppzXzvuZg$kn8HA|-Q&~g+a0C0RP*k58={$G;~;P>iFX_~O;!$f5LDq? | ||
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| 5023 | zu#p%we$)Tl68!5HU(X#gbO1zkUkByMPD*|~w`{2YenEMspRNI%<);bvi=vK;-E;+o | ||
| 5024 | c@sBMhGxz7>zpuWRxqsN{8+Uv$>NoHIe`#s92LJ#7 | ||
| 5025 | |||
| 5026 | diff --git a/roms/SLOF b/roms/SLOF | ||
| 5027 | index XXXXXXX..XXXXXXX 160000 | ||
| 5028 | --- a/roms/SLOF | ||
| 5029 | +++ b/roms/SLOF | ||
| 5030 | @@ -1 +1 @@ | ||
| 5031 | -Subproject commit a6906b024c6cca5a86496f51eb4bfee3a0c36148 | ||
| 5032 | +Subproject commit 5b4c5acdcd552a4e1796aeca6bb700f6cbb0282d | ||
| 5033 | -- | ||
| 5034 | 2.31.1 | ||
| 5035 | |||
| 5036 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | popcntb instruction was added in ISA v2.02. Add support for POWER5+ | ||
| 2 | processors since they implement ISA v2.03. | ||
| 3 | 1 | ||
| 4 | PPC970 CPUs implement v2.01 and do not support popcntb. | ||
| 5 | |||
| 6 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 7 | Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 8 | Message-Id: <20220105095142.3990430-2-clg@kaod.org> | ||
| 9 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 10 | --- | ||
| 11 | target/ppc/cpu_init.c | 1 + | ||
| 12 | 1 file changed, 1 insertion(+) | ||
| 13 | |||
| 14 | diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/ppc/cpu_init.c | ||
| 17 | +++ b/target/ppc/cpu_init.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) | ||
| 19 | PPC_MEM_SYNC | PPC_MEM_EIEIO | | ||
| 20 | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | | ||
| 21 | PPC_64B | | ||
| 22 | + PPC_POPCNTB | | ||
| 23 | PPC_SEGMENT_64B | PPC_SLBI; | ||
| 24 | pcc->insns_flags2 = PPC2_FP_CVT_S64; | ||
| 25 | pcc->msr_mask = (1ull << MSR_SF) | | ||
| 26 | -- | ||
| 27 | 2.31.1 | ||
| 28 | |||
| 29 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | POWER5+ (ISA v2.03) processors are supported by the pseries machine | ||
| 2 | but they do not have Altivec instructions. Do not advertise support | ||
| 3 | for it in the DT. | ||
| 4 | 1 | ||
| 5 | To be noted that this test is in contradiction with the assert in | ||
| 6 | cap_vsx_apply(). | ||
| 7 | |||
| 8 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 9 | Tested-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 10 | Message-Id: <20220105095142.3990430-3-clg@kaod.org> | ||
| 11 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 12 | --- | ||
| 13 | hw/ppc/spapr.c | 10 ++++++---- | ||
| 14 | 1 file changed, 6 insertions(+), 4 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | ||
| 18 | --- a/hw/ppc/spapr.c | ||
| 19 | +++ b/hw/ppc/spapr.c | ||
| 20 | @@ -XXX,XX +XXX,XX @@ static void spapr_dt_cpu(CPUState *cs, void *fdt, int offset, | ||
| 21 | * | ||
| 22 | * Only CPUs for which we create core types in spapr_cpu_core.c | ||
| 23 | * are possible, and all of those have VMX */ | ||
| 24 | - if (spapr_get_cap(spapr, SPAPR_CAP_VSX) != 0) { | ||
| 25 | - _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); | ||
| 26 | - } else { | ||
| 27 | - _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); | ||
| 28 | + if (env->insns_flags & PPC_ALTIVEC) { | ||
| 29 | + if (spapr_get_cap(spapr, SPAPR_CAP_VSX) != 0) { | ||
| 30 | + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); | ||
| 31 | + } else { | ||
| 32 | + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); | ||
| 33 | + } | ||
| 34 | } | ||
| 35 | |||
| 36 | /* Advertise DFP (Decimal Floating Point) if available | ||
| 37 | -- | ||
| 38 | 2.31.1 | ||
| 39 | |||
| 40 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | ISA v2.03 introduced Floating Round to Integer instructions : frin, | ||
| 2 | friz, frip, and frim. Add them to POWER5+. | ||
| 3 | 1 | ||
| 4 | The PPC_FLOAT_EXT flag also includes the fre (Floating Reciprocal | ||
| 5 | Estimate) instruction which was introduced in ISA v2.0x. The | ||
| 6 | architecture document says its optional and that might be the reason | ||
| 7 | why it has been kept under the PPC_FLOAT_EXT flag. This means 970 CPUs | ||
| 8 | can not use it under QEMU, which doesn't seem to be a problem. | ||
| 9 | |||
| 10 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 11 | --- | ||
| 12 | target/ppc/cpu_init.c | 1 + | ||
| 13 | 1 file changed, 1 insertion(+) | ||
| 14 | |||
| 15 | diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c | ||
| 16 | index XXXXXXX..XXXXXXX 100644 | ||
| 17 | --- a/target/ppc/cpu_init.c | ||
| 18 | +++ b/target/ppc/cpu_init.c | ||
| 19 | @@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) | ||
| 20 | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | | ||
| 21 | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | | ||
| 22 | PPC_FLOAT_STFIWX | | ||
| 23 | + PPC_FLOAT_EXT | | ||
| 24 | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | | ||
| 25 | PPC_MEM_SYNC | PPC_MEM_EIEIO | | ||
| 26 | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | | ||
| 27 | -- | ||
| 28 | 2.31.1 | ||
| 29 | |||
| 30 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Thomas Huth <thuth@redhat.com> | ||
| 2 | 1 | ||
| 3 | The Protected Execution Facility is only available with the pseries | ||
| 4 | machine, so let's merge the old ASCII text into the new RST file now. | ||
| 5 | |||
| 6 | Signed-off-by: Thomas Huth <thuth@redhat.com> | ||
| 7 | Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 8 | Message-Id: <20220105103232.405204-1-thuth@redhat.com> | ||
| 9 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 10 | --- | ||
| 11 | docs/papr-pef.txt | 30 ------------------------------ | ||
| 12 | docs/system/ppc/pseries.rst | 33 +++++++++++++++++++++++++++++++++ | ||
| 13 | 2 files changed, 33 insertions(+), 30 deletions(-) | ||
| 14 | delete mode 100644 docs/papr-pef.txt | ||
| 15 | |||
| 16 | diff --git a/docs/papr-pef.txt b/docs/papr-pef.txt | ||
| 17 | deleted file mode 100644 | ||
| 18 | index XXXXXXX..XXXXXXX | ||
| 19 | --- a/docs/papr-pef.txt | ||
| 20 | +++ /dev/null | ||
| 21 | @@ -XXX,XX +XXX,XX @@ | ||
| 22 | -POWER (PAPR) Protected Execution Facility (PEF) | ||
| 23 | -=============================================== | ||
| 24 | - | ||
| 25 | -Protected Execution Facility (PEF), also known as Secure Guest support | ||
| 26 | -is a feature found on IBM POWER9 and POWER10 processors. | ||
| 27 | - | ||
| 28 | -If a suitable firmware including an Ultravisor is installed, it adds | ||
| 29 | -an extra memory protection mode to the CPU. The ultravisor manages a | ||
| 30 | -pool of secure memory which cannot be accessed by the hypervisor. | ||
| 31 | - | ||
| 32 | -When this feature is enabled in QEMU, a guest can use ultracalls to | ||
| 33 | -enter "secure mode". This transfers most of its memory to secure | ||
| 34 | -memory, where it cannot be eavesdropped by a compromised hypervisor. | ||
| 35 | - | ||
| 36 | -Launching | ||
| 37 | ---------- | ||
| 38 | - | ||
| 39 | -To launch a guest which will be permitted to enter PEF secure mode: | ||
| 40 | - | ||
| 41 | -# ${QEMU} \ | ||
| 42 | - -object pef-guest,id=pef0 \ | ||
| 43 | - -machine confidential-guest-support=pef0 \ | ||
| 44 | - ... | ||
| 45 | - | ||
| 46 | -Live Migration | ||
| 47 | ----------------- | ||
| 48 | - | ||
| 49 | -Live migration is not yet implemented for PEF guests. For | ||
| 50 | -consistency, we currently prevent migration if the PEF feature is | ||
| 51 | -enabled, whether or not the guest has actually entered secure mode. | ||
| 52 | diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst | ||
| 53 | index XXXXXXX..XXXXXXX 100644 | ||
| 54 | --- a/docs/system/ppc/pseries.rst | ||
| 55 | +++ b/docs/system/ppc/pseries.rst | ||
| 56 | @@ -XXX,XX +XXX,XX @@ nested. Combinations not shown in the table are not available. | ||
| 57 | |||
| 58 | .. [3] Introduced on Power10 machines. | ||
| 59 | |||
| 60 | + | ||
| 61 | +POWER (PAPR) Protected Execution Facility (PEF) | ||
| 62 | +----------------------------------------------- | ||
| 63 | + | ||
| 64 | +Protected Execution Facility (PEF), also known as Secure Guest support | ||
| 65 | +is a feature found on IBM POWER9 and POWER10 processors. | ||
| 66 | + | ||
| 67 | +If a suitable firmware including an Ultravisor is installed, it adds | ||
| 68 | +an extra memory protection mode to the CPU. The ultravisor manages a | ||
| 69 | +pool of secure memory which cannot be accessed by the hypervisor. | ||
| 70 | + | ||
| 71 | +When this feature is enabled in QEMU, a guest can use ultracalls to | ||
| 72 | +enter "secure mode". This transfers most of its memory to secure | ||
| 73 | +memory, where it cannot be eavesdropped by a compromised hypervisor. | ||
| 74 | + | ||
| 75 | +Launching | ||
| 76 | +^^^^^^^^^ | ||
| 77 | + | ||
| 78 | +To launch a guest which will be permitted to enter PEF secure mode:: | ||
| 79 | + | ||
| 80 | + $ qemu-system-ppc64 \ | ||
| 81 | + -object pef-guest,id=pef0 \ | ||
| 82 | + -machine confidential-guest-support=pef0 \ | ||
| 83 | + ... | ||
| 84 | + | ||
| 85 | +Live Migration | ||
| 86 | +^^^^^^^^^^^^^^ | ||
| 87 | + | ||
| 88 | +Live migration is not yet implemented for PEF guests. For | ||
| 89 | +consistency, QEMU currently prevents migration if the PEF feature is | ||
| 90 | +enabled, whether or not the guest has actually entered secure mode. | ||
| 91 | + | ||
| 92 | + | ||
| 93 | Maintainer contact information | ||
| 94 | ------------------------------ | ||
| 95 | |||
| 96 | -- | ||
| 97 | 2.31.1 | ||
| 98 | |||
| 99 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Thomas Huth <thuth@redhat.com> | ||
| 2 | 1 | ||
| 3 | Add some documentation files to the corresponding machine sections | ||
| 4 | and mention the machine names in the section titles where it is | ||
| 5 | not so obvious (e.g. that "taihu" is a 405 machine). | ||
| 6 | |||
| 7 | Signed-off-by: Thomas Huth <thuth@redhat.com> | ||
| 8 | Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 9 | Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | ||
| 10 | Message-Id: <20220105104800.407570-1-thuth@redhat.com> | ||
| 11 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 12 | --- | ||
| 13 | MAINTAINERS | 12 ++++++++---- | ||
| 14 | 1 file changed, 8 insertions(+), 4 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/MAINTAINERS b/MAINTAINERS | ||
| 17 | index XXXXXXX..XXXXXXX 100644 | ||
| 18 | --- a/MAINTAINERS | ||
| 19 | +++ b/MAINTAINERS | ||
| 20 | @@ -XXX,XX +XXX,XX @@ F: hw/openrisc/openrisc_sim.c | ||
| 21 | |||
| 22 | PowerPC Machines | ||
| 23 | ---------------- | ||
| 24 | -405 | ||
| 25 | +405 (ref405ep and taihu) | ||
| 26 | L: qemu-ppc@nongnu.org | ||
| 27 | S: Orphan | ||
| 28 | F: hw/ppc/ppc405_boards.c | ||
| 29 | @@ -XXX,XX +XXX,XX @@ New World (mac99) | ||
| 30 | M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | ||
| 31 | L: qemu-ppc@nongnu.org | ||
| 32 | S: Odd Fixes | ||
| 33 | +F: docs/system/ppc/powermac.rst | ||
| 34 | F: hw/ppc/mac_newworld.c | ||
| 35 | F: hw/pci-host/uninorth.c | ||
| 36 | F: hw/pci-bridge/dec.[hc] | ||
| 37 | @@ -XXX,XX +XXX,XX @@ Old World (g3beige) | ||
| 38 | M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | ||
| 39 | L: qemu-ppc@nongnu.org | ||
| 40 | S: Odd Fixes | ||
| 41 | +F: docs/system/ppc/powermac.rst | ||
| 42 | F: hw/ppc/mac_oldworld.c | ||
| 43 | F: hw/pci-host/grackle.c | ||
| 44 | F: hw/misc/macio/ | ||
| 45 | @@ -XXX,XX +XXX,XX @@ PReP | ||
| 46 | M: Hervé Poussineau <hpoussin@reactos.org> | ||
| 47 | L: qemu-ppc@nongnu.org | ||
| 48 | S: Maintained | ||
| 49 | +F: docs/system/ppc/prep.rst | ||
| 50 | F: hw/ppc/prep.c | ||
| 51 | F: hw/ppc/prep_systemio.c | ||
| 52 | F: hw/ppc/rs6000_mc.c | ||
| 53 | @@ -XXX,XX +XXX,XX @@ F: include/hw/isa/pc87312.h | ||
| 54 | F: include/hw/rtc/m48t59.h | ||
| 55 | F: tests/avocado/ppc_prep_40p.py | ||
| 56 | |||
| 57 | -sPAPR | ||
| 58 | +sPAPR (pseries) | ||
| 59 | M: Cédric Le Goater <clg@kaod.org> | ||
| 60 | M: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 61 | R: David Gibson <david@gibson.dropbear.id.au> | ||
| 62 | @@ -XXX,XX +XXX,XX @@ F: include/hw/*/spapr* | ||
| 63 | F: hw/*/xics* | ||
| 64 | F: include/hw/*/xics* | ||
| 65 | F: pc-bios/slof.bin | ||
| 66 | -F: docs/specs/ppc-spapr-hcalls.txt | ||
| 67 | -F: docs/specs/ppc-spapr-hotplug.txt | ||
| 68 | +F: docs/system/ppc/pseries.rst | ||
| 69 | +F: docs/specs/ppc-spapr-* | ||
| 70 | F: tests/qtest/spapr* | ||
| 71 | F: tests/qtest/libqos/*spapr* | ||
| 72 | F: tests/qtest/rtas* | ||
| 73 | @@ -XXX,XX +XXX,XX @@ PowerNV (Non-Virtualized) | ||
| 74 | M: Cédric Le Goater <clg@kaod.org> | ||
| 75 | L: qemu-ppc@nongnu.org | ||
| 76 | S: Maintained | ||
| 77 | +F: docs/system/ppc/powernv.rst | ||
| 78 | F: hw/ppc/pnv* | ||
| 79 | F: hw/intc/pnv* | ||
| 80 | F: hw/intc/xics_pnv.c | ||
| 81 | -- | ||
| 82 | 2.31.1 | ||
| 83 | |||
| 84 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Leonardo Garcia <lagarcia@br.ibm.com> | ||
| 2 | 1 | ||
| 3 | Signed-off-by: Leonardo Garcia <lagarcia@br.ibm.com> | ||
| 4 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 5 | Message-Id: <3b228af4785241c7fb4a2c70f0c495d2a9adea83.1641405872.git.lagarcia@br.ibm.com> | ||
| 6 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 7 | --- | ||
| 8 | docs/specs/ppc-spapr-hcalls.rst | 21 ++++++++--------- | ||
| 9 | docs/system/ppc/pseries.rst | 42 ++++++++++++++++----------------- | ||
| 10 | 2 files changed, 31 insertions(+), 32 deletions(-) | ||
| 11 | |||
| 12 | diff --git a/docs/specs/ppc-spapr-hcalls.rst b/docs/specs/ppc-spapr-hcalls.rst | ||
| 13 | index XXXXXXX..XXXXXXX 100644 | ||
| 14 | --- a/docs/specs/ppc-spapr-hcalls.rst | ||
| 15 | +++ b/docs/specs/ppc-spapr-hcalls.rst | ||
| 16 | @@ -XXX,XX +XXX,XX @@ | ||
| 17 | +====================== | ||
| 18 | sPAPR hypervisor calls | ||
| 19 | ----------------------- | ||
| 20 | +====================== | ||
| 21 | |||
| 22 | When used with the ``pseries`` machine type, ``qemu-system-ppc64`` implements | ||
| 23 | -a set of hypervisor calls (a.k.a. hcalls) defined in the `Linux on Power | ||
| 24 | -Architecture Reference document (LoPAR) | ||
| 25 | -<https://cdn.openpowerfoundation.org/wp-content/uploads/2020/07/LoPAR-20200812.pdf>`_. | ||
| 26 | -This document is a subset of the Power Architecture Platform Reference (PAPR+) | ||
| 27 | -specification (IBM internal only), which is what PowerVM, the IBM proprietary | ||
| 28 | -hypervisor, adheres to. | ||
| 29 | +a set of hypervisor calls (a.k.a. hcalls) defined in the Linux on Power | ||
| 30 | +Architecture Reference ([LoPAR]_) document. This document is a subset of the | ||
| 31 | +Power Architecture Platform Reference (PAPR+) specification (IBM internal only), | ||
| 32 | +which is what PowerVM, the IBM proprietary hypervisor, adheres to. | ||
| 33 | |||
| 34 | The subset in LoPAR is selected based on the requirements of Linux as a guest. | ||
| 35 | |||
| 36 | @@ -XXX,XX +XXX,XX @@ running in the guest and QEMU. | ||
| 37 | All those hypercalls start at hcall number 0xf000 which correspond | ||
| 38 | to an implementation specific range in PAPR. | ||
| 39 | |||
| 40 | -H_RTAS (0xf000) | ||
| 41 | -^^^^^^^^^^^^^^^ | ||
| 42 | +``H_RTAS (0xf000)`` | ||
| 43 | +=================== | ||
| 44 | |||
| 45 | RTAS stands for Run-Time Abstraction Sercies and is a set of runtime services | ||
| 46 | generally provided by the firmware inside the guest to the operating system. It | ||
| 47 | @@ -XXX,XX +XXX,XX @@ Returns: | ||
| 48 | |||
| 49 | ``H_PARAMETER``: Unknown token. | ||
| 50 | |||
| 51 | -H_LOGICAL_MEMOP (0xf001) | ||
| 52 | -^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 53 | +``H_LOGICAL_MEMOP (0xf001)`` | ||
| 54 | +============================ | ||
| 55 | |||
| 56 | When the guest runs in "real mode" (in powerpc terminology this means with MMU | ||
| 57 | disabled, i.e. guest effective address equals to guest physical address), it | ||
| 58 | diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst | ||
| 59 | index XXXXXXX..XXXXXXX 100644 | ||
| 60 | --- a/docs/system/ppc/pseries.rst | ||
| 61 | +++ b/docs/system/ppc/pseries.rst | ||
| 62 | @@ -XXX,XX +XXX,XX @@ | ||
| 63 | +=================================== | ||
| 64 | pSeries family boards (``pseries``) | ||
| 65 | =================================== | ||
| 66 | |||
| 67 | -The Power machine para-virtualized environment described by the `Linux on Power | ||
| 68 | -Architecture Reference document (LoPAR) | ||
| 69 | -<https://openpowerfoundation.org/wp-content/uploads/2020/07/LoPAR-20200812.pdf>`_ | ||
| 70 | -is called pSeries. This environment is also known as sPAPR, System p guests, or | ||
| 71 | -simply Power Linux guests (although it is capable of running other operating | ||
| 72 | -systems, such as AIX). | ||
| 73 | +The Power machine para-virtualized environment described by the Linux on Power | ||
| 74 | +Architecture Reference ([LoPAR]_) document is called pSeries. This environment | ||
| 75 | +is also known as sPAPR, System p guests, or simply Power Linux guests (although | ||
| 76 | +it is capable of running other operating systems, such as AIX). | ||
| 77 | |||
| 78 | Even though pSeries is designed to behave as a guest environment, it is also | ||
| 79 | capable of acting as a hypervisor OS, providing, on that role, nested | ||
| 80 | virtualization capabilities. | ||
| 81 | |||
| 82 | Supported devices | ||
| 83 | ------------------ | ||
| 84 | +================= | ||
| 85 | |||
| 86 | * Multi processor support for many Power processors generations: POWER7, | ||
| 87 | POWER7+, POWER8, POWER8NVL, POWER9, and Power10. Support for POWER5+ exists, | ||
| 88 | @@ -XXX,XX +XXX,XX @@ Supported devices | ||
| 89 | * PCIe device pass through. | ||
| 90 | |||
| 91 | Missing devices | ||
| 92 | ---------------- | ||
| 93 | +=============== | ||
| 94 | |||
| 95 | * SPICE support. | ||
| 96 | |||
| 97 | Firmware | ||
| 98 | --------- | ||
| 99 | +======== | ||
| 100 | |||
| 101 | `SLOF <https://github.com/aik/SLOF>`_ (Slimline Open Firmware) is an | ||
| 102 | implementation of the `IEEE 1275-1994, Standard for Boot (Initialization | ||
| 103 | @@ -XXX,XX +XXX,XX @@ QEMU includes a prebuilt image of SLOF which is updated when a more recent | ||
| 104 | version is required. | ||
| 105 | |||
| 106 | Build directions | ||
| 107 | ----------------- | ||
| 108 | +================ | ||
| 109 | |||
| 110 | .. code-block:: bash | ||
| 111 | |||
| 112 | ./configure --target-list=ppc64-softmmu && make | ||
| 113 | |||
| 114 | Running instructions | ||
| 115 | --------------------- | ||
| 116 | +==================== | ||
| 117 | |||
| 118 | Someone can select the pSeries machine type by running QEMU with the following | ||
| 119 | options: | ||
| 120 | @@ -XXX,XX +XXX,XX @@ options: | ||
| 121 | qemu-system-ppc64 -M pseries <other QEMU arguments> | ||
| 122 | |||
| 123 | sPAPR devices | ||
| 124 | -------------- | ||
| 125 | +============= | ||
| 126 | |||
| 127 | The sPAPR specification defines a set of para-virtualized devices, which are | ||
| 128 | also supported by the pSeries machine in QEMU and can be instantiated with the | ||
| 129 | @@ -XXX,XX +XXX,XX @@ device, or specify one with an ID | ||
| 130 | NVRAM device with ``-global spapr-nvram.drive=pfid``. | ||
| 131 | |||
| 132 | sPAPR specification | ||
| 133 | -^^^^^^^^^^^^^^^^^^^ | ||
| 134 | +------------------- | ||
| 135 | |||
| 136 | -The main source of documentation on the sPAPR standard is the `Linux on Power | ||
| 137 | -Architecture Reference document (LoPAR) | ||
| 138 | -<https://openpowerfoundation.org/wp-content/uploads/2020/07/LoPAR-20200812.pdf>`_. | ||
| 139 | +The main source of documentation on the sPAPR standard is the [LoPAR]_ document. | ||
| 140 | However, documentation specific to QEMU's implementation of the specification | ||
| 141 | can also be found in QEMU documentation: | ||
| 142 | |||
| 143 | @@ -XXX,XX +XXX,XX @@ Other documentation available in QEMU docs directory: | ||
| 144 | (``/docs/specs/ppc-spapr-uv-hcalls.txt``). | ||
| 145 | |||
| 146 | Switching between the KVM-PR and KVM-HV kernel module | ||
| 147 | ------------------------------------------------------ | ||
| 148 | +===================================================== | ||
| 149 | |||
| 150 | Currently, there are two implementations of KVM on Power, ``kvm_hv.ko`` and | ||
| 151 | ``kvm_pr.ko``. | ||
| 152 | @@ -XXX,XX +XXX,XX @@ possible to switch between the two modes with the ``kvm-type`` parameter: | ||
| 153 | instead. | ||
| 154 | |||
| 155 | KVM-PR | ||
| 156 | -^^^^^^ | ||
| 157 | +------ | ||
| 158 | |||
| 159 | KVM-PR uses the so-called **PR**\ oblem state of the PPC CPUs to run the guests, | ||
| 160 | i.e. the virtual machine is run in user mode and all privileged instructions | ||
| 161 | @@ -XXX,XX +XXX,XX @@ In order to run KVM-PR guests with POWER9 processors, someone will need to start | ||
| 162 | QEMU with ``kernel_irqchip=off`` command line option. | ||
| 163 | |||
| 164 | KVM-HV | ||
| 165 | -^^^^^^ | ||
| 166 | +------ | ||
| 167 | |||
| 168 | KVM-HV uses the hypervisor mode of more recent Power processors, that allow | ||
| 169 | access to the bare metal hardware directly. Although POWER7 had this capability, | ||
| 170 | @@ -XXX,XX +XXX,XX @@ CPUs generations, e.g. you can run a POWER7 guest on a POWER8 host by using | ||
| 171 | ``-cpu POWER8,compat=power7`` as parameter to QEMU. | ||
| 172 | |||
| 173 | Modules support | ||
| 174 | ---------------- | ||
| 175 | +=============== | ||
| 176 | |||
| 177 | As noticed in the sections above, each module can run in a different | ||
| 178 | environment. The following table shows with which environment each module can | ||
| 179 | @@ -XXX,XX +XXX,XX @@ enabled, whether or not the guest has actually entered secure mode. | ||
| 180 | |||
| 181 | |||
| 182 | Maintainer contact information | ||
| 183 | ------------------------------- | ||
| 184 | +============================== | ||
| 185 | |||
| 186 | Cédric Le Goater <clg@kaod.org> | ||
| 187 | |||
| 188 | Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 189 | + | ||
| 190 | +.. [LoPAR] `Linux on Power Architecture Reference document (LoPAR) revision | ||
| 191 | + 2.9 <https://openpowerfoundation.org/wp-content/uploads/2020/07/LoPAR-20200812.pdf>`_. | ||
| 192 | -- | ||
| 193 | 2.31.1 | ||
| 194 | |||
| 195 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 4 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 5 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 6 | Message-Id: <20220107222601.4101511-2-farosas@linux.ibm.com> | ||
| 7 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 8 | --- | ||
| 9 | target/ppc/excp_helper.c | 65 +++++++++++++++++++++++----------------- | ||
| 10 | 1 file changed, 37 insertions(+), 28 deletions(-) | ||
| 11 | |||
| 12 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 13 | index XXXXXXX..XXXXXXX 100644 | ||
| 14 | --- a/target/ppc/excp_helper.c | ||
| 15 | +++ b/target/ppc/excp_helper.c | ||
| 16 | @@ -XXX,XX +XXX,XX @@ static void dump_hcall(CPUPPCState *env) | ||
| 17 | env->nip); | ||
| 18 | } | ||
| 19 | |||
| 20 | +static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp) | ||
| 21 | +{ | ||
| 22 | +#if defined(DEBUG_SOFTWARE_TLB) | ||
| 23 | + const char *es; | ||
| 24 | + target_ulong *miss, *cmp; | ||
| 25 | + int en; | ||
| 26 | + | ||
| 27 | + if (!qemu_log_enabled()) { | ||
| 28 | + return; | ||
| 29 | + } | ||
| 30 | + | ||
| 31 | + if (excp == POWERPC_EXCP_IFTLB) { | ||
| 32 | + es = "I"; | ||
| 33 | + en = 'I'; | ||
| 34 | + miss = &env->spr[SPR_IMISS]; | ||
| 35 | + cmp = &env->spr[SPR_ICMP]; | ||
| 36 | + } else { | ||
| 37 | + if (excp == POWERPC_EXCP_DLTLB) { | ||
| 38 | + es = "DL"; | ||
| 39 | + } else { | ||
| 40 | + es = "DS"; | ||
| 41 | + } | ||
| 42 | + en = 'D'; | ||
| 43 | + miss = &env->spr[SPR_DMISS]; | ||
| 44 | + cmp = &env->spr[SPR_DCMP]; | ||
| 45 | + } | ||
| 46 | + qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC " | ||
| 47 | + TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 " | ||
| 48 | + TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp, | ||
| 49 | + env->spr[SPR_HASH1], env->spr[SPR_HASH2], | ||
| 50 | + env->error_code); | ||
| 51 | +#endif | ||
| 52 | +} | ||
| 53 | + | ||
| 54 | + | ||
| 55 | static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, | ||
| 56 | target_ulong *msr) | ||
| 57 | { | ||
| 58 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 59 | } | ||
| 60 | /* fall through */ | ||
| 61 | case POWERPC_EXCP_7x5: | ||
| 62 | -#if defined(DEBUG_SOFTWARE_TLB) | ||
| 63 | - if (qemu_log_enabled()) { | ||
| 64 | - const char *es; | ||
| 65 | - target_ulong *miss, *cmp; | ||
| 66 | - int en; | ||
| 67 | - | ||
| 68 | - if (excp == POWERPC_EXCP_IFTLB) { | ||
| 69 | - es = "I"; | ||
| 70 | - en = 'I'; | ||
| 71 | - miss = &env->spr[SPR_IMISS]; | ||
| 72 | - cmp = &env->spr[SPR_ICMP]; | ||
| 73 | - } else { | ||
| 74 | - if (excp == POWERPC_EXCP_DLTLB) { | ||
| 75 | - es = "DL"; | ||
| 76 | - } else { | ||
| 77 | - es = "DS"; | ||
| 78 | - } | ||
| 79 | - en = 'D'; | ||
| 80 | - miss = &env->spr[SPR_DMISS]; | ||
| 81 | - cmp = &env->spr[SPR_DCMP]; | ||
| 82 | - } | ||
| 83 | - qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC " | ||
| 84 | - TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 " | ||
| 85 | - TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp, | ||
| 86 | - env->spr[SPR_HASH1], env->spr[SPR_HASH2], | ||
| 87 | - env->error_code); | ||
| 88 | - } | ||
| 89 | -#endif | ||
| 90 | + ppc_excp_debug_sw_tlb(env, excp); | ||
| 91 | + | ||
| 92 | msr |= env->crf[0] << 28; | ||
| 93 | msr |= env->error_code; /* key, D/I, S/L bits */ | ||
| 94 | /* Set way using a LRU mechanism */ | ||
| 95 | -- | ||
| 96 | 2.31.1 | ||
| 97 | |||
| 98 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | Remove the compile time definition and make the logging be controlled | ||
| 4 | by the `-d mmu` option in the cmdline. | ||
| 5 | |||
| 6 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 7 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 8 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 9 | Message-Id: <20220107222601.4101511-3-farosas@linux.ibm.com> | ||
| 10 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 11 | --- | ||
| 12 | target/ppc/excp_helper.c | 6 +----- | ||
| 13 | 1 file changed, 1 insertion(+), 5 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 16 | index XXXXXXX..XXXXXXX 100644 | ||
| 17 | --- a/target/ppc/excp_helper.c | ||
| 18 | +++ b/target/ppc/excp_helper.c | ||
| 19 | @@ -XXX,XX +XXX,XX @@ | ||
| 20 | #include "exec/cpu_ldst.h" | ||
| 21 | #endif | ||
| 22 | |||
| 23 | -/* #define DEBUG_SOFTWARE_TLB */ | ||
| 24 | - | ||
| 25 | /*****************************************************************************/ | ||
| 26 | /* Exception processing */ | ||
| 27 | #if !defined(CONFIG_USER_ONLY) | ||
| 28 | @@ -XXX,XX +XXX,XX @@ static void dump_hcall(CPUPPCState *env) | ||
| 29 | |||
| 30 | static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp) | ||
| 31 | { | ||
| 32 | -#if defined(DEBUG_SOFTWARE_TLB) | ||
| 33 | const char *es; | ||
| 34 | target_ulong *miss, *cmp; | ||
| 35 | int en; | ||
| 36 | |||
| 37 | - if (!qemu_log_enabled()) { | ||
| 38 | + if (!qemu_loglevel_mask(CPU_LOG_MMU)) { | ||
| 39 | return; | ||
| 40 | } | ||
| 41 | |||
| 42 | @@ -XXX,XX +XXX,XX @@ static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp) | ||
| 43 | TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp, | ||
| 44 | env->spr[SPR_HASH1], env->spr[SPR_HASH2], | ||
| 45 | env->error_code); | ||
| 46 | -#endif | ||
| 47 | } | ||
| 48 | |||
| 49 | |||
| 50 | -- | ||
| 51 | 2.31.1 | ||
| 52 | |||
| 53 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 4 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 5 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 6 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
| 7 | Message-Id: <20220107222601.4101511-4-farosas@linux.ibm.com> | ||
| 8 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 9 | --- | ||
| 10 | target/ppc/excp_helper.c | 77 +++++----------------------------------- | ||
| 11 | 1 file changed, 8 insertions(+), 69 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 14 | index XXXXXXX..XXXXXXX 100644 | ||
| 15 | --- a/target/ppc/excp_helper.c | ||
| 16 | +++ b/target/ppc/excp_helper.c | ||
| 17 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 18 | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/VPU */ | ||
| 19 | env->spr[SPR_BOOKE_ESR] = ESR_SPV; | ||
| 20 | break; | ||
| 21 | - case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */ | ||
| 22 | - /* XXX: TODO */ | ||
| 23 | - cpu_abort(cs, "Embedded floating point data exception " | ||
| 24 | - "is not implemented yet !\n"); | ||
| 25 | - env->spr[SPR_BOOKE_ESR] = ESR_SPV; | ||
| 26 | - break; | ||
| 27 | - case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */ | ||
| 28 | - /* XXX: TODO */ | ||
| 29 | - cpu_abort(cs, "Embedded floating point round exception " | ||
| 30 | - "is not implemented yet !\n"); | ||
| 31 | - env->spr[SPR_BOOKE_ESR] = ESR_SPV; | ||
| 32 | - break; | ||
| 33 | - case POWERPC_EXCP_EPERFM: /* Embedded performance monitor interrupt */ | ||
| 34 | - /* XXX: TODO */ | ||
| 35 | - cpu_abort(cs, | ||
| 36 | - "Performance counter exception is not implemented yet !\n"); | ||
| 37 | - break; | ||
| 38 | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ | ||
| 39 | break; | ||
| 40 | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ | ||
| 41 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 42 | case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */ | ||
| 43 | trace_ppc_excp_print("PIT"); | ||
| 44 | break; | ||
| 45 | - case POWERPC_EXCP_IO: /* IO error exception */ | ||
| 46 | - /* XXX: TODO */ | ||
| 47 | - cpu_abort(cs, "601 IO error exception is not implemented yet !\n"); | ||
| 48 | - break; | ||
| 49 | - case POWERPC_EXCP_RUNM: /* Run mode exception */ | ||
| 50 | - /* XXX: TODO */ | ||
| 51 | - cpu_abort(cs, "601 run mode exception is not implemented yet !\n"); | ||
| 52 | - break; | ||
| 53 | - case POWERPC_EXCP_EMUL: /* Emulation trap exception */ | ||
| 54 | - /* XXX: TODO */ | ||
| 55 | - cpu_abort(cs, "602 emulation trap exception " | ||
| 56 | - "is not implemented yet !\n"); | ||
| 57 | - break; | ||
| 58 | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ | ||
| 59 | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ | ||
| 60 | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ | ||
| 61 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 62 | break; | ||
| 63 | } | ||
| 64 | break; | ||
| 65 | + case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */ | ||
| 66 | + case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */ | ||
| 67 | + case POWERPC_EXCP_EPERFM: /* Embedded performance monitor interrupt */ | ||
| 68 | + case POWERPC_EXCP_IO: /* IO error exception */ | ||
| 69 | + case POWERPC_EXCP_RUNM: /* Run mode exception */ | ||
| 70 | + case POWERPC_EXCP_EMUL: /* Emulation trap exception */ | ||
| 71 | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ | ||
| 72 | - /* XXX: TODO */ | ||
| 73 | - cpu_abort(cs, "Floating point assist exception " | ||
| 74 | - "is not implemented yet !\n"); | ||
| 75 | - break; | ||
| 76 | case POWERPC_EXCP_DABR: /* Data address breakpoint */ | ||
| 77 | - /* XXX: TODO */ | ||
| 78 | - cpu_abort(cs, "DABR exception is not implemented yet !\n"); | ||
| 79 | - break; | ||
| 80 | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ | ||
| 81 | - /* XXX: TODO */ | ||
| 82 | - cpu_abort(cs, "IABR exception is not implemented yet !\n"); | ||
| 83 | - break; | ||
| 84 | case POWERPC_EXCP_SMI: /* System management interrupt */ | ||
| 85 | - /* XXX: TODO */ | ||
| 86 | - cpu_abort(cs, "SMI exception is not implemented yet !\n"); | ||
| 87 | - break; | ||
| 88 | case POWERPC_EXCP_THERM: /* Thermal interrupt */ | ||
| 89 | - /* XXX: TODO */ | ||
| 90 | - cpu_abort(cs, "Thermal management exception " | ||
| 91 | - "is not implemented yet !\n"); | ||
| 92 | - break; | ||
| 93 | case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt */ | ||
| 94 | - /* XXX: TODO */ | ||
| 95 | - cpu_abort(cs, | ||
| 96 | - "Performance counter exception is not implemented yet !\n"); | ||
| 97 | - break; | ||
| 98 | case POWERPC_EXCP_VPUA: /* Vector assist exception */ | ||
| 99 | - /* XXX: TODO */ | ||
| 100 | - cpu_abort(cs, "VPU assist exception is not implemented yet !\n"); | ||
| 101 | - break; | ||
| 102 | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ | ||
| 103 | - /* XXX: TODO */ | ||
| 104 | - cpu_abort(cs, | ||
| 105 | - "970 soft-patch exception is not implemented yet !\n"); | ||
| 106 | - break; | ||
| 107 | case POWERPC_EXCP_MAINT: /* Maintenance exception */ | ||
| 108 | - /* XXX: TODO */ | ||
| 109 | - cpu_abort(cs, | ||
| 110 | - "970 maintenance exception is not implemented yet !\n"); | ||
| 111 | - break; | ||
| 112 | case POWERPC_EXCP_MEXTBR: /* Maskable external breakpoint */ | ||
| 113 | - /* XXX: TODO */ | ||
| 114 | - cpu_abort(cs, "Maskable external exception " | ||
| 115 | - "is not implemented yet !\n"); | ||
| 116 | - break; | ||
| 117 | case POWERPC_EXCP_NMEXTBR: /* Non maskable external breakpoint */ | ||
| 118 | - /* XXX: TODO */ | ||
| 119 | - cpu_abort(cs, "Non maskable external exception " | ||
| 120 | - "is not implemented yet !\n"); | ||
| 121 | + cpu_abort(cs, "%s exception not implemented\n", | ||
| 122 | + powerpc_excp_name(excp)); | ||
| 123 | break; | ||
| 124 | default: | ||
| 125 | excp_invalid: | ||
| 126 | -- | ||
| 127 | 2.31.1 | ||
| 128 | |||
| 129 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | The ppc_interrupts_little_endian function could be used for interrupts | ||
| 4 | delivered in Hypervisor mode, so add support for powernv8 and powernv9 | ||
| 5 | to it. | ||
| 6 | |||
| 7 | Also drop the comment because it is inaccurate, all CPUs that can run | ||
| 8 | little endian can have interrupts in little endian. The point is | ||
| 9 | whether they can take interrupts in an endianness different from | ||
| 10 | MSR_LE. | ||
| 11 | |||
| 12 | This change has no functional impact. | ||
| 13 | |||
| 14 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 15 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 16 | Message-Id: <20220107222601.4101511-5-farosas@linux.ibm.com> | ||
| 17 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 18 | --- | ||
| 19 | target/ppc/cpu.h | 23 +++++++++++++++-------- | ||
| 20 | target/ppc/arch_dump.c | 2 +- | ||
| 21 | target/ppc/excp_helper.c | 2 +- | ||
| 22 | 3 files changed, 17 insertions(+), 10 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h | ||
| 25 | index XXXXXXX..XXXXXXX 100644 | ||
| 26 | --- a/target/ppc/cpu.h | ||
| 27 | +++ b/target/ppc/cpu.h | ||
| 28 | @@ -XXX,XX +XXX,XX @@ static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr) | ||
| 29 | return cpu->env.spr_cb[spr].name != NULL; | ||
| 30 | } | ||
| 31 | |||
| 32 | -static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu) | ||
| 33 | +#if !defined(CONFIG_USER_ONLY) | ||
| 34 | +static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv) | ||
| 35 | { | ||
| 36 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); | ||
| 37 | + CPUPPCState *env = &cpu->env; | ||
| 38 | + bool ile = false; | ||
| 39 | + | ||
| 40 | + if (hv && env->has_hv_mode) { | ||
| 41 | + if (is_isa300(pcc)) { | ||
| 42 | + ile = !!(env->spr[SPR_HID0] & HID0_POWER9_HILE); | ||
| 43 | + } else { | ||
| 44 | + ile = !!(env->spr[SPR_HID0] & HID0_HILE); | ||
| 45 | + } | ||
| 46 | |||
| 47 | - /* | ||
| 48 | - * Only models that have an LPCR and know about LPCR_ILE can do little | ||
| 49 | - * endian. | ||
| 50 | - */ | ||
| 51 | - if (pcc->lpcr_mask & LPCR_ILE) { | ||
| 52 | - return !!(cpu->env.spr[SPR_LPCR] & LPCR_ILE); | ||
| 53 | + } else if (pcc->lpcr_mask & LPCR_ILE) { | ||
| 54 | + ile = !!(env->spr[SPR_LPCR] & LPCR_ILE); | ||
| 55 | } | ||
| 56 | |||
| 57 | - return false; | ||
| 58 | + return ile; | ||
| 59 | } | ||
| 60 | +#endif | ||
| 61 | |||
| 62 | void dump_mmu(CPUPPCState *env); | ||
| 63 | |||
| 64 | diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c | ||
| 65 | index XXXXXXX..XXXXXXX 100644 | ||
| 66 | --- a/target/ppc/arch_dump.c | ||
| 67 | +++ b/target/ppc/arch_dump.c | ||
| 68 | @@ -XXX,XX +XXX,XX @@ int cpu_get_dump_info(ArchDumpInfo *info, | ||
| 69 | info->d_machine = PPC_ELF_MACHINE; | ||
| 70 | info->d_class = ELFCLASS; | ||
| 71 | |||
| 72 | - if (ppc_interrupts_little_endian(cpu)) { | ||
| 73 | + if (ppc_interrupts_little_endian(cpu, false)) { | ||
| 74 | info->d_endian = ELFDATA2LSB; | ||
| 75 | } else { | ||
| 76 | info->d_endian = ELFDATA2MSB; | ||
| 77 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 78 | index XXXXXXX..XXXXXXX 100644 | ||
| 79 | --- a/target/ppc/excp_helper.c | ||
| 80 | +++ b/target/ppc/excp_helper.c | ||
| 81 | @@ -XXX,XX +XXX,XX @@ void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector) | ||
| 82 | */ | ||
| 83 | msr = (1ULL << MSR_ME); | ||
| 84 | msr |= env->msr & (1ULL << MSR_SF); | ||
| 85 | - if (ppc_interrupts_little_endian(cpu)) { | ||
| 86 | + if (ppc_interrupts_little_endian(cpu, false)) { | ||
| 87 | msr |= (1ULL << MSR_LE); | ||
| 88 | } | ||
| 89 | |||
| 90 | -- | ||
| 91 | 2.31.1 | ||
| 92 | |||
| 93 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | Some CPUs set ILE via an MSR bit. We can make | ||
| 4 | ppc_interrupts_little_endian handle that case as well. Now we have a | ||
| 5 | centralized way of determining the endianness of interrupts. | ||
| 6 | |||
| 7 | This change has no functional impact. | ||
| 8 | |||
| 9 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 10 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 11 | Message-Id: <20220107222601.4101511-6-farosas@linux.ibm.com> | ||
| 12 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 13 | --- | ||
| 14 | target/ppc/cpu.h | 4 +++- | ||
| 15 | 1 file changed, 3 insertions(+), 1 deletion(-) | ||
| 16 | |||
| 17 | diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h | ||
| 18 | index XXXXXXX..XXXXXXX 100644 | ||
| 19 | --- a/target/ppc/cpu.h | ||
| 20 | +++ b/target/ppc/cpu.h | ||
| 21 | @@ -XXX,XX +XXX,XX @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv) | ||
| 22 | { | ||
| 23 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); | ||
| 24 | CPUPPCState *env = &cpu->env; | ||
| 25 | - bool ile = false; | ||
| 26 | + bool ile; | ||
| 27 | |||
| 28 | if (hv && env->has_hv_mode) { | ||
| 29 | if (is_isa300(pcc)) { | ||
| 30 | @@ -XXX,XX +XXX,XX @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv) | ||
| 31 | |||
| 32 | } else if (pcc->lpcr_mask & LPCR_ILE) { | ||
| 33 | ile = !!(env->spr[SPR_LPCR] & LPCR_ILE); | ||
| 34 | + } else { | ||
| 35 | + ile = !!(msr_ile); | ||
| 36 | } | ||
| 37 | |||
| 38 | return ile; | ||
| 39 | -- | ||
| 40 | 2.31.1 | ||
| 41 | |||
| 42 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | The ppc_interrupts_little_endian function is now suitable for | ||
| 4 | determining the endianness of interrupts for all CPUs. | ||
| 5 | |||
| 6 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 7 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 8 | Message-Id: <20220107222601.4101511-7-farosas@linux.ibm.com> | ||
| 9 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 10 | --- | ||
| 11 | target/ppc/excp_helper.c | 29 +---------------------------- | ||
| 12 | 1 file changed, 1 insertion(+), 28 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/ppc/excp_helper.c | ||
| 17 | +++ b/target/ppc/excp_helper.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 19 | * Sort out endianness of interrupt, this differs depending on the | ||
| 20 | * CPU, the HV mode, etc... | ||
| 21 | */ | ||
| 22 | -#ifdef TARGET_PPC64 | ||
| 23 | - if (excp_model == POWERPC_EXCP_POWER7) { | ||
| 24 | - if (!(new_msr & MSR_HVB) && (env->spr[SPR_LPCR] & LPCR_ILE)) { | ||
| 25 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 26 | - } | ||
| 27 | - } else if (excp_model == POWERPC_EXCP_POWER8) { | ||
| 28 | - if (new_msr & MSR_HVB) { | ||
| 29 | - if (env->spr[SPR_HID0] & HID0_HILE) { | ||
| 30 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 31 | - } | ||
| 32 | - } else if (env->spr[SPR_LPCR] & LPCR_ILE) { | ||
| 33 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 34 | - } | ||
| 35 | - } else if (excp_model == POWERPC_EXCP_POWER9 || | ||
| 36 | - excp_model == POWERPC_EXCP_POWER10) { | ||
| 37 | - if (new_msr & MSR_HVB) { | ||
| 38 | - if (env->spr[SPR_HID0] & HID0_POWER9_HILE) { | ||
| 39 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 40 | - } | ||
| 41 | - } else if (env->spr[SPR_LPCR] & LPCR_ILE) { | ||
| 42 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 43 | - } | ||
| 44 | - } else if (msr_ile) { | ||
| 45 | - new_msr |= (target_ulong)1 << MSR_LE; | ||
| 46 | - } | ||
| 47 | -#else | ||
| 48 | - if (msr_ile) { | ||
| 49 | + if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) { | ||
| 50 | new_msr |= (target_ulong)1 << MSR_LE; | ||
| 51 | } | ||
| 52 | -#endif | ||
| 53 | |||
| 54 | #if defined(TARGET_PPC64) | ||
| 55 | if (excp_model == POWERPC_EXCP_BOOKE) { | ||
| 56 | -- | ||
| 57 | 2.31.1 | ||
| 58 | |||
| 59 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | Next patches will split powerpc_excp in multiple family specific | ||
| 4 | handlers. This patch adds a wrapper to make the transition clearer. | ||
| 5 | |||
| 6 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 7 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 8 | Message-Id: <20220107222601.4101511-8-farosas@linux.ibm.com> | ||
| 9 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 10 | --- | ||
| 11 | target/ppc/excp_helper.c | 12 +++++++++++- | ||
| 12 | 1 file changed, 11 insertions(+), 1 deletion(-) | ||
| 13 | |||
| 14 | diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/target/ppc/excp_helper.c | ||
| 17 | +++ b/target/ppc/excp_helper.c | ||
| 18 | @@ -XXX,XX +XXX,XX @@ static void powerpc_set_excp_state(PowerPCCPU *cpu, | ||
| 19 | * Note that this function should be greatly optimized when called | ||
| 20 | * with a constant excp, from ppc_hw_interrupt | ||
| 21 | */ | ||
| 22 | -static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 23 | +static inline void powerpc_excp_legacy(PowerPCCPU *cpu, int excp) | ||
| 24 | { | ||
| 25 | CPUState *cs = CPU(cpu); | ||
| 26 | CPUPPCState *env = &cpu->env; | ||
| 27 | @@ -XXX,XX +XXX,XX @@ static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 28 | powerpc_set_excp_state(cpu, vector, new_msr); | ||
| 29 | } | ||
| 30 | |||
| 31 | +static void powerpc_excp(PowerPCCPU *cpu, int excp) | ||
| 32 | +{ | ||
| 33 | + CPUPPCState *env = &cpu->env; | ||
| 34 | + | ||
| 35 | + switch (env->excp_model) { | ||
| 36 | + default: | ||
| 37 | + powerpc_excp_legacy(cpu, excp); | ||
| 38 | + } | ||
| 39 | +} | ||
| 40 | + | ||
| 41 | void ppc_cpu_do_interrupt(CPUState *cs) | ||
| 42 | { | ||
| 43 | PowerPCCPU *cpu = POWERPC_CPU(cs); | ||
| 44 | -- | ||
| 45 | 2.31.1 | ||
| 46 | |||
| 47 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 2 | 1 | ||
| 3 | We use the endianness of interrupts to determine which endianness to | ||
| 4 | use for the guest kernel memory dump. For machines that support HILE | ||
| 5 | (powernv8 and up) we have been always generating big endian dump | ||
| 6 | files. | ||
| 7 | |||
| 8 | This patch uses the HILE support recently added to | ||
| 9 | ppc_interrupts_little_endian to fix the endianness of the dumps for | ||
| 10 | powernv machines. | ||
| 11 | |||
| 12 | Here are two dumps created at different moments: | ||
| 13 | |||
| 14 | $ file skiboot.dump | ||
| 15 | skiboot.dump: ELF 64-bit MSB core file, 64-bit PowerPC ... | ||
| 16 | |||
| 17 | $ file kernel.dump | ||
| 18 | kernel.dump: ELF 64-bit LSB core file, 64-bit PowerPC ... | ||
| 19 | |||
| 20 | Suggested-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 21 | Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> | ||
| 22 | Reviewed-by: David Gibson <david@gibson.dropbear.id.au> | ||
| 23 | Message-Id: <20220107222601.4101511-9-farosas@linux.ibm.com> | ||
| 24 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 25 | --- | ||
| 26 | target/ppc/arch_dump.c | 2 +- | ||
| 27 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 28 | |||
| 29 | diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c | ||
| 30 | index XXXXXXX..XXXXXXX 100644 | ||
| 31 | --- a/target/ppc/arch_dump.c | ||
| 32 | +++ b/target/ppc/arch_dump.c | ||
| 33 | @@ -XXX,XX +XXX,XX @@ int cpu_get_dump_info(ArchDumpInfo *info, | ||
| 34 | info->d_machine = PPC_ELF_MACHINE; | ||
| 35 | info->d_class = ELFCLASS; | ||
| 36 | |||
| 37 | - if (ppc_interrupts_little_endian(cpu, false)) { | ||
| 38 | + if (ppc_interrupts_little_endian(cpu, cpu->env.has_hv_mode)) { | ||
| 39 | info->d_endian = ELFDATA2LSB; | ||
| 40 | } else { | ||
| 41 | info->d_endian = ELFDATA2MSB; | ||
| 42 | -- | ||
| 43 | 2.31.1 | ||
| 44 | |||
| 45 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | When creating a pnv_phb3_root_port using the command line, the first | ||
| 4 | root port is created successfully, but the second fails with the | ||
| 5 | following error: | ||
| 6 | |||
| 7 | qemu-system-ppc64: -device pnv-phb3-root-port,bus=phb3-root.0,id=pcie.3: | ||
| 8 | Can't add chassis slot, error -16 | ||
| 9 | |||
| 10 | This error comes from the realize() function of its parent type, | ||
| 11 | rp_realize() from TYPE_PCIE_ROOT_PORT. pcie_chassis_add_slot() fails | ||
| 12 | with -EBUSY if there's an existing PCIESlot that has the same | ||
| 13 | chassis/slot value, regardless of being in a different bus. | ||
| 14 | |||
| 15 | One way to prevent this error is simply set chassis and slot values in | ||
| 16 | the command line. However, since phb3 root buses only supports a single | ||
| 17 | root port, we can just get an unique chassis/slot value by checking | ||
| 18 | which root bus the pnv_phb3_root_port is going to be attached, get the | ||
| 19 | equivalent phb3 device and use its chip-id and index values, which are | ||
| 20 | guaranteed to be unique. | ||
| 21 | |||
| 22 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 23 | Message-Id: <20220105212338.49899-2-danielhb413@gmail.com> | ||
| 24 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 25 | --- | ||
| 26 | hw/pci-host/pnv_phb3.c | 16 ++++++++++++++++ | ||
| 27 | 1 file changed, 16 insertions(+) | ||
| 28 | |||
| 29 | diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c | ||
| 30 | index XXXXXXX..XXXXXXX 100644 | ||
| 31 | --- a/hw/pci-host/pnv_phb3.c | ||
| 32 | +++ b/hw/pci-host/pnv_phb3.c | ||
| 33 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo pnv_phb3_root_bus_info = { | ||
| 34 | static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp) | ||
| 35 | { | ||
| 36 | PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); | ||
| 37 | + PCIDevice *pci = PCI_DEVICE(dev); | ||
| 38 | + PCIBus *bus = pci_get_bus(pci); | ||
| 39 | + PnvPHB3 *phb = NULL; | ||
| 40 | Error *local_err = NULL; | ||
| 41 | |||
| 42 | + phb = (PnvPHB3 *) object_dynamic_cast(OBJECT(bus->qbus.parent), | ||
| 43 | + TYPE_PNV_PHB3); | ||
| 44 | + | ||
| 45 | + if (!phb) { | ||
| 46 | + error_setg(errp, | ||
| 47 | +"pnv_phb3_root_port devices must be connected to pnv-phb3 buses"); | ||
| 48 | + return; | ||
| 49 | + } | ||
| 50 | + | ||
| 51 | + /* Set unique chassis/slot values for the root port */ | ||
| 52 | + qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id); | ||
| 53 | + qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id); | ||
| 54 | + | ||
| 55 | rpc->parent_realize(dev, &local_err); | ||
| 56 | if (local_err) { | ||
| 57 | error_propagate(errp, local_err); | ||
| 58 | -- | ||
| 59 | 2.31.1 | ||
| 60 | |||
| 61 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | A similar situation as described previously with pnv_phb3_root_port | ||
| 4 | devices also happens with pnv_phb4_root_ports. | ||
| 5 | |||
| 6 | The solution is the same: assign an unique chassis/slot combo for them. | ||
| 7 | |||
| 8 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 9 | Message-Id: <20220105212338.49899-3-danielhb413@gmail.com> | ||
| 10 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 11 | --- | ||
| 12 | hw/pci-host/pnv_phb4.c | 15 +++++++++++++++ | ||
| 13 | 1 file changed, 15 insertions(+) | ||
| 14 | |||
| 15 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 16 | index XXXXXXX..XXXXXXX 100644 | ||
| 17 | --- a/hw/pci-host/pnv_phb4.c | ||
| 18 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 19 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_root_port_reset(DeviceState *dev) | ||
| 20 | static void pnv_phb4_root_port_realize(DeviceState *dev, Error **errp) | ||
| 21 | { | ||
| 22 | PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); | ||
| 23 | + PCIDevice *pci = PCI_DEVICE(dev); | ||
| 24 | + PCIBus *bus = pci_get_bus(pci); | ||
| 25 | + PnvPHB4 *phb = NULL; | ||
| 26 | Error *local_err = NULL; | ||
| 27 | |||
| 28 | + phb = (PnvPHB4 *) object_dynamic_cast(OBJECT(bus->qbus.parent), | ||
| 29 | + TYPE_PNV_PHB4); | ||
| 30 | + | ||
| 31 | + if (!phb) { | ||
| 32 | + error_setg(errp, "%s must be connected to pnv-phb4 buses", dev->id); | ||
| 33 | + return; | ||
| 34 | + } | ||
| 35 | + | ||
| 36 | + /* Set unique chassis/slot values for the root port */ | ||
| 37 | + qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id); | ||
| 38 | + qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id); | ||
| 39 | + | ||
| 40 | rpc->parent_realize(dev, &local_err); | ||
| 41 | if (local_err) { | ||
| 42 | error_propagate(errp, local_err); | ||
| 43 | -- | ||
| 44 | 2.31.1 | ||
| 45 | |||
| 46 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | This cleanups the PHB3 model a bit more since the root port is an | ||
| 2 | independent device and it will ease our task when adding user created | ||
| 3 | PHB3s. | ||
| 4 | 1 | ||
| 5 | pnv_phb_attach_root_port() is made public in pnv.c so it can be reused | ||
| 6 | with the pnv_phb4 root port later. | ||
| 7 | |||
| 8 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 9 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 10 | Message-Id: <20220105212338.49899-4-danielhb413@gmail.com> | ||
| 11 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 12 | --- | ||
| 13 | include/hw/pci-host/pnv_phb3.h | 2 -- | ||
| 14 | include/hw/ppc/pnv.h | 1 + | ||
| 15 | hw/pci-host/pnv_phb3.c | 15 ++++++--------- | ||
| 16 | hw/ppc/pnv.c | 8 ++++++++ | ||
| 17 | 4 files changed, 15 insertions(+), 11 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h | ||
| 20 | index XXXXXXX..XXXXXXX 100644 | ||
| 21 | --- a/include/hw/pci-host/pnv_phb3.h | ||
| 22 | +++ b/include/hw/pci-host/pnv_phb3.h | ||
| 23 | @@ -XXX,XX +XXX,XX @@ struct PnvPHB3 { | ||
| 24 | |||
| 25 | PnvPBCQState pbcq; | ||
| 26 | |||
| 27 | - PnvPHB3RootPort root; | ||
| 28 | - | ||
| 29 | QLIST_HEAD(, PnvPhb3DMASpace) dma_spaces; | ||
| 30 | |||
| 31 | PnvChip *chip; | ||
| 32 | diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h | ||
| 33 | index XXXXXXX..XXXXXXX 100644 | ||
| 34 | --- a/include/hw/ppc/pnv.h | ||
| 35 | +++ b/include/hw/ppc/pnv.h | ||
| 36 | @@ -XXX,XX +XXX,XX @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10, | ||
| 37 | TYPE_PNV_CHIP_POWER10) | ||
| 38 | |||
| 39 | PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); | ||
| 40 | +void pnv_phb_attach_root_port(PCIHostState *pci, const char *name); | ||
| 41 | |||
| 42 | #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") | ||
| 43 | typedef struct PnvMachineClass PnvMachineClass; | ||
| 44 | diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c | ||
| 45 | index XXXXXXX..XXXXXXX 100644 | ||
| 46 | --- a/hw/pci-host/pnv_phb3.c | ||
| 47 | +++ b/hw/pci-host/pnv_phb3.c | ||
| 48 | @@ -XXX,XX +XXX,XX @@ | ||
| 49 | #include "hw/irq.h" | ||
| 50 | #include "hw/qdev-properties.h" | ||
| 51 | #include "qom/object.h" | ||
| 52 | +#include "sysemu/sysemu.h" | ||
| 53 | |||
| 54 | #define phb3_error(phb, fmt, ...) \ | ||
| 55 | qemu_log_mask(LOG_GUEST_ERROR, "phb3[%d:%d]: " fmt "\n", \ | ||
| 56 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_instance_init(Object *obj) | ||
| 57 | /* Power Bus Common Queue */ | ||
| 58 | object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ); | ||
| 59 | |||
| 60 | - /* Root Port */ | ||
| 61 | - object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PORT); | ||
| 62 | - qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); | ||
| 63 | - qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); | ||
| 64 | } | ||
| 65 | |||
| 66 | static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 67 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 68 | |||
| 69 | pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb); | ||
| 70 | |||
| 71 | - /* Add a single Root port */ | ||
| 72 | - qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); | ||
| 73 | - qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); | ||
| 74 | - qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); | ||
| 75 | + if (defaults_enabled()) { | ||
| 76 | + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), | ||
| 77 | + TYPE_PNV_PHB3_ROOT_PORT); | ||
| 78 | + } | ||
| 79 | } | ||
| 80 | |||
| 81 | void pnv_phb3_update_regions(PnvPHB3 *phb) | ||
| 82 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data) | ||
| 83 | |||
| 84 | device_class_set_parent_realize(dc, pnv_phb3_root_port_realize, | ||
| 85 | &rpc->parent_realize); | ||
| 86 | - dc->user_creatable = false; | ||
| 87 | + dc->user_creatable = true; | ||
| 88 | |||
| 89 | k->vendor_id = PCI_VENDOR_ID_IBM; | ||
| 90 | k->device_id = 0x03dc; | ||
| 91 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 92 | index XXXXXXX..XXXXXXX 100644 | ||
| 93 | --- a/hw/ppc/pnv.c | ||
| 94 | +++ b/hw/ppc/pnv.c | ||
| 95 | @@ -XXX,XX +XXX,XX @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) | ||
| 96 | } | ||
| 97 | } | ||
| 98 | |||
| 99 | +/* Attach a root port device */ | ||
| 100 | +void pnv_phb_attach_root_port(PCIHostState *pci, const char *name) | ||
| 101 | +{ | ||
| 102 | + PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name); | ||
| 103 | + | ||
| 104 | + pci_realize_and_unref(root, pci->bus, &error_fatal); | ||
| 105 | +} | ||
| 106 | + | ||
| 107 | static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) | ||
| 108 | { | ||
| 109 | PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev); | ||
| 110 | -- | ||
| 111 | 2.31.1 | ||
| 112 | |||
| 113 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | We want to create only the absolutely minimal amount of devices when | ||
| 4 | running with -nodefaults. The root port is something that the machine | ||
| 5 | can boot up without. But, to do that, we need to provide a way for the | ||
| 6 | user to add them by hand. | ||
| 7 | |||
| 8 | This patch makes pnv-phb4-root-port user creatable and then uses the | ||
| 9 | pnv_phb_attach_root_port() helper to add a pnv_phb4_root_port only when | ||
| 10 | running with default settings. | ||
| 11 | |||
| 12 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 13 | Message-Id: <20220105212338.49899-5-danielhb413@gmail.com> | ||
| 14 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 15 | --- | ||
| 16 | include/hw/pci-host/pnv_phb4.h | 2 -- | ||
| 17 | hw/pci-host/pnv_phb4.c | 18 +++++++----------- | ||
| 18 | 2 files changed, 7 insertions(+), 13 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h | ||
| 21 | index XXXXXXX..XXXXXXX 100644 | ||
| 22 | --- a/include/hw/pci-host/pnv_phb4.h | ||
| 23 | +++ b/include/hw/pci-host/pnv_phb4.h | ||
| 24 | @@ -XXX,XX +XXX,XX @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4) | ||
| 25 | struct PnvPHB4 { | ||
| 26 | PCIExpressHost parent_obj; | ||
| 27 | |||
| 28 | - PnvPHB4RootPort root; | ||
| 29 | - | ||
| 30 | uint32_t chip_id; | ||
| 31 | uint32_t phb_id; | ||
| 32 | |||
| 33 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 34 | index XXXXXXX..XXXXXXX 100644 | ||
| 35 | --- a/hw/pci-host/pnv_phb4.c | ||
| 36 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 37 | @@ -XXX,XX +XXX,XX @@ | ||
| 38 | #include "hw/irq.h" | ||
| 39 | #include "hw/qdev-properties.h" | ||
| 40 | #include "qom/object.h" | ||
| 41 | +#include "sysemu/sysemu.h" | ||
| 42 | #include "trace.h" | ||
| 43 | |||
| 44 | #define phb_error(phb, fmt, ...) \ | ||
| 45 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_instance_init(Object *obj) | ||
| 46 | |||
| 47 | /* XIVE interrupt source object */ | ||
| 48 | object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); | ||
| 49 | - | ||
| 50 | - /* Root Port */ | ||
| 51 | - object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PORT); | ||
| 52 | - | ||
| 53 | - qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); | ||
| 54 | - qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); | ||
| 55 | } | ||
| 56 | |||
| 57 | static void pnv_phb4_realize(DeviceState *dev, Error **errp) | ||
| 58 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) | ||
| 59 | pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb); | ||
| 60 | pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE; | ||
| 61 | |||
| 62 | - /* Add a single Root port */ | ||
| 63 | - qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); | ||
| 64 | - qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); | ||
| 65 | - qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); | ||
| 66 | + /* Add a single Root port if running with defaults */ | ||
| 67 | + if (defaults_enabled()) { | ||
| 68 | + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), | ||
| 69 | + TYPE_PNV_PHB4_ROOT_PORT); | ||
| 70 | + } | ||
| 71 | |||
| 72 | /* Setup XIVE Source */ | ||
| 73 | if (phb->big_phb) { | ||
| 74 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_root_port_class_init(ObjectClass *klass, void *data) | ||
| 75 | PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass); | ||
| 76 | |||
| 77 | dc->desc = "IBM PHB4 PCIE Root Port"; | ||
| 78 | - dc->user_creatable = false; | ||
| 79 | + dc->user_creatable = true; | ||
| 80 | |||
| 81 | device_class_set_parent_realize(dc, pnv_phb4_root_port_realize, | ||
| 82 | &rpc->parent_realize); | ||
| 83 | -- | ||
| 84 | 2.31.1 | ||
| 85 | |||
| 86 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | pnv_phb4_rc_config_read() and pnv_phb4_rc_config_write() are asserting | ||
| 4 | the existence of the root port. The root port is now optional, and there | ||
| 5 | will be cases where a pnv-phb4 device won't have a root port attached. | ||
| 6 | |||
| 7 | Instead of asserting, check if the root port exists before read/writing | ||
| 8 | into it. | ||
| 9 | |||
| 10 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 11 | Message-Id: <20220105212338.49899-6-danielhb413@gmail.com> | ||
| 12 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 13 | --- | ||
| 14 | hw/pci-host/pnv_phb4.c | 10 ++++++++-- | ||
| 15 | 1 file changed, 8 insertions(+), 2 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 18 | index XXXXXXX..XXXXXXX 100644 | ||
| 19 | --- a/hw/pci-host/pnv_phb4.c | ||
| 20 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 21 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_rc_config_write(PnvPHB4 *phb, unsigned off, | ||
| 22 | } | ||
| 23 | |||
| 24 | pdev = pci_find_device(pci->bus, 0, 0); | ||
| 25 | - assert(pdev); | ||
| 26 | + if (!pdev) { | ||
| 27 | + phb_error(phb, "rc_config_write device not found\n"); | ||
| 28 | + return; | ||
| 29 | + } | ||
| 30 | |||
| 31 | pci_host_config_write_common(pdev, off, PHB_RC_CONFIG_SIZE, | ||
| 32 | bswap32(val), 4); | ||
| 33 | @@ -XXX,XX +XXX,XX @@ static uint64_t pnv_phb4_rc_config_read(PnvPHB4 *phb, unsigned off, | ||
| 34 | } | ||
| 35 | |||
| 36 | pdev = pci_find_device(pci->bus, 0, 0); | ||
| 37 | - assert(pdev); | ||
| 38 | + if (!pdev) { | ||
| 39 | + phb_error(phb, "rc_config_read device not found\n"); | ||
| 40 | + return ~0ull; | ||
| 41 | + } | ||
| 42 | |||
| 43 | val = pci_host_config_read_common(pdev, off, PHB_RC_CONFIG_SIZE, 4); | ||
| 44 | return bswap32(val); | ||
| 45 | -- | ||
| 46 | 2.31.1 | ||
| 47 | |||
| 48 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | PHB3 devices and PCI devices can now be added to the powernv8 machine | ||
| 2 | using : | ||
| 3 | 1 | ||
| 4 | -device pnv-phb3,chip-id=0,index=1 \ | ||
| 5 | -device nec-usb-xhci,bus=pci.1,addr=0x0 | ||
| 6 | |||
| 7 | The 'index' property identifies the PHB3 in the chip. In case of user | ||
| 8 | created devices, a lookup on 'chip-id' is required to assign the | ||
| 9 | owning chip. | ||
| 10 | |||
| 11 | Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 12 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 13 | Message-Id: <20220105212338.49899-7-danielhb413@gmail.com> | ||
| 14 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 15 | --- | ||
| 16 | include/hw/ppc/pnv.h | 2 ++ | ||
| 17 | hw/pci-host/pnv_phb3.c | 11 ++++++++++- | ||
| 18 | hw/ppc/pnv.c | 23 ++++++++++++++++++----- | ||
| 19 | 3 files changed, 30 insertions(+), 6 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h | ||
| 22 | index XXXXXXX..XXXXXXX 100644 | ||
| 23 | --- a/include/hw/ppc/pnv.h | ||
| 24 | +++ b/include/hw/ppc/pnv.h | ||
| 25 | @@ -XXX,XX +XXX,XX @@ struct PnvMachineState { | ||
| 26 | hwaddr fw_load_addr; | ||
| 27 | }; | ||
| 28 | |||
| 29 | +PnvChip *pnv_get_chip(PnvMachineState *pnv, uint32_t chip_id); | ||
| 30 | + | ||
| 31 | #define PNV_FDT_ADDR 0x01000000 | ||
| 32 | #define PNV_TIMEBASE_FREQ 512000000ULL | ||
| 33 | |||
| 34 | diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c | ||
| 35 | index XXXXXXX..XXXXXXX 100644 | ||
| 36 | --- a/hw/pci-host/pnv_phb3.c | ||
| 37 | +++ b/hw/pci-host/pnv_phb3.c | ||
| 38 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 39 | PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); | ||
| 40 | int i; | ||
| 41 | |||
| 42 | + /* User created devices */ | ||
| 43 | + if (!phb->chip) { | ||
| 44 | + phb->chip = pnv_get_chip(pnv, phb->chip_id); | ||
| 45 | + if (!phb->chip) { | ||
| 46 | + error_setg(errp, "invalid chip id: %d", phb->chip_id); | ||
| 47 | + return; | ||
| 48 | + } | ||
| 49 | + } | ||
| 50 | + | ||
| 51 | if (phb->phb_id >= PNV_CHIP_GET_CLASS(phb->chip)->num_phbs) { | ||
| 52 | error_setg(errp, "invalid PHB index: %d", phb->phb_id); | ||
| 53 | return; | ||
| 54 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_class_init(ObjectClass *klass, void *data) | ||
| 55 | dc->realize = pnv_phb3_realize; | ||
| 56 | device_class_set_props(dc, pnv_phb3_properties); | ||
| 57 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); | ||
| 58 | - dc->user_creatable = false; | ||
| 59 | + dc->user_creatable = true; | ||
| 60 | } | ||
| 61 | |||
| 62 | static const TypeInfo pnv_phb3_type_info = { | ||
| 63 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 64 | index XXXXXXX..XXXXXXX 100644 | ||
| 65 | --- a/hw/ppc/pnv.c | ||
| 66 | +++ b/hw/ppc/pnv.c | ||
| 67 | @@ -XXX,XX +XXX,XX @@ static void pnv_chip_power8_instance_init(Object *obj) | ||
| 68 | |||
| 69 | object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER); | ||
| 70 | |||
| 71 | - for (i = 0; i < pcc->num_phbs; i++) { | ||
| 72 | + if (defaults_enabled()) { | ||
| 73 | + chip->num_phbs = pcc->num_phbs; | ||
| 74 | + } | ||
| 75 | + | ||
| 76 | + for (i = 0; i < chip->num_phbs; i++) { | ||
| 77 | object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB3); | ||
| 78 | } | ||
| 79 | |||
| 80 | - /* | ||
| 81 | - * Number of PHBs is the chip default | ||
| 82 | - */ | ||
| 83 | - chip->num_phbs = pcc->num_phbs; | ||
| 84 | } | ||
| 85 | |||
| 86 | static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) | ||
| 87 | @@ -XXX,XX +XXX,XX @@ static ICSState *pnv_ics_get(XICSFabric *xi, int irq) | ||
| 88 | return NULL; | ||
| 89 | } | ||
| 90 | |||
| 91 | +PnvChip *pnv_get_chip(PnvMachineState *pnv, uint32_t chip_id) | ||
| 92 | +{ | ||
| 93 | + int i; | ||
| 94 | + | ||
| 95 | + for (i = 0; i < pnv->num_chips; i++) { | ||
| 96 | + PnvChip *chip = pnv->chips[i]; | ||
| 97 | + if (chip->chip_id == chip_id) { | ||
| 98 | + return chip; | ||
| 99 | + } | ||
| 100 | + } | ||
| 101 | + return NULL; | ||
| 102 | +} | ||
| 103 | + | ||
| 104 | static int pnv_ics_resend_child(Object *child, void *opaque) | ||
| 105 | { | ||
| 106 | PnvPHB3 *phb3 = (PnvPHB3 *) object_dynamic_cast(child, TYPE_PNV_PHB3); | ||
| 107 | -- | ||
| 108 | 2.31.1 | ||
| 109 | |||
| 110 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | The powernv machine uses the object hierarchy to populate the device | ||
| 2 | tree and each device should be parented to the chip it belongs to. | ||
| 3 | This is not the case for user created devices which are parented to | ||
| 4 | the container "/unattached". | ||
| 5 | 1 | ||
| 6 | Make sure a PHB3 device is parented to its chip by reparenting the | ||
| 7 | object if necessary. | ||
| 8 | |||
| 9 | Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 10 | Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> | ||
| 11 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 12 | Message-Id: <20220105212338.49899-8-danielhb413@gmail.com> | ||
| 13 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 14 | --- | ||
| 15 | include/hw/ppc/pnv.h | 1 + | ||
| 16 | hw/pci-host/pnv_phb3.c | 6 ++++++ | ||
| 17 | hw/ppc/pnv.c | 17 +++++++++++++++++ | ||
| 18 | 3 files changed, 24 insertions(+) | ||
| 19 | |||
| 20 | diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h | ||
| 21 | index XXXXXXX..XXXXXXX 100644 | ||
| 22 | --- a/include/hw/ppc/pnv.h | ||
| 23 | +++ b/include/hw/ppc/pnv.h | ||
| 24 | @@ -XXX,XX +XXX,XX @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10, | ||
| 25 | |||
| 26 | PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); | ||
| 27 | void pnv_phb_attach_root_port(PCIHostState *pci, const char *name); | ||
| 28 | +void pnv_chip_parent_fixup(PnvChip *chip, Object *obj, int index); | ||
| 29 | |||
| 30 | #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") | ||
| 31 | typedef struct PnvMachineClass PnvMachineClass; | ||
| 32 | diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c | ||
| 33 | index XXXXXXX..XXXXXXX 100644 | ||
| 34 | --- a/hw/pci-host/pnv_phb3.c | ||
| 35 | +++ b/hw/pci-host/pnv_phb3.c | ||
| 36 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 37 | error_setg(errp, "invalid chip id: %d", phb->chip_id); | ||
| 38 | return; | ||
| 39 | } | ||
| 40 | + | ||
| 41 | + /* | ||
| 42 | + * Reparent user created devices to the chip to build | ||
| 43 | + * correctly the device tree. | ||
| 44 | + */ | ||
| 45 | + pnv_chip_parent_fixup(phb->chip, OBJECT(phb), phb->phb_id); | ||
| 46 | } | ||
| 47 | |||
| 48 | if (phb->phb_id >= PNV_CHIP_GET_CLASS(phb->chip)->num_phbs) { | ||
| 49 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 50 | index XXXXXXX..XXXXXXX 100644 | ||
| 51 | --- a/hw/ppc/pnv.c | ||
| 52 | +++ b/hw/ppc/pnv.c | ||
| 53 | @@ -XXX,XX +XXX,XX @@ static ICSState *pnv_ics_get(XICSFabric *xi, int irq) | ||
| 54 | return NULL; | ||
| 55 | } | ||
| 56 | |||
| 57 | +void pnv_chip_parent_fixup(PnvChip *chip, Object *obj, int index) | ||
| 58 | +{ | ||
| 59 | + Object *parent = OBJECT(chip); | ||
| 60 | + g_autofree char *default_id = | ||
| 61 | + g_strdup_printf("%s[%d]", object_get_typename(obj), index); | ||
| 62 | + | ||
| 63 | + if (obj->parent == parent) { | ||
| 64 | + return; | ||
| 65 | + } | ||
| 66 | + | ||
| 67 | + object_ref(obj); | ||
| 68 | + object_unparent(obj); | ||
| 69 | + object_property_add_child( | ||
| 70 | + parent, DEVICE(obj)->id ? DEVICE(obj)->id : default_id, obj); | ||
| 71 | + object_unref(obj); | ||
| 72 | +} | ||
| 73 | + | ||
| 74 | PnvChip *pnv_get_chip(PnvMachineState *pnv, uint32_t chip_id) | ||
| 75 | { | ||
| 76 | int i; | ||
| 77 | -- | ||
| 78 | 2.31.1 | ||
| 79 | |||
| 80 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | PHB3s ared SysBus devices and should be allowed to be dynamically | ||
| 2 | created. | ||
| 3 | 1 | ||
| 4 | Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 5 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 6 | Message-Id: <20220105212338.49899-9-danielhb413@gmail.com> | ||
| 7 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 8 | --- | ||
| 9 | hw/pci-host/pnv_phb3.c | 9 +++++++++ | ||
| 10 | hw/ppc/pnv.c | 2 ++ | ||
| 11 | 2 files changed, 11 insertions(+) | ||
| 12 | |||
| 13 | diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c | ||
| 14 | index XXXXXXX..XXXXXXX 100644 | ||
| 15 | --- a/hw/pci-host/pnv_phb3.c | ||
| 16 | +++ b/hw/pci-host/pnv_phb3.c | ||
| 17 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 18 | |||
| 19 | /* User created devices */ | ||
| 20 | if (!phb->chip) { | ||
| 21 | + Error *local_err = NULL; | ||
| 22 | + BusState *s; | ||
| 23 | + | ||
| 24 | phb->chip = pnv_get_chip(pnv, phb->chip_id); | ||
| 25 | if (!phb->chip) { | ||
| 26 | error_setg(errp, "invalid chip id: %d", phb->chip_id); | ||
| 27 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) | ||
| 28 | * correctly the device tree. | ||
| 29 | */ | ||
| 30 | pnv_chip_parent_fixup(phb->chip, OBJECT(phb), phb->phb_id); | ||
| 31 | + | ||
| 32 | + s = qdev_get_parent_bus(DEVICE(phb->chip)); | ||
| 33 | + if (!qdev_set_parent_bus(DEVICE(phb), s, &local_err)) { | ||
| 34 | + error_propagate(errp, local_err); | ||
| 35 | + return; | ||
| 36 | + } | ||
| 37 | } | ||
| 38 | |||
| 39 | if (phb->phb_id >= PNV_CHIP_GET_CLASS(phb->chip)->num_phbs) { | ||
| 40 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 41 | index XXXXXXX..XXXXXXX 100644 | ||
| 42 | --- a/hw/ppc/pnv.c | ||
| 43 | +++ b/hw/ppc/pnv.c | ||
| 44 | @@ -XXX,XX +XXX,XX @@ static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) | ||
| 45 | |||
| 46 | pmc->compat = compat; | ||
| 47 | pmc->compat_size = sizeof(compat); | ||
| 48 | + | ||
| 49 | + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB3); | ||
| 50 | } | ||
| 51 | |||
| 52 | static void pnv_machine_power9_class_init(ObjectClass *oc, void *data) | ||
| 53 | -- | ||
| 54 | 2.31.1 | ||
| 55 | |||
| 56 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | It is not used elsewhere so that's where it belongs. | ||
| 2 | 1 | ||
| 3 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 4 | Message-Id: <20220105212338.49899-10-danielhb413@gmail.com> | ||
| 5 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 6 | --- | ||
| 7 | include/hw/ppc/pnv.h | 4 ++-- | ||
| 8 | hw/ppc/pnv.c | 7 +++---- | ||
| 9 | 2 files changed, 5 insertions(+), 6 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h | ||
| 12 | index XXXXXXX..XXXXXXX 100644 | ||
| 13 | --- a/include/hw/ppc/pnv.h | ||
| 14 | +++ b/include/hw/ppc/pnv.h | ||
| 15 | @@ -XXX,XX +XXX,XX @@ struct PnvChip { | ||
| 16 | uint64_t cores_mask; | ||
| 17 | PnvCore **cores; | ||
| 18 | |||
| 19 | - uint32_t num_phbs; | ||
| 20 | uint32_t num_pecs; | ||
| 21 | |||
| 22 | MemoryRegion xscom_mmio; | ||
| 23 | @@ -XXX,XX +XXX,XX @@ struct Pnv8Chip { | ||
| 24 | |||
| 25 | #define PNV8_CHIP_PHB3_MAX 4 | ||
| 26 | PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; | ||
| 27 | + uint32_t num_phbs; | ||
| 28 | |||
| 29 | XICSFabric *xics; | ||
| 30 | }; | ||
| 31 | @@ -XXX,XX +XXX,XX @@ struct PnvChipClass { | ||
| 32 | /*< public >*/ | ||
| 33 | uint64_t chip_cfam_id; | ||
| 34 | uint64_t cores_mask; | ||
| 35 | - uint32_t num_phbs; | ||
| 36 | uint32_t num_pecs; | ||
| 37 | + uint32_t num_phbs; | ||
| 38 | |||
| 39 | DeviceRealize parent_realize; | ||
| 40 | |||
| 41 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 42 | index XXXXXXX..XXXXXXX 100644 | ||
| 43 | --- a/hw/ppc/pnv.c | ||
| 44 | +++ b/hw/ppc/pnv.c | ||
| 45 | @@ -XXX,XX +XXX,XX @@ static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, | ||
| 46 | |||
| 47 | static void pnv_chip_power8_instance_init(Object *obj) | ||
| 48 | { | ||
| 49 | - PnvChip *chip = PNV_CHIP(obj); | ||
| 50 | Pnv8Chip *chip8 = PNV8_CHIP(obj); | ||
| 51 | PnvChipClass *pcc = PNV_CHIP_GET_CLASS(obj); | ||
| 52 | int i; | ||
| 53 | @@ -XXX,XX +XXX,XX @@ static void pnv_chip_power8_instance_init(Object *obj) | ||
| 54 | object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER); | ||
| 55 | |||
| 56 | if (defaults_enabled()) { | ||
| 57 | - chip->num_phbs = pcc->num_phbs; | ||
| 58 | + chip8->num_phbs = pcc->num_phbs; | ||
| 59 | } | ||
| 60 | |||
| 61 | - for (i = 0; i < chip->num_phbs; i++) { | ||
| 62 | + for (i = 0; i < chip8->num_phbs; i++) { | ||
| 63 | object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB3); | ||
| 64 | } | ||
| 65 | |||
| 66 | @@ -XXX,XX +XXX,XX @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) | ||
| 67 | &chip8->homer.regs); | ||
| 68 | |||
| 69 | /* PHB3 controllers */ | ||
| 70 | - for (i = 0; i < chip->num_phbs; i++) { | ||
| 71 | + for (i = 0; i < chip8->num_phbs; i++) { | ||
| 72 | PnvPHB3 *phb = &chip8->phbs[i]; | ||
| 73 | |||
| 74 | object_property_set_int(OBJECT(phb), "index", i, &error_fatal); | ||
| 75 | -- | ||
| 76 | 2.31.1 | ||
| 77 | |||
| 78 | diff view generated by jsdifflib |
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | 1 | We're not storing all GPIO lines we're retrieving with |
|---|---|---|---|
| 2 | qdev_get_gpio_in() in mal_irqs[]. We're storing just the last one in the | ||
| 3 | first index: | ||
| 2 | 4 | ||
| 3 | The TYPE_PNV_PHB3_ROOT_BUS name is used as the default bus name when | 5 | for (i = 0; i < ARRAY_SIZE(mal_irqs); i++) { |
| 4 | the dev has no 'id'. However, pnv-phb3-root-bus is a bit too long to be | 6 | mal_irqs[0] = qdev_get_gpio_in(uic[2], 3 + i); |
| 5 | used as a bus name. | 7 | } |
| 8 | ppc4xx_mal_init(env, 4, 16, mal_irqs); | ||
| 6 | 9 | ||
| 7 | Most common QEMU buses and PCI controllers are named based on their bus | 10 | mal_irqs is used in ppc4xx_mal_init() to assign the IRQs to MAL: |
| 8 | type (e.g. pSeries spapr-pci-host-bridge is called 'pci'). The most | ||
| 9 | common name for a PCIE bus controller in QEMU is 'pcie'. Naming it | ||
| 10 | 'pcie' would break the documented use of the pnv-phb3 device, since | ||
| 11 | 'pcie.0' would now refer to the root bus instead of the first root port. | ||
| 12 | 11 | ||
| 13 | There's nothing particularly wrong with the 'root-bus' name used before, | 12 | for (i = 0; i < 4; i++) { |
| 14 | aside from the fact that 'root-bus' is being used for pnv-phb3 and | 13 | mal->irqs[i] = irqs[i]; |
| 15 | pnv-phb4 created buses, which is not quite correct since these buses | 14 | } |
| 16 | aren't implemented the same way in QEMU - you can't plug a | ||
| 17 | pnv-phb4-root-port into a pnv-phb3 root bus, for example. | ||
| 18 | 15 | ||
| 19 | This patch renames it as 'pnv-phb3-root', which is a compromise between | 16 | Since only irqs[0] has been initialized, mal->irqs[1,2,3] are being |
| 20 | the existing and the previously used name. Creating 3 phbs without ID | 17 | zeroed. |
| 21 | will result in an "info qtree" output similar to this: | ||
| 22 | 18 | ||
| 23 | bus: main-system-bus | 19 | This doesn´t seem to trigger any apparent issues at this moment, but |
| 24 | type System | 20 | Cedric's QOMification of the MAL device [1] is executing a |
| 25 | dev: pnv-phb3, id "" | 21 | sysbus_connect_irq() that will fail if we do not store all GPIO lines |
| 26 | index = 2 (0x2) | 22 | properly. |
| 27 | chip-id = 0 (0x0) | ||
| 28 | x-config-reg-migration-enabled = true | ||
| 29 | bypass-iommu = false | ||
| 30 | bus: pnv-phb3-root.2 | ||
| 31 | type pnv-phb3-root | ||
| 32 | (...) | ||
| 33 | dev: pnv-phb3, id "" | ||
| 34 | index = 1 (0x1) | ||
| 35 | chip-id = 0 (0x0) | ||
| 36 | x-config-reg-migration-enabled = true | ||
| 37 | bypass-iommu = false | ||
| 38 | bus: pnv-phb3-root.1 | ||
| 39 | type pnv-phb3-root | ||
| 40 | (...) | ||
| 41 | dev: pnv-phb3, id "" | ||
| 42 | index = 0 (0x0) | ||
| 43 | chip-id = 0 (0x0) | ||
| 44 | x-config-reg-migration-enabled = true | ||
| 45 | bypass-iommu = false | ||
| 46 | bus: pnv-phb3-root.0 | ||
| 47 | type pnv-phb3-root | ||
| 48 | 23 | ||
| 24 | [1] https://lists.gnu.org/archive/html/qemu-devel/2022-08/msg00497.html | ||
| 25 | |||
| 26 | Cc: Peter Maydell <peter.maydell@linaro.org> | ||
| 27 | Cc: BALATON Zoltan <balaton@eik.bme.hu> | ||
| 28 | Fixes: 706e944206d7 ("hw/ppc/sam460ex: Drop use of ppcuic_init()") | ||
| 29 | Acked-by: BALATON Zoltan <balaton@eik.bme.hu> | ||
| 30 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 31 | Message-Id: <20220803233204.2724202-1-danielhb413@gmail.com> | ||
| 49 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | 32 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> |
| 50 | Message-Id: <20220105212338.49899-11-danielhb413@gmail.com> | ||
| 51 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 52 | --- | 33 | --- |
| 53 | include/hw/pci-host/pnv_phb3.h | 2 +- | 34 | hw/ppc/sam460ex.c | 2 +- |
| 54 | 1 file changed, 1 insertion(+), 1 deletion(-) | 35 | 1 file changed, 1 insertion(+), 1 deletion(-) |
| 55 | 36 | ||
| 56 | diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h | 37 | diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c |
| 57 | index XXXXXXX..XXXXXXX 100644 | 38 | index XXXXXXX..XXXXXXX 100644 |
| 58 | --- a/include/hw/pci-host/pnv_phb3.h | 39 | --- a/hw/ppc/sam460ex.c |
| 59 | +++ b/include/hw/pci-host/pnv_phb3.h | 40 | +++ b/hw/ppc/sam460ex.c |
| 60 | @@ -XXX,XX +XXX,XX @@ struct PnvPBCQState { | 41 | @@ -XXX,XX +XXX,XX @@ static void sam460ex_init(MachineState *machine) |
| 61 | /* | 42 | |
| 62 | * PHB3 PCIe Root port | 43 | /* MAL */ |
| 63 | */ | 44 | for (i = 0; i < ARRAY_SIZE(mal_irqs); i++) { |
| 64 | -#define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root-bus" | 45 | - mal_irqs[0] = qdev_get_gpio_in(uic[2], 3 + i); |
| 65 | +#define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root" | 46 | + mal_irqs[i] = qdev_get_gpio_in(uic[2], 3 + i); |
| 66 | 47 | } | |
| 67 | #define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port" | 48 | ppc4xx_mal_init(env, 4, 16, mal_irqs); |
| 68 | 49 | ||
| 69 | -- | 50 | -- |
| 70 | 2.31.1 | 51 | 2.36.1 |
| 71 | 52 | ||
| 72 | 53 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | Similar to what was happening with pnv-phb3 buses, | ||
| 4 | TYPE_PNV_PHB4_ROOT_BUS set to "pnv-phb4-root-bus" is a bit too long for | ||
| 5 | a default root bus name. The usual default name for theses buses in QEMU | ||
| 6 | are 'pcie', but we want to make a distinction between pnv-phb4 buses and | ||
| 7 | other PCIE buses, at least as far as default name goes, because not all | ||
| 8 | PCIE devices are attachable to a pnv-phb4 root-bus type. | ||
| 9 | |||
| 10 | Changing the default to 'pnv-phb4-root' allow us to have a shorter name | ||
| 11 | while making this bus distinct, and the user can always set its own bus | ||
| 12 | naming via the "id" attribute anyway. | ||
| 13 | |||
| 14 | This is the 'info qtree' output after this change, using a powernv9 | ||
| 15 | domain with 2 sockets and default settings enabled: | ||
| 16 | |||
| 17 | qemu-system-ppc64 -m 4G -machine powernv9,accel=tcg \ | ||
| 18 | -smp 2,sockets=2,cores=1,threads=1 | ||
| 19 | |||
| 20 | dev: pnv-phb4, id "" | ||
| 21 | index = 5 (0x5) | ||
| 22 | chip-id = 1 (0x1) | ||
| 23 | version = 704374636546 (0xa400000002) | ||
| 24 | device-id = 1217 (0x4c1) | ||
| 25 | x-config-reg-migration-enabled = true | ||
| 26 | bypass-iommu = false | ||
| 27 | bus: pnv-phb4-root.11 | ||
| 28 | type pnv-phb4-root | ||
| 29 | dev: pnv-phb4-root-port, id "" | ||
| 30 | (...) | ||
| 31 | dev: pnv-phb4, id "" | ||
| 32 | index = 0 (0x0) | ||
| 33 | chip-id = 1 (0x1) | ||
| 34 | version = 704374636546 (0xa400000002) | ||
| 35 | device-id = 1217 (0x4c1) | ||
| 36 | x-config-reg-migration-enabled = true | ||
| 37 | bypass-iommu = false | ||
| 38 | bus: pnv-phb4-root.6 | ||
| 39 | type pnv-phb4-root | ||
| 40 | dev: pnv-phb4-root-port, id "" | ||
| 41 | (..) | ||
| 42 | dev: pnv-phb4, id "" | ||
| 43 | index = 5 (0x5) | ||
| 44 | chip-id = 0 (0x0) | ||
| 45 | version = 704374636546 (0xa400000002) | ||
| 46 | device-id = 1217 (0x4c1) | ||
| 47 | x-config-reg-migration-enabled = true | ||
| 48 | bypass-iommu = false | ||
| 49 | bus: pnv-phb4-root.5 | ||
| 50 | type pnv-phb4-root | ||
| 51 | dev: pnv-phb4-root-port, id "" | ||
| 52 | (...) | ||
| 53 | dev: pnv-phb4, id "" | ||
| 54 | index = 0 (0x0) | ||
| 55 | chip-id = 0 (0x0) | ||
| 56 | version = 704374636546 (0xa400000002) | ||
| 57 | device-id = 1217 (0x4c1) | ||
| 58 | x-config-reg-migration-enabled = true | ||
| 59 | bypass-iommu = false | ||
| 60 | bus: pnv-phb4-root.0 | ||
| 61 | type pnv-phb4-root | ||
| 62 | dev: pnv-phb4-root-port, id "" | ||
| 63 | |||
| 64 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 65 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 66 | Message-Id: <20220110143346.455901-11-danielhb413@gmail.com> | ||
| 67 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 68 | --- | ||
| 69 | include/hw/pci-host/pnv_phb4.h | 2 +- | ||
| 70 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 71 | |||
| 72 | diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h | ||
| 73 | index XXXXXXX..XXXXXXX 100644 | ||
| 74 | --- a/include/hw/pci-host/pnv_phb4.h | ||
| 75 | +++ b/include/hw/pci-host/pnv_phb4.h | ||
| 76 | @@ -XXX,XX +XXX,XX @@ typedef struct PnvPhb4DMASpace { | ||
| 77 | /* | ||
| 78 | * PHB4 PCIe Root port | ||
| 79 | */ | ||
| 80 | -#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root-bus" | ||
| 81 | +#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root" | ||
| 82 | #define TYPE_PNV_PHB4_ROOT_PORT "pnv-phb4-root-port" | ||
| 83 | |||
| 84 | typedef struct PnvPHB4RootPort { | ||
| 85 | -- | ||
| 86 | 2.31.1 | ||
| 87 | |||
| 88 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | The logic inside pnv_pec_phb_offset() will be useful in the next patch | ||
| 4 | to determine the stack that should contain a PHB4 device. | ||
| 5 | |||
| 6 | Move the function to pnv_phb4.c and make it public since there's no | ||
| 7 | pnv_phb4_pec.h header. While we're at it, add 'stack_index' as a | ||
| 8 | parameter and make the function return 'phb-id' directly. And rename it | ||
| 9 | to pnv_phb4_pec_get_phb_id() to be even clearer about the function | ||
| 10 | intent. | ||
| 11 | |||
| 12 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 13 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 14 | Message-Id: <20220110143346.455901-3-danielhb413@gmail.com> | ||
| 15 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 16 | --- | ||
| 17 | include/hw/pci-host/pnv_phb4.h | 2 ++ | ||
| 18 | hw/pci-host/pnv_phb4.c | 17 +++++++++++++++++ | ||
| 19 | hw/pci-host/pnv_phb4_pec.c | 15 +-------------- | ||
| 20 | 3 files changed, 20 insertions(+), 14 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h | ||
| 23 | index XXXXXXX..XXXXXXX 100644 | ||
| 24 | --- a/include/hw/pci-host/pnv_phb4.h | ||
| 25 | +++ b/include/hw/pci-host/pnv_phb4.h | ||
| 26 | @@ -XXX,XX +XXX,XX @@ | ||
| 27 | #include "hw/ppc/xive.h" | ||
| 28 | #include "qom/object.h" | ||
| 29 | |||
| 30 | +typedef struct PnvPhb4PecState PnvPhb4PecState; | ||
| 31 | typedef struct PnvPhb4PecStack PnvPhb4PecStack; | ||
| 32 | typedef struct PnvPHB4 PnvPHB4; | ||
| 33 | typedef struct PnvChip PnvChip; | ||
| 34 | @@ -XXX,XX +XXX,XX @@ struct PnvPHB4 { | ||
| 35 | |||
| 36 | void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon); | ||
| 37 | void pnv_phb4_update_regions(PnvPhb4PecStack *stack); | ||
| 38 | +int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index); | ||
| 39 | extern const MemoryRegionOps pnv_phb4_xscom_ops; | ||
| 40 | |||
| 41 | /* | ||
| 42 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 43 | index XXXXXXX..XXXXXXX 100644 | ||
| 44 | --- a/hw/pci-host/pnv_phb4.c | ||
| 45 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 46 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo pnv_phb4_iommu_memory_region_info = { | ||
| 47 | .class_init = pnv_phb4_iommu_memory_region_class_init, | ||
| 48 | }; | ||
| 49 | |||
| 50 | +/* | ||
| 51 | + * Return the index/phb-id of a PHB4 that belongs to a | ||
| 52 | + * pec->stacks[stack_index] stack. | ||
| 53 | + */ | ||
| 54 | +int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index) | ||
| 55 | +{ | ||
| 56 | + PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 57 | + int index = pec->index; | ||
| 58 | + int offset = 0; | ||
| 59 | + | ||
| 60 | + while (index--) { | ||
| 61 | + offset += pecc->num_stacks[index]; | ||
| 62 | + } | ||
| 63 | + | ||
| 64 | + return offset + stack_index; | ||
| 65 | +} | ||
| 66 | + | ||
| 67 | /* | ||
| 68 | * MSI/MSIX memory region implementation. | ||
| 69 | * The handler handles both MSI and MSIX. | ||
| 70 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 71 | index XXXXXXX..XXXXXXX 100644 | ||
| 72 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 73 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 74 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_instance_init(Object *obj) | ||
| 75 | } | ||
| 76 | } | ||
| 77 | |||
| 78 | -static int pnv_pec_phb_offset(PnvPhb4PecState *pec) | ||
| 79 | -{ | ||
| 80 | - PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 81 | - int index = pec->index; | ||
| 82 | - int offset = 0; | ||
| 83 | - | ||
| 84 | - while (index--) { | ||
| 85 | - offset += pecc->num_stacks[index]; | ||
| 86 | - } | ||
| 87 | - | ||
| 88 | - return offset; | ||
| 89 | -} | ||
| 90 | - | ||
| 91 | static void pnv_pec_realize(DeviceState *dev, Error **errp) | ||
| 92 | { | ||
| 93 | PnvPhb4PecState *pec = PNV_PHB4_PEC(dev); | ||
| 94 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_realize(DeviceState *dev, Error **errp) | ||
| 95 | for (i = 0; i < pec->num_stacks; i++) { | ||
| 96 | PnvPhb4PecStack *stack = &pec->stacks[i]; | ||
| 97 | Object *stk_obj = OBJECT(stack); | ||
| 98 | - int phb_id = pnv_pec_phb_offset(pec) + i; | ||
| 99 | + int phb_id = pnv_phb4_pec_get_phb_id(pec, i); | ||
| 100 | |||
| 101 | object_property_set_int(stk_obj, "stack-no", i, &error_abort); | ||
| 102 | object_property_set_int(stk_obj, "phb-id", phb_id, &error_abort); | ||
| 103 | -- | ||
| 104 | 2.31.1 | ||
| 105 | |||
| 106 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | Relying on stack->phb to write the xscom DT of the PEC is something that | ||
| 4 | we won't be able to do with user creatable pnv-phb4 devices. | ||
| 5 | |||
| 6 | Hopefully, this can be done by using pnv_phb4_pec_get_phb_id(), which is | ||
| 7 | already used by pnv_pec_realize() to set the phb-id of the stack. Use | ||
| 8 | the same idea in pnv_pec_dt_xscom() to write ibm,phb-index without the | ||
| 9 | need to accessing stack->phb, since stack->phb is not granted to be != | ||
| 10 | NULL when user creatable phbs are introduced. | ||
| 11 | |||
| 12 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 13 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 14 | Message-Id: <20220110143346.455901-4-danielhb413@gmail.com> | ||
| 15 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 16 | --- | ||
| 17 | hw/pci-host/pnv_phb4_pec.c | 5 ++--- | ||
| 18 | 1 file changed, 2 insertions(+), 3 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 21 | index XXXXXXX..XXXXXXX 100644 | ||
| 22 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 23 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 24 | @@ -XXX,XX +XXX,XX @@ static int pnv_pec_dt_xscom(PnvXScomInterface *dev, void *fdt, | ||
| 25 | pecc->compat_size))); | ||
| 26 | |||
| 27 | for (i = 0; i < pec->num_stacks; i++) { | ||
| 28 | - PnvPhb4PecStack *stack = &pec->stacks[i]; | ||
| 29 | - PnvPHB4 *phb = &stack->phb; | ||
| 30 | + int phb_id = pnv_phb4_pec_get_phb_id(pec, i); | ||
| 31 | int stk_offset; | ||
| 32 | |||
| 33 | name = g_strdup_printf("stack@%x", i); | ||
| 34 | @@ -XXX,XX +XXX,XX @@ static int pnv_pec_dt_xscom(PnvXScomInterface *dev, void *fdt, | ||
| 35 | _FDT((fdt_setprop(fdt, stk_offset, "compatible", pecc->stk_compat, | ||
| 36 | pecc->stk_compat_size))); | ||
| 37 | _FDT((fdt_setprop_cell(fdt, stk_offset, "reg", i))); | ||
| 38 | - _FDT((fdt_setprop_cell(fdt, stk_offset, "ibm,phb-index", phb->phb_id))); | ||
| 39 | + _FDT((fdt_setprop_cell(fdt, stk_offset, "ibm,phb-index", phb_id))); | ||
| 40 | } | ||
| 41 | |||
| 42 | return 0; | ||
| 43 | -- | ||
| 44 | 2.31.1 | ||
| 45 | |||
| 46 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | Moving all phb4 properties setup to stk_realize() keeps this logic in | ||
| 4 | a single place instead of having it scattered between stk_realize() and | ||
| 5 | pec_realize(). | ||
| 6 | |||
| 7 | 'phb->index' can be retrieved using stack->stack_no and | ||
| 8 | pnv_phb4_pec_get_phb_id(), deprecating the use of 'phb-id' alias that | ||
| 9 | was being used for this purpose in pec_realize(). | ||
| 10 | |||
| 11 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 12 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 13 | Message-Id: <20220111131027.599784-2-danielhb413@gmail.com> | ||
| 14 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 15 | --- | ||
| 16 | hw/pci-host/pnv_phb4_pec.c | 6 +++--- | ||
| 17 | 1 file changed, 3 insertions(+), 3 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 20 | index XXXXXXX..XXXXXXX 100644 | ||
| 21 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 22 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 23 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_realize(DeviceState *dev, Error **errp) | ||
| 24 | for (i = 0; i < pec->num_stacks; i++) { | ||
| 25 | PnvPhb4PecStack *stack = &pec->stacks[i]; | ||
| 26 | Object *stk_obj = OBJECT(stack); | ||
| 27 | - int phb_id = pnv_phb4_pec_get_phb_id(pec, i); | ||
| 28 | |||
| 29 | object_property_set_int(stk_obj, "stack-no", i, &error_abort); | ||
| 30 | - object_property_set_int(stk_obj, "phb-id", phb_id, &error_abort); | ||
| 31 | object_property_set_link(stk_obj, "pec", OBJECT(pec), &error_abort); | ||
| 32 | if (!qdev_realize(DEVICE(stk_obj), NULL, errp)) { | ||
| 33 | return; | ||
| 34 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_instance_init(Object *obj) | ||
| 35 | PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(obj); | ||
| 36 | |||
| 37 | object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); | ||
| 38 | - object_property_add_alias(obj, "phb-id", OBJECT(&stack->phb), "index"); | ||
| 39 | } | ||
| 40 | |||
| 41 | static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 42 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 43 | PnvPhb4PecState *pec = stack->pec; | ||
| 44 | PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 45 | PnvChip *chip = pec->chip; | ||
| 46 | + int phb_id = pnv_phb4_pec_get_phb_id(pec, stack->stack_no); | ||
| 47 | uint32_t pec_nest_base; | ||
| 48 | uint32_t pec_pci_base; | ||
| 49 | char name[64]; | ||
| 50 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 51 | |||
| 52 | object_property_set_int(OBJECT(&stack->phb), "chip-id", pec->chip_id, | ||
| 53 | &error_fatal); | ||
| 54 | + object_property_set_int(OBJECT(&stack->phb), "index", phb_id, | ||
| 55 | + &error_fatal); | ||
| 56 | object_property_set_int(OBJECT(&stack->phb), "version", pecc->version, | ||
| 57 | &error_fatal); | ||
| 58 | object_property_set_link(OBJECT(&stack->phb), "stack", OBJECT(stack), | ||
| 59 | -- | ||
| 60 | 2.31.1 | ||
| 61 | |||
| 62 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | The 'stack->phb_regs_mr' PHB4 passthrough XSCOM initialization relies on | ||
| 4 | 'stack->phb' being not NULL. Moving 'stack->phb_regs_mr' region_init() | ||
| 5 | and add_subregion() to phb4_realize() time is a natural thing to do | ||
| 6 | since it's strictly PHB related. | ||
| 7 | |||
| 8 | The remaining XSCOM initialization is also related to 'stack->phb' but | ||
| 9 | in a different manner. For instance, 'stack->nest_regs_mr' | ||
| 10 | MemoryRegionOps, 'pnv_pec_stk_nest_xscom_ops', uses | ||
| 11 | pnv_pec_stk_nest_xscom_write() as a write callback. When trying to write | ||
| 12 | the PEC_NEST_STK_BAR_EN reg, pnv_pec_stk_update_map() is called. Inside | ||
| 13 | this function, pnv_phb4_update_regions() is called twice. This function | ||
| 14 | uses 'stack->phb' to manipulate memory regions of the phb. | ||
| 15 | |||
| 16 | This is not a problem now but, when enabling user creatable phb4s, a | ||
| 17 | stack that doesn't have an associated phb (i.e. stack->phb = NULL) it | ||
| 18 | will cause a SIGINT during boot in pnv_phb4_update_regions(). | ||
| 19 | |||
| 20 | All this can be avoided if all XSCOM realize is moved to phb4_realize(), | ||
| 21 | when we have certainty about the existence of 'stack->phb'. A lot of | ||
| 22 | code was moved from pnv_phb4_pec.c to pnv_phb4.c due to static constant | ||
| 23 | and variables being used but the cleaner logic is worth the trouble. | ||
| 24 | |||
| 25 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 26 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 27 | Message-Id: <20220111131027.599784-3-danielhb413@gmail.com> | ||
| 28 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 29 | --- | ||
| 30 | hw/pci-host/pnv_phb4.c | 304 +++++++++++++++++++++++++++++++++++++ | ||
| 31 | hw/pci-host/pnv_phb4_pec.c | 292 ----------------------------------- | ||
| 32 | 2 files changed, 304 insertions(+), 292 deletions(-) | ||
| 33 | |||
| 34 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 35 | index XXXXXXX..XXXXXXX 100644 | ||
| 36 | --- a/hw/pci-host/pnv_phb4.c | ||
| 37 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 38 | @@ -XXX,XX +XXX,XX @@ | ||
| 39 | qemu_log_mask(LOG_GUEST_ERROR, "phb4[%d:%d]: " fmt "\n", \ | ||
| 40 | (phb)->chip_id, (phb)->phb_id, ## __VA_ARGS__) | ||
| 41 | |||
| 42 | +#define phb_pec_error(pec, fmt, ...) \ | ||
| 43 | + qemu_log_mask(LOG_GUEST_ERROR, "phb4_pec[%d:%d]: " fmt "\n", \ | ||
| 44 | + (pec)->chip_id, (pec)->index, ## __VA_ARGS__) | ||
| 45 | + | ||
| 46 | /* | ||
| 47 | * QEMU version of the GETFIELD/SETFIELD macros | ||
| 48 | * | ||
| 49 | @@ -XXX,XX +XXX,XX @@ const MemoryRegionOps pnv_phb4_xscom_ops = { | ||
| 50 | .endianness = DEVICE_BIG_ENDIAN, | ||
| 51 | }; | ||
| 52 | |||
| 53 | +static uint64_t pnv_pec_stk_nest_xscom_read(void *opaque, hwaddr addr, | ||
| 54 | + unsigned size) | ||
| 55 | +{ | ||
| 56 | + PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 57 | + uint32_t reg = addr >> 3; | ||
| 58 | + | ||
| 59 | + /* TODO: add list of allowed registers and error out if not */ | ||
| 60 | + return stack->nest_regs[reg]; | ||
| 61 | +} | ||
| 62 | + | ||
| 63 | +static void pnv_pec_stk_update_map(PnvPhb4PecStack *stack) | ||
| 64 | +{ | ||
| 65 | + PnvPhb4PecState *pec = stack->pec; | ||
| 66 | + MemoryRegion *sysmem = get_system_memory(); | ||
| 67 | + uint64_t bar_en = stack->nest_regs[PEC_NEST_STK_BAR_EN]; | ||
| 68 | + uint64_t bar, mask, size; | ||
| 69 | + char name[64]; | ||
| 70 | + | ||
| 71 | + /* | ||
| 72 | + * NOTE: This will really not work well if those are remapped | ||
| 73 | + * after the PHB has created its sub regions. We could do better | ||
| 74 | + * if we had a way to resize regions but we don't really care | ||
| 75 | + * that much in practice as the stuff below really only happens | ||
| 76 | + * once early during boot | ||
| 77 | + */ | ||
| 78 | + | ||
| 79 | + /* Handle unmaps */ | ||
| 80 | + if (memory_region_is_mapped(&stack->mmbar0) && | ||
| 81 | + !(bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { | ||
| 82 | + memory_region_del_subregion(sysmem, &stack->mmbar0); | ||
| 83 | + } | ||
| 84 | + if (memory_region_is_mapped(&stack->mmbar1) && | ||
| 85 | + !(bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 86 | + memory_region_del_subregion(sysmem, &stack->mmbar1); | ||
| 87 | + } | ||
| 88 | + if (memory_region_is_mapped(&stack->phbbar) && | ||
| 89 | + !(bar_en & PEC_NEST_STK_BAR_EN_PHB)) { | ||
| 90 | + memory_region_del_subregion(sysmem, &stack->phbbar); | ||
| 91 | + } | ||
| 92 | + if (memory_region_is_mapped(&stack->intbar) && | ||
| 93 | + !(bar_en & PEC_NEST_STK_BAR_EN_INT)) { | ||
| 94 | + memory_region_del_subregion(sysmem, &stack->intbar); | ||
| 95 | + } | ||
| 96 | + | ||
| 97 | + /* Update PHB */ | ||
| 98 | + pnv_phb4_update_regions(stack); | ||
| 99 | + | ||
| 100 | + /* Handle maps */ | ||
| 101 | + if (!memory_region_is_mapped(&stack->mmbar0) && | ||
| 102 | + (bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { | ||
| 103 | + bar = stack->nest_regs[PEC_NEST_STK_MMIO_BAR0] >> 8; | ||
| 104 | + mask = stack->nest_regs[PEC_NEST_STK_MMIO_BAR0_MASK]; | ||
| 105 | + size = ((~mask) >> 8) + 1; | ||
| 106 | + snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio0", | ||
| 107 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 108 | + memory_region_init(&stack->mmbar0, OBJECT(stack), name, size); | ||
| 109 | + memory_region_add_subregion(sysmem, bar, &stack->mmbar0); | ||
| 110 | + stack->mmio0_base = bar; | ||
| 111 | + stack->mmio0_size = size; | ||
| 112 | + } | ||
| 113 | + if (!memory_region_is_mapped(&stack->mmbar1) && | ||
| 114 | + (bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 115 | + bar = stack->nest_regs[PEC_NEST_STK_MMIO_BAR1] >> 8; | ||
| 116 | + mask = stack->nest_regs[PEC_NEST_STK_MMIO_BAR1_MASK]; | ||
| 117 | + size = ((~mask) >> 8) + 1; | ||
| 118 | + snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio1", | ||
| 119 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 120 | + memory_region_init(&stack->mmbar1, OBJECT(stack), name, size); | ||
| 121 | + memory_region_add_subregion(sysmem, bar, &stack->mmbar1); | ||
| 122 | + stack->mmio1_base = bar; | ||
| 123 | + stack->mmio1_size = size; | ||
| 124 | + } | ||
| 125 | + if (!memory_region_is_mapped(&stack->phbbar) && | ||
| 126 | + (bar_en & PEC_NEST_STK_BAR_EN_PHB)) { | ||
| 127 | + bar = stack->nest_regs[PEC_NEST_STK_PHB_REGS_BAR] >> 8; | ||
| 128 | + size = PNV_PHB4_NUM_REGS << 3; | ||
| 129 | + snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-phb", | ||
| 130 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 131 | + memory_region_init(&stack->phbbar, OBJECT(stack), name, size); | ||
| 132 | + memory_region_add_subregion(sysmem, bar, &stack->phbbar); | ||
| 133 | + } | ||
| 134 | + if (!memory_region_is_mapped(&stack->intbar) && | ||
| 135 | + (bar_en & PEC_NEST_STK_BAR_EN_INT)) { | ||
| 136 | + bar = stack->nest_regs[PEC_NEST_STK_INT_BAR] >> 8; | ||
| 137 | + size = PNV_PHB4_MAX_INTs << 16; | ||
| 138 | + snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-int", | ||
| 139 | + stack->pec->chip_id, stack->pec->index, stack->stack_no); | ||
| 140 | + memory_region_init(&stack->intbar, OBJECT(stack), name, size); | ||
| 141 | + memory_region_add_subregion(sysmem, bar, &stack->intbar); | ||
| 142 | + } | ||
| 143 | + | ||
| 144 | + /* Update PHB */ | ||
| 145 | + pnv_phb4_update_regions(stack); | ||
| 146 | +} | ||
| 147 | + | ||
| 148 | +static void pnv_pec_stk_nest_xscom_write(void *opaque, hwaddr addr, | ||
| 149 | + uint64_t val, unsigned size) | ||
| 150 | +{ | ||
| 151 | + PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 152 | + PnvPhb4PecState *pec = stack->pec; | ||
| 153 | + uint32_t reg = addr >> 3; | ||
| 154 | + | ||
| 155 | + switch (reg) { | ||
| 156 | + case PEC_NEST_STK_PCI_NEST_FIR: | ||
| 157 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] = val; | ||
| 158 | + break; | ||
| 159 | + case PEC_NEST_STK_PCI_NEST_FIR_CLR: | ||
| 160 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] &= val; | ||
| 161 | + break; | ||
| 162 | + case PEC_NEST_STK_PCI_NEST_FIR_SET: | ||
| 163 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] |= val; | ||
| 164 | + break; | ||
| 165 | + case PEC_NEST_STK_PCI_NEST_FIR_MSK: | ||
| 166 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] = val; | ||
| 167 | + break; | ||
| 168 | + case PEC_NEST_STK_PCI_NEST_FIR_MSKC: | ||
| 169 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] &= val; | ||
| 170 | + break; | ||
| 171 | + case PEC_NEST_STK_PCI_NEST_FIR_MSKS: | ||
| 172 | + stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] |= val; | ||
| 173 | + break; | ||
| 174 | + case PEC_NEST_STK_PCI_NEST_FIR_ACT0: | ||
| 175 | + case PEC_NEST_STK_PCI_NEST_FIR_ACT1: | ||
| 176 | + stack->nest_regs[reg] = val; | ||
| 177 | + break; | ||
| 178 | + case PEC_NEST_STK_PCI_NEST_FIR_WOF: | ||
| 179 | + stack->nest_regs[reg] = 0; | ||
| 180 | + break; | ||
| 181 | + case PEC_NEST_STK_ERR_REPORT_0: | ||
| 182 | + case PEC_NEST_STK_ERR_REPORT_1: | ||
| 183 | + case PEC_NEST_STK_PBCQ_GNRL_STATUS: | ||
| 184 | + /* Flag error ? */ | ||
| 185 | + break; | ||
| 186 | + case PEC_NEST_STK_PBCQ_MODE: | ||
| 187 | + stack->nest_regs[reg] = val & 0xff00000000000000ull; | ||
| 188 | + break; | ||
| 189 | + case PEC_NEST_STK_MMIO_BAR0: | ||
| 190 | + case PEC_NEST_STK_MMIO_BAR0_MASK: | ||
| 191 | + case PEC_NEST_STK_MMIO_BAR1: | ||
| 192 | + case PEC_NEST_STK_MMIO_BAR1_MASK: | ||
| 193 | + if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & | ||
| 194 | + (PEC_NEST_STK_BAR_EN_MMIO0 | | ||
| 195 | + PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 196 | + phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 197 | + } | ||
| 198 | + stack->nest_regs[reg] = val & 0xffffffffff000000ull; | ||
| 199 | + break; | ||
| 200 | + case PEC_NEST_STK_PHB_REGS_BAR: | ||
| 201 | + if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_PHB) { | ||
| 202 | + phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 203 | + } | ||
| 204 | + stack->nest_regs[reg] = val & 0xffffffffffc00000ull; | ||
| 205 | + break; | ||
| 206 | + case PEC_NEST_STK_INT_BAR: | ||
| 207 | + if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_INT) { | ||
| 208 | + phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 209 | + } | ||
| 210 | + stack->nest_regs[reg] = val & 0xfffffff000000000ull; | ||
| 211 | + break; | ||
| 212 | + case PEC_NEST_STK_BAR_EN: | ||
| 213 | + stack->nest_regs[reg] = val & 0xf000000000000000ull; | ||
| 214 | + pnv_pec_stk_update_map(stack); | ||
| 215 | + break; | ||
| 216 | + case PEC_NEST_STK_DATA_FRZ_TYPE: | ||
| 217 | + case PEC_NEST_STK_PBCQ_TUN_BAR: | ||
| 218 | + /* Not used for now */ | ||
| 219 | + stack->nest_regs[reg] = val; | ||
| 220 | + break; | ||
| 221 | + default: | ||
| 222 | + qemu_log_mask(LOG_UNIMP, "phb4_pec: nest_xscom_write 0x%"HWADDR_PRIx | ||
| 223 | + "=%"PRIx64"\n", addr, val); | ||
| 224 | + } | ||
| 225 | +} | ||
| 226 | + | ||
| 227 | +static const MemoryRegionOps pnv_pec_stk_nest_xscom_ops = { | ||
| 228 | + .read = pnv_pec_stk_nest_xscom_read, | ||
| 229 | + .write = pnv_pec_stk_nest_xscom_write, | ||
| 230 | + .valid.min_access_size = 8, | ||
| 231 | + .valid.max_access_size = 8, | ||
| 232 | + .impl.min_access_size = 8, | ||
| 233 | + .impl.max_access_size = 8, | ||
| 234 | + .endianness = DEVICE_BIG_ENDIAN, | ||
| 235 | +}; | ||
| 236 | + | ||
| 237 | +static uint64_t pnv_pec_stk_pci_xscom_read(void *opaque, hwaddr addr, | ||
| 238 | + unsigned size) | ||
| 239 | +{ | ||
| 240 | + PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 241 | + uint32_t reg = addr >> 3; | ||
| 242 | + | ||
| 243 | + /* TODO: add list of allowed registers and error out if not */ | ||
| 244 | + return stack->pci_regs[reg]; | ||
| 245 | +} | ||
| 246 | + | ||
| 247 | +static void pnv_pec_stk_pci_xscom_write(void *opaque, hwaddr addr, | ||
| 248 | + uint64_t val, unsigned size) | ||
| 249 | +{ | ||
| 250 | + PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 251 | + uint32_t reg = addr >> 3; | ||
| 252 | + | ||
| 253 | + switch (reg) { | ||
| 254 | + case PEC_PCI_STK_PCI_FIR: | ||
| 255 | + stack->nest_regs[reg] = val; | ||
| 256 | + break; | ||
| 257 | + case PEC_PCI_STK_PCI_FIR_CLR: | ||
| 258 | + stack->nest_regs[PEC_PCI_STK_PCI_FIR] &= val; | ||
| 259 | + break; | ||
| 260 | + case PEC_PCI_STK_PCI_FIR_SET: | ||
| 261 | + stack->nest_regs[PEC_PCI_STK_PCI_FIR] |= val; | ||
| 262 | + break; | ||
| 263 | + case PEC_PCI_STK_PCI_FIR_MSK: | ||
| 264 | + stack->nest_regs[reg] = val; | ||
| 265 | + break; | ||
| 266 | + case PEC_PCI_STK_PCI_FIR_MSKC: | ||
| 267 | + stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] &= val; | ||
| 268 | + break; | ||
| 269 | + case PEC_PCI_STK_PCI_FIR_MSKS: | ||
| 270 | + stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] |= val; | ||
| 271 | + break; | ||
| 272 | + case PEC_PCI_STK_PCI_FIR_ACT0: | ||
| 273 | + case PEC_PCI_STK_PCI_FIR_ACT1: | ||
| 274 | + stack->nest_regs[reg] = val; | ||
| 275 | + break; | ||
| 276 | + case PEC_PCI_STK_PCI_FIR_WOF: | ||
| 277 | + stack->nest_regs[reg] = 0; | ||
| 278 | + break; | ||
| 279 | + case PEC_PCI_STK_ETU_RESET: | ||
| 280 | + stack->nest_regs[reg] = val & 0x8000000000000000ull; | ||
| 281 | + /* TODO: Implement reset */ | ||
| 282 | + break; | ||
| 283 | + case PEC_PCI_STK_PBAIB_ERR_REPORT: | ||
| 284 | + break; | ||
| 285 | + case PEC_PCI_STK_PBAIB_TX_CMD_CRED: | ||
| 286 | + case PEC_PCI_STK_PBAIB_TX_DAT_CRED: | ||
| 287 | + stack->nest_regs[reg] = val; | ||
| 288 | + break; | ||
| 289 | + default: | ||
| 290 | + qemu_log_mask(LOG_UNIMP, "phb4_pec_stk: pci_xscom_write 0x%"HWADDR_PRIx | ||
| 291 | + "=%"PRIx64"\n", addr, val); | ||
| 292 | + } | ||
| 293 | +} | ||
| 294 | + | ||
| 295 | +static const MemoryRegionOps pnv_pec_stk_pci_xscom_ops = { | ||
| 296 | + .read = pnv_pec_stk_pci_xscom_read, | ||
| 297 | + .write = pnv_pec_stk_pci_xscom_write, | ||
| 298 | + .valid.min_access_size = 8, | ||
| 299 | + .valid.max_access_size = 8, | ||
| 300 | + .impl.min_access_size = 8, | ||
| 301 | + .impl.max_access_size = 8, | ||
| 302 | + .endianness = DEVICE_BIG_ENDIAN, | ||
| 303 | +}; | ||
| 304 | + | ||
| 305 | static int pnv_phb4_map_irq(PCIDevice *pci_dev, int irq_num) | ||
| 306 | { | ||
| 307 | /* Check that out properly ... */ | ||
| 308 | @@ -XXX,XX +XXX,XX @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn) | ||
| 309 | return &ds->dma_as; | ||
| 310 | } | ||
| 311 | |||
| 312 | +static void pnv_phb4_xscom_realize(PnvPHB4 *phb) | ||
| 313 | +{ | ||
| 314 | + PnvPhb4PecStack *stack = phb->stack; | ||
| 315 | + PnvPhb4PecState *pec = stack->pec; | ||
| 316 | + PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 317 | + uint32_t pec_nest_base; | ||
| 318 | + uint32_t pec_pci_base; | ||
| 319 | + char name[64]; | ||
| 320 | + | ||
| 321 | + assert(pec); | ||
| 322 | + | ||
| 323 | + /* Initialize the XSCOM regions for the stack registers */ | ||
| 324 | + snprintf(name, sizeof(name), "xscom-pec-%d.%d-nest-stack-%d", | ||
| 325 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 326 | + pnv_xscom_region_init(&stack->nest_regs_mr, OBJECT(stack), | ||
| 327 | + &pnv_pec_stk_nest_xscom_ops, stack, name, | ||
| 328 | + PHB4_PEC_NEST_STK_REGS_COUNT); | ||
| 329 | + | ||
| 330 | + snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d", | ||
| 331 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 332 | + pnv_xscom_region_init(&stack->pci_regs_mr, OBJECT(stack), | ||
| 333 | + &pnv_pec_stk_pci_xscom_ops, stack, name, | ||
| 334 | + PHB4_PEC_PCI_STK_REGS_COUNT); | ||
| 335 | + | ||
| 336 | + /* PHB pass-through */ | ||
| 337 | + snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d-phb", | ||
| 338 | + pec->chip_id, pec->index, stack->stack_no); | ||
| 339 | + pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(phb), | ||
| 340 | + &pnv_phb4_xscom_ops, phb, name, 0x40); | ||
| 341 | + | ||
| 342 | + pec_nest_base = pecc->xscom_nest_base(pec); | ||
| 343 | + pec_pci_base = pecc->xscom_pci_base(pec); | ||
| 344 | + | ||
| 345 | + /* Populate the XSCOM address space. */ | ||
| 346 | + pnv_xscom_add_subregion(pec->chip, | ||
| 347 | + pec_nest_base + 0x40 * (stack->stack_no + 1), | ||
| 348 | + &stack->nest_regs_mr); | ||
| 349 | + pnv_xscom_add_subregion(pec->chip, | ||
| 350 | + pec_pci_base + 0x40 * (stack->stack_no + 1), | ||
| 351 | + &stack->pci_regs_mr); | ||
| 352 | + pnv_xscom_add_subregion(pec->chip, | ||
| 353 | + pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 + | ||
| 354 | + 0x40 * stack->stack_no, | ||
| 355 | + &stack->phb_regs_mr); | ||
| 356 | +} | ||
| 357 | + | ||
| 358 | static void pnv_phb4_instance_init(Object *obj) | ||
| 359 | { | ||
| 360 | PnvPHB4 *phb = PNV_PHB4(obj); | ||
| 361 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp) | ||
| 362 | pnv_phb4_update_xsrc(phb); | ||
| 363 | |||
| 364 | phb->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc, xsrc->nr_irqs); | ||
| 365 | + | ||
| 366 | + pnv_phb4_xscom_realize(phb); | ||
| 367 | } | ||
| 368 | |||
| 369 | static const char *pnv_phb4_root_bus_path(PCIHostState *host_bridge, | ||
| 370 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 371 | index XXXXXXX..XXXXXXX 100644 | ||
| 372 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 373 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 374 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps pnv_pec_pci_xscom_ops = { | ||
| 375 | .endianness = DEVICE_BIG_ENDIAN, | ||
| 376 | }; | ||
| 377 | |||
| 378 | -static uint64_t pnv_pec_stk_nest_xscom_read(void *opaque, hwaddr addr, | ||
| 379 | - unsigned size) | ||
| 380 | -{ | ||
| 381 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 382 | - uint32_t reg = addr >> 3; | ||
| 383 | - | ||
| 384 | - /* TODO: add list of allowed registers and error out if not */ | ||
| 385 | - return stack->nest_regs[reg]; | ||
| 386 | -} | ||
| 387 | - | ||
| 388 | -static void pnv_pec_stk_update_map(PnvPhb4PecStack *stack) | ||
| 389 | -{ | ||
| 390 | - PnvPhb4PecState *pec = stack->pec; | ||
| 391 | - MemoryRegion *sysmem = get_system_memory(); | ||
| 392 | - uint64_t bar_en = stack->nest_regs[PEC_NEST_STK_BAR_EN]; | ||
| 393 | - uint64_t bar, mask, size; | ||
| 394 | - char name[64]; | ||
| 395 | - | ||
| 396 | - /* | ||
| 397 | - * NOTE: This will really not work well if those are remapped | ||
| 398 | - * after the PHB has created its sub regions. We could do better | ||
| 399 | - * if we had a way to resize regions but we don't really care | ||
| 400 | - * that much in practice as the stuff below really only happens | ||
| 401 | - * once early during boot | ||
| 402 | - */ | ||
| 403 | - | ||
| 404 | - /* Handle unmaps */ | ||
| 405 | - if (memory_region_is_mapped(&stack->mmbar0) && | ||
| 406 | - !(bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { | ||
| 407 | - memory_region_del_subregion(sysmem, &stack->mmbar0); | ||
| 408 | - } | ||
| 409 | - if (memory_region_is_mapped(&stack->mmbar1) && | ||
| 410 | - !(bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 411 | - memory_region_del_subregion(sysmem, &stack->mmbar1); | ||
| 412 | - } | ||
| 413 | - if (memory_region_is_mapped(&stack->phbbar) && | ||
| 414 | - !(bar_en & PEC_NEST_STK_BAR_EN_PHB)) { | ||
| 415 | - memory_region_del_subregion(sysmem, &stack->phbbar); | ||
| 416 | - } | ||
| 417 | - if (memory_region_is_mapped(&stack->intbar) && | ||
| 418 | - !(bar_en & PEC_NEST_STK_BAR_EN_INT)) { | ||
| 419 | - memory_region_del_subregion(sysmem, &stack->intbar); | ||
| 420 | - } | ||
| 421 | - | ||
| 422 | - /* Update PHB */ | ||
| 423 | - pnv_phb4_update_regions(stack); | ||
| 424 | - | ||
| 425 | - /* Handle maps */ | ||
| 426 | - if (!memory_region_is_mapped(&stack->mmbar0) && | ||
| 427 | - (bar_en & PEC_NEST_STK_BAR_EN_MMIO0)) { | ||
| 428 | - bar = stack->nest_regs[PEC_NEST_STK_MMIO_BAR0] >> 8; | ||
| 429 | - mask = stack->nest_regs[PEC_NEST_STK_MMIO_BAR0_MASK]; | ||
| 430 | - size = ((~mask) >> 8) + 1; | ||
| 431 | - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio0", | ||
| 432 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 433 | - memory_region_init(&stack->mmbar0, OBJECT(stack), name, size); | ||
| 434 | - memory_region_add_subregion(sysmem, bar, &stack->mmbar0); | ||
| 435 | - stack->mmio0_base = bar; | ||
| 436 | - stack->mmio0_size = size; | ||
| 437 | - } | ||
| 438 | - if (!memory_region_is_mapped(&stack->mmbar1) && | ||
| 439 | - (bar_en & PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 440 | - bar = stack->nest_regs[PEC_NEST_STK_MMIO_BAR1] >> 8; | ||
| 441 | - mask = stack->nest_regs[PEC_NEST_STK_MMIO_BAR1_MASK]; | ||
| 442 | - size = ((~mask) >> 8) + 1; | ||
| 443 | - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-mmio1", | ||
| 444 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 445 | - memory_region_init(&stack->mmbar1, OBJECT(stack), name, size); | ||
| 446 | - memory_region_add_subregion(sysmem, bar, &stack->mmbar1); | ||
| 447 | - stack->mmio1_base = bar; | ||
| 448 | - stack->mmio1_size = size; | ||
| 449 | - } | ||
| 450 | - if (!memory_region_is_mapped(&stack->phbbar) && | ||
| 451 | - (bar_en & PEC_NEST_STK_BAR_EN_PHB)) { | ||
| 452 | - bar = stack->nest_regs[PEC_NEST_STK_PHB_REGS_BAR] >> 8; | ||
| 453 | - size = PNV_PHB4_NUM_REGS << 3; | ||
| 454 | - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-phb", | ||
| 455 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 456 | - memory_region_init(&stack->phbbar, OBJECT(stack), name, size); | ||
| 457 | - memory_region_add_subregion(sysmem, bar, &stack->phbbar); | ||
| 458 | - } | ||
| 459 | - if (!memory_region_is_mapped(&stack->intbar) && | ||
| 460 | - (bar_en & PEC_NEST_STK_BAR_EN_INT)) { | ||
| 461 | - bar = stack->nest_regs[PEC_NEST_STK_INT_BAR] >> 8; | ||
| 462 | - size = PNV_PHB4_MAX_INTs << 16; | ||
| 463 | - snprintf(name, sizeof(name), "pec-%d.%d-stack-%d-int", | ||
| 464 | - stack->pec->chip_id, stack->pec->index, stack->stack_no); | ||
| 465 | - memory_region_init(&stack->intbar, OBJECT(stack), name, size); | ||
| 466 | - memory_region_add_subregion(sysmem, bar, &stack->intbar); | ||
| 467 | - } | ||
| 468 | - | ||
| 469 | - /* Update PHB */ | ||
| 470 | - pnv_phb4_update_regions(stack); | ||
| 471 | -} | ||
| 472 | - | ||
| 473 | -static void pnv_pec_stk_nest_xscom_write(void *opaque, hwaddr addr, | ||
| 474 | - uint64_t val, unsigned size) | ||
| 475 | -{ | ||
| 476 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 477 | - PnvPhb4PecState *pec = stack->pec; | ||
| 478 | - uint32_t reg = addr >> 3; | ||
| 479 | - | ||
| 480 | - switch (reg) { | ||
| 481 | - case PEC_NEST_STK_PCI_NEST_FIR: | ||
| 482 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] = val; | ||
| 483 | - break; | ||
| 484 | - case PEC_NEST_STK_PCI_NEST_FIR_CLR: | ||
| 485 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] &= val; | ||
| 486 | - break; | ||
| 487 | - case PEC_NEST_STK_PCI_NEST_FIR_SET: | ||
| 488 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR] |= val; | ||
| 489 | - break; | ||
| 490 | - case PEC_NEST_STK_PCI_NEST_FIR_MSK: | ||
| 491 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] = val; | ||
| 492 | - break; | ||
| 493 | - case PEC_NEST_STK_PCI_NEST_FIR_MSKC: | ||
| 494 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] &= val; | ||
| 495 | - break; | ||
| 496 | - case PEC_NEST_STK_PCI_NEST_FIR_MSKS: | ||
| 497 | - stack->nest_regs[PEC_NEST_STK_PCI_NEST_FIR_MSK] |= val; | ||
| 498 | - break; | ||
| 499 | - case PEC_NEST_STK_PCI_NEST_FIR_ACT0: | ||
| 500 | - case PEC_NEST_STK_PCI_NEST_FIR_ACT1: | ||
| 501 | - stack->nest_regs[reg] = val; | ||
| 502 | - break; | ||
| 503 | - case PEC_NEST_STK_PCI_NEST_FIR_WOF: | ||
| 504 | - stack->nest_regs[reg] = 0; | ||
| 505 | - break; | ||
| 506 | - case PEC_NEST_STK_ERR_REPORT_0: | ||
| 507 | - case PEC_NEST_STK_ERR_REPORT_1: | ||
| 508 | - case PEC_NEST_STK_PBCQ_GNRL_STATUS: | ||
| 509 | - /* Flag error ? */ | ||
| 510 | - break; | ||
| 511 | - case PEC_NEST_STK_PBCQ_MODE: | ||
| 512 | - stack->nest_regs[reg] = val & 0xff00000000000000ull; | ||
| 513 | - break; | ||
| 514 | - case PEC_NEST_STK_MMIO_BAR0: | ||
| 515 | - case PEC_NEST_STK_MMIO_BAR0_MASK: | ||
| 516 | - case PEC_NEST_STK_MMIO_BAR1: | ||
| 517 | - case PEC_NEST_STK_MMIO_BAR1_MASK: | ||
| 518 | - if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & | ||
| 519 | - (PEC_NEST_STK_BAR_EN_MMIO0 | | ||
| 520 | - PEC_NEST_STK_BAR_EN_MMIO1)) { | ||
| 521 | - phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 522 | - } | ||
| 523 | - stack->nest_regs[reg] = val & 0xffffffffff000000ull; | ||
| 524 | - break; | ||
| 525 | - case PEC_NEST_STK_PHB_REGS_BAR: | ||
| 526 | - if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_PHB) { | ||
| 527 | - phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 528 | - } | ||
| 529 | - stack->nest_regs[reg] = val & 0xffffffffffc00000ull; | ||
| 530 | - break; | ||
| 531 | - case PEC_NEST_STK_INT_BAR: | ||
| 532 | - if (stack->nest_regs[PEC_NEST_STK_BAR_EN] & PEC_NEST_STK_BAR_EN_INT) { | ||
| 533 | - phb_pec_error(pec, "Changing enabled BAR unsupported\n"); | ||
| 534 | - } | ||
| 535 | - stack->nest_regs[reg] = val & 0xfffffff000000000ull; | ||
| 536 | - break; | ||
| 537 | - case PEC_NEST_STK_BAR_EN: | ||
| 538 | - stack->nest_regs[reg] = val & 0xf000000000000000ull; | ||
| 539 | - pnv_pec_stk_update_map(stack); | ||
| 540 | - break; | ||
| 541 | - case PEC_NEST_STK_DATA_FRZ_TYPE: | ||
| 542 | - case PEC_NEST_STK_PBCQ_TUN_BAR: | ||
| 543 | - /* Not used for now */ | ||
| 544 | - stack->nest_regs[reg] = val; | ||
| 545 | - break; | ||
| 546 | - default: | ||
| 547 | - qemu_log_mask(LOG_UNIMP, "phb4_pec: nest_xscom_write 0x%"HWADDR_PRIx | ||
| 548 | - "=%"PRIx64"\n", addr, val); | ||
| 549 | - } | ||
| 550 | -} | ||
| 551 | - | ||
| 552 | -static const MemoryRegionOps pnv_pec_stk_nest_xscom_ops = { | ||
| 553 | - .read = pnv_pec_stk_nest_xscom_read, | ||
| 554 | - .write = pnv_pec_stk_nest_xscom_write, | ||
| 555 | - .valid.min_access_size = 8, | ||
| 556 | - .valid.max_access_size = 8, | ||
| 557 | - .impl.min_access_size = 8, | ||
| 558 | - .impl.max_access_size = 8, | ||
| 559 | - .endianness = DEVICE_BIG_ENDIAN, | ||
| 560 | -}; | ||
| 561 | - | ||
| 562 | -static uint64_t pnv_pec_stk_pci_xscom_read(void *opaque, hwaddr addr, | ||
| 563 | - unsigned size) | ||
| 564 | -{ | ||
| 565 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 566 | - uint32_t reg = addr >> 3; | ||
| 567 | - | ||
| 568 | - /* TODO: add list of allowed registers and error out if not */ | ||
| 569 | - return stack->pci_regs[reg]; | ||
| 570 | -} | ||
| 571 | - | ||
| 572 | -static void pnv_pec_stk_pci_xscom_write(void *opaque, hwaddr addr, | ||
| 573 | - uint64_t val, unsigned size) | ||
| 574 | -{ | ||
| 575 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(opaque); | ||
| 576 | - uint32_t reg = addr >> 3; | ||
| 577 | - | ||
| 578 | - switch (reg) { | ||
| 579 | - case PEC_PCI_STK_PCI_FIR: | ||
| 580 | - stack->nest_regs[reg] = val; | ||
| 581 | - break; | ||
| 582 | - case PEC_PCI_STK_PCI_FIR_CLR: | ||
| 583 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR] &= val; | ||
| 584 | - break; | ||
| 585 | - case PEC_PCI_STK_PCI_FIR_SET: | ||
| 586 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR] |= val; | ||
| 587 | - break; | ||
| 588 | - case PEC_PCI_STK_PCI_FIR_MSK: | ||
| 589 | - stack->nest_regs[reg] = val; | ||
| 590 | - break; | ||
| 591 | - case PEC_PCI_STK_PCI_FIR_MSKC: | ||
| 592 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] &= val; | ||
| 593 | - break; | ||
| 594 | - case PEC_PCI_STK_PCI_FIR_MSKS: | ||
| 595 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] |= val; | ||
| 596 | - break; | ||
| 597 | - case PEC_PCI_STK_PCI_FIR_ACT0: | ||
| 598 | - case PEC_PCI_STK_PCI_FIR_ACT1: | ||
| 599 | - stack->nest_regs[reg] = val; | ||
| 600 | - break; | ||
| 601 | - case PEC_PCI_STK_PCI_FIR_WOF: | ||
| 602 | - stack->nest_regs[reg] = 0; | ||
| 603 | - break; | ||
| 604 | - case PEC_PCI_STK_ETU_RESET: | ||
| 605 | - stack->nest_regs[reg] = val & 0x8000000000000000ull; | ||
| 606 | - /* TODO: Implement reset */ | ||
| 607 | - break; | ||
| 608 | - case PEC_PCI_STK_PBAIB_ERR_REPORT: | ||
| 609 | - break; | ||
| 610 | - case PEC_PCI_STK_PBAIB_TX_CMD_CRED: | ||
| 611 | - case PEC_PCI_STK_PBAIB_TX_DAT_CRED: | ||
| 612 | - stack->nest_regs[reg] = val; | ||
| 613 | - break; | ||
| 614 | - default: | ||
| 615 | - qemu_log_mask(LOG_UNIMP, "phb4_pec_stk: pci_xscom_write 0x%"HWADDR_PRIx | ||
| 616 | - "=%"PRIx64"\n", addr, val); | ||
| 617 | - } | ||
| 618 | -} | ||
| 619 | - | ||
| 620 | -static const MemoryRegionOps pnv_pec_stk_pci_xscom_ops = { | ||
| 621 | - .read = pnv_pec_stk_pci_xscom_read, | ||
| 622 | - .write = pnv_pec_stk_pci_xscom_write, | ||
| 623 | - .valid.min_access_size = 8, | ||
| 624 | - .valid.max_access_size = 8, | ||
| 625 | - .impl.min_access_size = 8, | ||
| 626 | - .impl.max_access_size = 8, | ||
| 627 | - .endianness = DEVICE_BIG_ENDIAN, | ||
| 628 | -}; | ||
| 629 | - | ||
| 630 | static void pnv_pec_instance_init(Object *obj) | ||
| 631 | { | ||
| 632 | PnvPhb4PecState *pec = PNV_PHB4_PEC(obj); | ||
| 633 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 634 | PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(dev); | ||
| 635 | PnvPhb4PecState *pec = stack->pec; | ||
| 636 | PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 637 | - PnvChip *chip = pec->chip; | ||
| 638 | int phb_id = pnv_phb4_pec_get_phb_id(pec, stack->stack_no); | ||
| 639 | - uint32_t pec_nest_base; | ||
| 640 | - uint32_t pec_pci_base; | ||
| 641 | - char name[64]; | ||
| 642 | - | ||
| 643 | - assert(pec); | ||
| 644 | - | ||
| 645 | - /* Initialize the XSCOM regions for the stack registers */ | ||
| 646 | - snprintf(name, sizeof(name), "xscom-pec-%d.%d-nest-stack-%d", | ||
| 647 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 648 | - pnv_xscom_region_init(&stack->nest_regs_mr, OBJECT(stack), | ||
| 649 | - &pnv_pec_stk_nest_xscom_ops, stack, name, | ||
| 650 | - PHB4_PEC_NEST_STK_REGS_COUNT); | ||
| 651 | - | ||
| 652 | - snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d", | ||
| 653 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 654 | - pnv_xscom_region_init(&stack->pci_regs_mr, OBJECT(stack), | ||
| 655 | - &pnv_pec_stk_pci_xscom_ops, stack, name, | ||
| 656 | - PHB4_PEC_PCI_STK_REGS_COUNT); | ||
| 657 | - | ||
| 658 | - /* PHB pass-through */ | ||
| 659 | - snprintf(name, sizeof(name), "xscom-pec-%d.%d-pci-stack-%d-phb", | ||
| 660 | - pec->chip_id, pec->index, stack->stack_no); | ||
| 661 | - pnv_xscom_region_init(&stack->phb_regs_mr, OBJECT(&stack->phb), | ||
| 662 | - &pnv_phb4_xscom_ops, &stack->phb, name, 0x40); | ||
| 663 | |||
| 664 | object_property_set_int(OBJECT(&stack->phb), "chip-id", pec->chip_id, | ||
| 665 | &error_fatal); | ||
| 666 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 667 | if (!sysbus_realize(SYS_BUS_DEVICE(&stack->phb), errp)) { | ||
| 668 | return; | ||
| 669 | } | ||
| 670 | - | ||
| 671 | - pec_nest_base = pecc->xscom_nest_base(pec); | ||
| 672 | - pec_pci_base = pecc->xscom_pci_base(pec); | ||
| 673 | - | ||
| 674 | - /* Populate the XSCOM address space. */ | ||
| 675 | - pnv_xscom_add_subregion(chip, | ||
| 676 | - pec_nest_base + 0x40 * (stack->stack_no + 1), | ||
| 677 | - &stack->nest_regs_mr); | ||
| 678 | - pnv_xscom_add_subregion(chip, | ||
| 679 | - pec_pci_base + 0x40 * (stack->stack_no + 1), | ||
| 680 | - &stack->pci_regs_mr); | ||
| 681 | - pnv_xscom_add_subregion(chip, | ||
| 682 | - pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 + | ||
| 683 | - 0x40 * stack->stack_no, | ||
| 684 | - &stack->phb_regs_mr); | ||
| 685 | } | ||
| 686 | |||
| 687 | static Property pnv_pec_stk_properties[] = { | ||
| 688 | -- | ||
| 689 | 2.31.1 | ||
| 690 | |||
| 691 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | At this moment, stack->phb is the plain PnvPHB4 device itself instead of | ||
| 4 | a pointer to the device. This will present a problem when adding user | ||
| 5 | creatable devices because we can't deal with this struct and the | ||
| 6 | realize() callback from the user creatable device. | ||
| 7 | |||
| 8 | We can't get rid of this attribute, similar to what we did when enabling | ||
| 9 | pnv-phb3 user creatable devices, because pnv_phb4_update_regions() needs | ||
| 10 | to access stack->phb to do its job. This function is called twice in | ||
| 11 | pnv_pec_stk_update_map(), which is one of the nested xscom write | ||
| 12 | callbacks (via pnv_pec_stk_nest_xscom_write()). In fact, | ||
| 13 | pnv_pec_stk_update_map() code comment is explicit about how the order of | ||
| 14 | the unmap/map operations relates with the PHB subregions. | ||
| 15 | |||
| 16 | All of this indicates that this code is tied together in a way that we | ||
| 17 | either go on a crusade, featuring lots of refactories and redesign and | ||
| 18 | considerable pain, to decouple stack and phb mapping, or we allow stack | ||
| 19 | update_map operations to access the associated PHB as it is today even | ||
| 20 | after introducing pnv-phb4 user devices. | ||
| 21 | |||
| 22 | This patch chooses the latter. Instead of getting rid of stack->phb, | ||
| 23 | turn it into a PHB pointer. This will allow us to assign an user created | ||
| 24 | PHB to an existing stack later. In this process, | ||
| 25 | pnv_pec_stk_instance_init() is removed because stack->phb is being | ||
| 26 | initialized in stk_realize() instead. | ||
| 27 | |||
| 28 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 29 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 30 | Message-Id: <20220111131027.599784-4-danielhb413@gmail.com> | ||
| 31 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 32 | --- | ||
| 33 | include/hw/pci-host/pnv_phb4.h | 7 +++++-- | ||
| 34 | hw/pci-host/pnv_phb4.c | 2 +- | ||
| 35 | hw/pci-host/pnv_phb4_pec.c | 20 +++++++------------- | ||
| 36 | 3 files changed, 13 insertions(+), 16 deletions(-) | ||
| 37 | |||
| 38 | diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h | ||
| 39 | index XXXXXXX..XXXXXXX 100644 | ||
| 40 | --- a/include/hw/pci-host/pnv_phb4.h | ||
| 41 | +++ b/include/hw/pci-host/pnv_phb4.h | ||
| 42 | @@ -XXX,XX +XXX,XX @@ struct PnvPhb4PecStack { | ||
| 43 | /* The owner PEC */ | ||
| 44 | PnvPhb4PecState *pec; | ||
| 45 | |||
| 46 | - /* The actual PHB */ | ||
| 47 | - PnvPHB4 phb; | ||
| 48 | + /* | ||
| 49 | + * PHB4 pointer. pnv_phb4_update_regions() needs to access | ||
| 50 | + * the PHB4 via a PnvPhb4PecStack pointer. | ||
| 51 | + */ | ||
| 52 | + PnvPHB4 *phb; | ||
| 53 | }; | ||
| 54 | |||
| 55 | struct PnvPhb4PecState { | ||
| 56 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 57 | index XXXXXXX..XXXXXXX 100644 | ||
| 58 | --- a/hw/pci-host/pnv_phb4.c | ||
| 59 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 60 | @@ -XXX,XX +XXX,XX @@ type_init(pnv_phb4_register_types); | ||
| 61 | |||
| 62 | void pnv_phb4_update_regions(PnvPhb4PecStack *stack) | ||
| 63 | { | ||
| 64 | - PnvPHB4 *phb = &stack->phb; | ||
| 65 | + PnvPHB4 *phb = stack->phb; | ||
| 66 | |||
| 67 | /* Unmap first always */ | ||
| 68 | if (memory_region_is_mapped(&phb->mr_regs)) { | ||
| 69 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 70 | index XXXXXXX..XXXXXXX 100644 | ||
| 71 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 72 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 73 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo pnv_pec_type_info = { | ||
| 74 | } | ||
| 75 | }; | ||
| 76 | |||
| 77 | -static void pnv_pec_stk_instance_init(Object *obj) | ||
| 78 | -{ | ||
| 79 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(obj); | ||
| 80 | - | ||
| 81 | - object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); | ||
| 82 | -} | ||
| 83 | - | ||
| 84 | static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 85 | { | ||
| 86 | PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(dev); | ||
| 87 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 88 | PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 89 | int phb_id = pnv_phb4_pec_get_phb_id(pec, stack->stack_no); | ||
| 90 | |||
| 91 | - object_property_set_int(OBJECT(&stack->phb), "chip-id", pec->chip_id, | ||
| 92 | + stack->phb = PNV_PHB4(qdev_new(TYPE_PNV_PHB4)); | ||
| 93 | + | ||
| 94 | + object_property_set_int(OBJECT(stack->phb), "chip-id", pec->chip_id, | ||
| 95 | &error_fatal); | ||
| 96 | - object_property_set_int(OBJECT(&stack->phb), "index", phb_id, | ||
| 97 | + object_property_set_int(OBJECT(stack->phb), "index", phb_id, | ||
| 98 | &error_fatal); | ||
| 99 | - object_property_set_int(OBJECT(&stack->phb), "version", pecc->version, | ||
| 100 | + object_property_set_int(OBJECT(stack->phb), "version", pecc->version, | ||
| 101 | &error_fatal); | ||
| 102 | - object_property_set_link(OBJECT(&stack->phb), "stack", OBJECT(stack), | ||
| 103 | + object_property_set_link(OBJECT(stack->phb), "stack", OBJECT(stack), | ||
| 104 | &error_abort); | ||
| 105 | - if (!sysbus_realize(SYS_BUS_DEVICE(&stack->phb), errp)) { | ||
| 106 | + if (!sysbus_realize(SYS_BUS_DEVICE(stack->phb), errp)) { | ||
| 107 | return; | ||
| 108 | } | ||
| 109 | } | ||
| 110 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo pnv_pec_stk_type_info = { | ||
| 111 | .name = TYPE_PNV_PHB4_PEC_STACK, | ||
| 112 | .parent = TYPE_DEVICE, | ||
| 113 | .instance_size = sizeof(PnvPhb4PecStack), | ||
| 114 | - .instance_init = pnv_pec_stk_instance_init, | ||
| 115 | .class_init = pnv_pec_stk_class_init, | ||
| 116 | .interfaces = (InterfaceInfo[]) { | ||
| 117 | { TYPE_PNV_XSCOM_INTERFACE }, | ||
| 118 | -- | ||
| 119 | 2.31.1 | ||
| 120 | |||
| 121 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | This patch introduces pnv-phb4 user creatable devices that are created | ||
| 4 | in a similar manner as pnv-phb3 devices, allowing the user to interact | ||
| 5 | with the PHBs directly instead of creating PCI Express Controllers that | ||
| 6 | will create a certain amount of PHBs per controller index. | ||
| 7 | |||
| 8 | We accomplish this by doing the following: | ||
| 9 | |||
| 10 | - add a pnv_phb4_get_stack() helper to retrieve which stack an user | ||
| 11 | created phb4 would occupy; | ||
| 12 | |||
| 13 | - when dealing with an user created pnv-phb4 (detected by checking if | ||
| 14 | phb->stack is NULL at the start of phb4_realize()), retrieve its stack | ||
| 15 | and initialize its properties as done in stk_realize(); | ||
| 16 | |||
| 17 | - use 'defaults_enabled()' in stk_realize() to avoid creating and | ||
| 18 | initializing a 'stack->phb' qdev that might be overwritten by an user | ||
| 19 | created pnv-phb4 device. This process is wrapped into a new helper | ||
| 20 | called pnv_pec_stk_default_phb_realize(). | ||
| 21 | |||
| 22 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 23 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 24 | Message-Id: <20220111131027.599784-5-danielhb413@gmail.com> | ||
| 25 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 26 | --- | ||
| 27 | hw/pci-host/pnv_phb4.c | 74 ++++++++++++++++++++++++++++++++++++-- | ||
| 28 | hw/pci-host/pnv_phb4_pec.c | 17 +++++++-- | ||
| 29 | hw/ppc/pnv.c | 2 ++ | ||
| 30 | 3 files changed, 89 insertions(+), 4 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 33 | index XXXXXXX..XXXXXXX 100644 | ||
| 34 | --- a/hw/pci-host/pnv_phb4.c | ||
| 35 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 36 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_instance_init(Object *obj) | ||
| 37 | object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); | ||
| 38 | } | ||
| 39 | |||
| 40 | +static PnvPhb4PecStack *pnv_phb4_get_stack(PnvChip *chip, PnvPHB4 *phb, | ||
| 41 | + Error **errp) | ||
| 42 | +{ | ||
| 43 | + Pnv9Chip *chip9 = PNV9_CHIP(chip); | ||
| 44 | + int chip_id = phb->chip_id; | ||
| 45 | + int index = phb->phb_id; | ||
| 46 | + int i, j; | ||
| 47 | + | ||
| 48 | + for (i = 0; i < chip->num_pecs; i++) { | ||
| 49 | + /* | ||
| 50 | + * For each PEC, check the amount of stacks it supports | ||
| 51 | + * and see if the given phb4 index matches a stack. | ||
| 52 | + */ | ||
| 53 | + PnvPhb4PecState *pec = &chip9->pecs[i]; | ||
| 54 | + | ||
| 55 | + for (j = 0; j < pec->num_stacks; j++) { | ||
| 56 | + if (index == pnv_phb4_pec_get_phb_id(pec, j)) { | ||
| 57 | + return &pec->stacks[j]; | ||
| 58 | + } | ||
| 59 | + } | ||
| 60 | + } | ||
| 61 | + | ||
| 62 | + error_setg(errp, | ||
| 63 | + "pnv-phb4 chip-id %d index %d didn't match any existing PEC", | ||
| 64 | + chip_id, index); | ||
| 65 | + | ||
| 66 | + return NULL; | ||
| 67 | +} | ||
| 68 | + | ||
| 69 | static void pnv_phb4_realize(DeviceState *dev, Error **errp) | ||
| 70 | { | ||
| 71 | PnvPHB4 *phb = PNV_PHB4(dev); | ||
| 72 | PCIHostState *pci = PCI_HOST_BRIDGE(dev); | ||
| 73 | XiveSource *xsrc = &phb->xsrc; | ||
| 74 | + Error *local_err = NULL; | ||
| 75 | int nr_irqs; | ||
| 76 | char name[32]; | ||
| 77 | |||
| 78 | - assert(phb->stack); | ||
| 79 | + /* User created PHB */ | ||
| 80 | + if (!phb->stack) { | ||
| 81 | + PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); | ||
| 82 | + PnvChip *chip = pnv_get_chip(pnv, phb->chip_id); | ||
| 83 | + PnvPhb4PecClass *pecc; | ||
| 84 | + BusState *s; | ||
| 85 | + | ||
| 86 | + if (!chip) { | ||
| 87 | + error_setg(errp, "invalid chip id: %d", phb->chip_id); | ||
| 88 | + return; | ||
| 89 | + } | ||
| 90 | + | ||
| 91 | + phb->stack = pnv_phb4_get_stack(chip, phb, &local_err); | ||
| 92 | + if (local_err) { | ||
| 93 | + error_propagate(errp, local_err); | ||
| 94 | + return; | ||
| 95 | + } | ||
| 96 | + | ||
| 97 | + /* All other phb properties but 'version' are already set */ | ||
| 98 | + pecc = PNV_PHB4_PEC_GET_CLASS(phb->stack->pec); | ||
| 99 | + object_property_set_int(OBJECT(phb), "version", pecc->version, | ||
| 100 | + &error_fatal); | ||
| 101 | + | ||
| 102 | + /* | ||
| 103 | + * Assign stack->phb since pnv_phb4_update_regions() uses it | ||
| 104 | + * to access the phb. | ||
| 105 | + */ | ||
| 106 | + phb->stack->phb = phb; | ||
| 107 | + | ||
| 108 | + /* | ||
| 109 | + * Reparent user created devices to the chip to build | ||
| 110 | + * correctly the device tree. | ||
| 111 | + */ | ||
| 112 | + pnv_chip_parent_fixup(chip, OBJECT(phb), phb->phb_id); | ||
| 113 | + | ||
| 114 | + s = qdev_get_parent_bus(DEVICE(chip)); | ||
| 115 | + if (!qdev_set_parent_bus(DEVICE(phb), s, &local_err)) { | ||
| 116 | + error_propagate(errp, local_err); | ||
| 117 | + return; | ||
| 118 | + } | ||
| 119 | + } | ||
| 120 | |||
| 121 | /* Set the "big_phb" flag */ | ||
| 122 | phb->big_phb = phb->phb_id == 0 || phb->phb_id == 3; | ||
| 123 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_class_init(ObjectClass *klass, void *data) | ||
| 124 | dc->realize = pnv_phb4_realize; | ||
| 125 | device_class_set_props(dc, pnv_phb4_properties); | ||
| 126 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); | ||
| 127 | - dc->user_creatable = false; | ||
| 128 | + dc->user_creatable = true; | ||
| 129 | |||
| 130 | xfc->notify = pnv_phb4_xive_notify; | ||
| 131 | } | ||
| 132 | diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c | ||
| 133 | index XXXXXXX..XXXXXXX 100644 | ||
| 134 | --- a/hw/pci-host/pnv_phb4_pec.c | ||
| 135 | +++ b/hw/pci-host/pnv_phb4_pec.c | ||
| 136 | @@ -XXX,XX +XXX,XX @@ | ||
| 137 | #include "hw/pci/pci_bus.h" | ||
| 138 | #include "hw/ppc/pnv.h" | ||
| 139 | #include "hw/qdev-properties.h" | ||
| 140 | +#include "sysemu/sysemu.h" | ||
| 141 | |||
| 142 | #include <libfdt.h> | ||
| 143 | |||
| 144 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo pnv_pec_type_info = { | ||
| 145 | } | ||
| 146 | }; | ||
| 147 | |||
| 148 | -static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 149 | +static void pnv_pec_stk_default_phb_realize(PnvPhb4PecStack *stack, | ||
| 150 | + Error **errp) | ||
| 151 | { | ||
| 152 | - PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(dev); | ||
| 153 | PnvPhb4PecState *pec = stack->pec; | ||
| 154 | PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec); | ||
| 155 | int phb_id = pnv_phb4_pec_get_phb_id(pec, stack->stack_no); | ||
| 156 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 157 | &error_fatal); | ||
| 158 | object_property_set_link(OBJECT(stack->phb), "stack", OBJECT(stack), | ||
| 159 | &error_abort); | ||
| 160 | + | ||
| 161 | if (!sysbus_realize(SYS_BUS_DEVICE(stack->phb), errp)) { | ||
| 162 | return; | ||
| 163 | } | ||
| 164 | } | ||
| 165 | |||
| 166 | +static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) | ||
| 167 | +{ | ||
| 168 | + PnvPhb4PecStack *stack = PNV_PHB4_PEC_STACK(dev); | ||
| 169 | + | ||
| 170 | + if (!defaults_enabled()) { | ||
| 171 | + return; | ||
| 172 | + } | ||
| 173 | + | ||
| 174 | + pnv_pec_stk_default_phb_realize(stack, errp); | ||
| 175 | +} | ||
| 176 | + | ||
| 177 | static Property pnv_pec_stk_properties[] = { | ||
| 178 | DEFINE_PROP_UINT32("stack-no", PnvPhb4PecStack, stack_no, 0), | ||
| 179 | DEFINE_PROP_LINK("pec", PnvPhb4PecStack, pec, TYPE_PNV_PHB4_PEC, | ||
| 180 | diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c | ||
| 181 | index XXXXXXX..XXXXXXX 100644 | ||
| 182 | --- a/hw/ppc/pnv.c | ||
| 183 | +++ b/hw/ppc/pnv.c | ||
| 184 | @@ -XXX,XX +XXX,XX @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data) | ||
| 185 | pmc->compat = compat; | ||
| 186 | pmc->compat_size = sizeof(compat); | ||
| 187 | pmc->dt_power_mgt = pnv_dt_power_mgt; | ||
| 188 | + | ||
| 189 | + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB4); | ||
| 190 | } | ||
| 191 | |||
| 192 | static void pnv_machine_power10_class_init(ObjectClass *oc, void *data) | ||
| 193 | -- | ||
| 194 | 2.31.1 | ||
| 195 | |||
| 196 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | Its only callers are inside pnv_phb4.c. | ||
| 4 | |||
| 5 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
| 6 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 7 | Message-Id: <20220111131027.599784-6-danielhb413@gmail.com> | ||
| 8 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 9 | --- | ||
| 10 | include/hw/pci-host/pnv_phb4.h | 1 - | ||
| 11 | hw/pci-host/pnv_phb4.c | 52 +++++++++++++++++----------------- | ||
| 12 | 2 files changed, 26 insertions(+), 27 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h | ||
| 15 | index XXXXXXX..XXXXXXX 100644 | ||
| 16 | --- a/include/hw/pci-host/pnv_phb4.h | ||
| 17 | +++ b/include/hw/pci-host/pnv_phb4.h | ||
| 18 | @@ -XXX,XX +XXX,XX @@ struct PnvPHB4 { | ||
| 19 | }; | ||
| 20 | |||
| 21 | void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon); | ||
| 22 | -void pnv_phb4_update_regions(PnvPhb4PecStack *stack); | ||
| 23 | int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index); | ||
| 24 | extern const MemoryRegionOps pnv_phb4_xscom_ops; | ||
| 25 | |||
| 26 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 27 | index XXXXXXX..XXXXXXX 100644 | ||
| 28 | --- a/hw/pci-host/pnv_phb4.c | ||
| 29 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 30 | @@ -XXX,XX +XXX,XX @@ static uint64_t pnv_pec_stk_nest_xscom_read(void *opaque, hwaddr addr, | ||
| 31 | return stack->nest_regs[reg]; | ||
| 32 | } | ||
| 33 | |||
| 34 | +static void pnv_phb4_update_regions(PnvPhb4PecStack *stack) | ||
| 35 | +{ | ||
| 36 | + PnvPHB4 *phb = stack->phb; | ||
| 37 | + | ||
| 38 | + /* Unmap first always */ | ||
| 39 | + if (memory_region_is_mapped(&phb->mr_regs)) { | ||
| 40 | + memory_region_del_subregion(&stack->phbbar, &phb->mr_regs); | ||
| 41 | + } | ||
| 42 | + if (memory_region_is_mapped(&phb->xsrc.esb_mmio)) { | ||
| 43 | + memory_region_del_subregion(&stack->intbar, &phb->xsrc.esb_mmio); | ||
| 44 | + } | ||
| 45 | + | ||
| 46 | + /* Map registers if enabled */ | ||
| 47 | + if (memory_region_is_mapped(&stack->phbbar)) { | ||
| 48 | + memory_region_add_subregion(&stack->phbbar, 0, &phb->mr_regs); | ||
| 49 | + } | ||
| 50 | + | ||
| 51 | + /* Map ESB if enabled */ | ||
| 52 | + if (memory_region_is_mapped(&stack->intbar)) { | ||
| 53 | + memory_region_add_subregion(&stack->intbar, 0, &phb->xsrc.esb_mmio); | ||
| 54 | + } | ||
| 55 | + | ||
| 56 | + /* Check/update m32 */ | ||
| 57 | + pnv_phb4_check_all_mbt(phb); | ||
| 58 | +} | ||
| 59 | + | ||
| 60 | static void pnv_pec_stk_update_map(PnvPhb4PecStack *stack) | ||
| 61 | { | ||
| 62 | PnvPhb4PecState *pec = stack->pec; | ||
| 63 | @@ -XXX,XX +XXX,XX @@ static void pnv_phb4_register_types(void) | ||
| 64 | |||
| 65 | type_init(pnv_phb4_register_types); | ||
| 66 | |||
| 67 | -void pnv_phb4_update_regions(PnvPhb4PecStack *stack) | ||
| 68 | -{ | ||
| 69 | - PnvPHB4 *phb = stack->phb; | ||
| 70 | - | ||
| 71 | - /* Unmap first always */ | ||
| 72 | - if (memory_region_is_mapped(&phb->mr_regs)) { | ||
| 73 | - memory_region_del_subregion(&stack->phbbar, &phb->mr_regs); | ||
| 74 | - } | ||
| 75 | - if (memory_region_is_mapped(&phb->xsrc.esb_mmio)) { | ||
| 76 | - memory_region_del_subregion(&stack->intbar, &phb->xsrc.esb_mmio); | ||
| 77 | - } | ||
| 78 | - | ||
| 79 | - /* Map registers if enabled */ | ||
| 80 | - if (memory_region_is_mapped(&stack->phbbar)) { | ||
| 81 | - memory_region_add_subregion(&stack->phbbar, 0, &phb->mr_regs); | ||
| 82 | - } | ||
| 83 | - | ||
| 84 | - /* Map ESB if enabled */ | ||
| 85 | - if (memory_region_is_mapped(&stack->intbar)) { | ||
| 86 | - memory_region_add_subregion(&stack->intbar, 0, &phb->xsrc.esb_mmio); | ||
| 87 | - } | ||
| 88 | - | ||
| 89 | - /* Check/update m32 */ | ||
| 90 | - pnv_phb4_check_all_mbt(phb); | ||
| 91 | -} | ||
| 92 | - | ||
| 93 | void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon) | ||
| 94 | { | ||
| 95 | uint32_t offset = phb->regs[PHB_INT_NOTIFY_INDEX >> 3]; | ||
| 96 | -- | ||
| 97 | 2.31.1 | ||
| 98 | |||
| 99 | diff view generated by jsdifflib |
Deleted patch | |||
|---|---|---|---|
| 1 | From: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 2 | 1 | ||
| 3 | pnv_pec_stk_pci_xscom_write() is pnv_pec_stk_pci_xscom_ops write | ||
| 4 | callback. It writes values into regs in the stack->nest_regs[] array. | ||
| 5 | The pnv_pec_stk_pci_xscom_read read callback, on the other hand, returns | ||
| 6 | values of the stack->pci_regs[]. In fact, at this moment, the only use | ||
| 7 | of stack->pci_regs[] is in pnv_pec_stk_pci_xscom_read(). There's no code | ||
| 8 | that is written anything in stack->pci_regs[], which is suspicious. | ||
| 9 | |||
| 10 | Considering that stack->nest_regs[] is widely used by the nested | ||
| 11 | MemoryOps pnv_pec_stk_nest_xscom_ops, in both read and write callbacks, | ||
| 12 | the conclusion is that we're writing the wrong array in | ||
| 13 | pnv_pec_stk_pci_xscom_write(). This function should write stack->pci_regs[] | ||
| 14 | instead. | ||
| 15 | |||
| 16 | Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> | ||
| 17 | Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> | ||
| 18 | Message-Id: <20220111200132.633896-2-danielhb413@gmail.com> | ||
| 19 | Signed-off-by: Cédric Le Goater <clg@kaod.org> | ||
| 20 | --- | ||
| 21 | hw/pci-host/pnv_phb4.c | 20 ++++++++++---------- | ||
| 22 | 1 file changed, 10 insertions(+), 10 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c | ||
| 25 | index XXXXXXX..XXXXXXX 100644 | ||
| 26 | --- a/hw/pci-host/pnv_phb4.c | ||
| 27 | +++ b/hw/pci-host/pnv_phb4.c | ||
| 28 | @@ -XXX,XX +XXX,XX @@ static void pnv_pec_stk_pci_xscom_write(void *opaque, hwaddr addr, | ||
| 29 | |||
| 30 | switch (reg) { | ||
| 31 | case PEC_PCI_STK_PCI_FIR: | ||
| 32 | - stack->nest_regs[reg] = val; | ||
| 33 | + stack->pci_regs[reg] = val; | ||
| 34 | break; | ||
| 35 | case PEC_PCI_STK_PCI_FIR_CLR: | ||
| 36 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR] &= val; | ||
| 37 | + stack->pci_regs[PEC_PCI_STK_PCI_FIR] &= val; | ||
| 38 | break; | ||
| 39 | case PEC_PCI_STK_PCI_FIR_SET: | ||
| 40 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR] |= val; | ||
| 41 | + stack->pci_regs[PEC_PCI_STK_PCI_FIR] |= val; | ||
| 42 | break; | ||
| 43 | case PEC_PCI_STK_PCI_FIR_MSK: | ||
| 44 | - stack->nest_regs[reg] = val; | ||
| 45 | + stack->pci_regs[reg] = val; | ||
| 46 | break; | ||
| 47 | case PEC_PCI_STK_PCI_FIR_MSKC: | ||
| 48 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] &= val; | ||
| 49 | + stack->pci_regs[PEC_PCI_STK_PCI_FIR_MSK] &= val; | ||
| 50 | break; | ||
| 51 | case PEC_PCI_STK_PCI_FIR_MSKS: | ||
| 52 | - stack->nest_regs[PEC_PCI_STK_PCI_FIR_MSK] |= val; | ||
| 53 | + stack->pci_regs[PEC_PCI_STK_PCI_FIR_MSK] |= val; | ||
| 54 | break; | ||
| 55 | case PEC_PCI_STK_PCI_FIR_ACT0: | ||
| 56 | case PEC_PCI_STK_PCI_FIR_ACT1: | ||
| 57 | - stack->nest_regs[reg] = val; | ||
| 58 | + stack->pci_regs[reg] = val; | ||
| 59 | break; | ||
| 60 | case PEC_PCI_STK_PCI_FIR_WOF: | ||
| 61 | - stack->nest_regs[reg] = 0; | ||
| 62 | + stack->pci_regs[reg] = 0; | ||
| 63 | break; | ||
| 64 | case PEC_PCI_STK_ETU_RESET: | ||
| 65 | - stack->nest_regs[reg] = val & 0x8000000000000000ull; | ||
| 66 | + stack->pci_regs[reg] = val & 0x8000000000000000ull; | ||
| 67 | /* TODO: Implement reset */ | ||
| 68 | break; | ||
| 69 | case PEC_PCI_STK_PBAIB_ERR_REPORT: | ||
| 70 | break; | ||
| 71 | case PEC_PCI_STK_PBAIB_TX_CMD_CRED: | ||
| 72 | case PEC_PCI_STK_PBAIB_TX_DAT_CRED: | ||
| 73 | - stack->nest_regs[reg] = val; | ||
| 74 | + stack->pci_regs[reg] = val; | ||
| 75 | break; | ||
| 76 | default: | ||
| 77 | qemu_log_mask(LOG_UNIMP, "phb4_pec_stk: pci_xscom_write 0x%"HWADDR_PRIx | ||
| 78 | -- | ||
| 79 | 2.31.1 | ||
| 80 | |||
| 81 | diff view generated by jsdifflib |