These are the follow up cleanups from the RFC that touch the top level
of powerpc_excp. Applies on top of the 1/n series.

Patches 1-2: extract software TLB debug into a function;

Patch 3: group the "unimplemented" messages;

Patches 4-8: move ILE code into a separate function and put ILE and
             AIL under a BookS conditional;

Patch 9: the powerpc_excp_legacy wrapper. Subsequent patch series will
         be dedicated to splitting one "cpu family" each. I have 40x
         ready and I'm working on 60x.

RFC v1:
https://lists.nongnu.org/archive/html/qemu-ppc/2021-06/msg00026.html

RFC v2:
https://lists.nongnu.org/archive/html/qemu-ppc/2021-12/msg00542.html

Cleanups 1/n:
https://mail.gnu.org/archive/html/qemu-ppc/2021-12/msg00696.html

Fabiano Rosas (9):
  target/ppc: powerpc_excp: Extract software TLB logging into a function
  target/ppc: powerpc_excp: Keep 60x soft MMU logs active
  target/ppc: powerpc_excp: Group unimplemented exceptions
  target/ppc: Add HV support to ppc_interrupts_little_endian
  target/ppc: Use ppc_interrupts_little_endian in powerpc_excp
  target/ppc: powerpc_excp: Preserve MSR_LE bit
  target/ppc: powerpc_excp: Move ILE setting into a function
  target/ppc: powerpc_excp: Move AIL under a Book3s block
  target/ppc: Introduce a wrapper for powerpc_excp

 target/ppc/arch_dump.c   |   2 +-
 target/ppc/cpu.h         |  21 ++--
 target/ppc/excp_helper.c | 218 ++++++++++++++-------------------------
 3 files changed, 92 insertions(+), 149 deletions(-)

-- 
2.33.1