On 12/28/21 20:37, Daniel Henrique Barboza wrote:
> The root port 'chassis' and 'slot' attributes are being set in the
> realize() callback of phb3_root_port and phb4_root_port.
>
> Remove the unneeded 'chassis' and 'slot' setting from
> pnv_phb_attach_root_port().
You should simply resend a modified version of the patch introducing
pnv_phb_attach_root_port() I think.
Thanks,
C.
>
> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> ---
> hw/ppc/pnv.c | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 1bd84d20c1..605296fab5 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1222,12 +1222,10 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
> }
>
> /* Attach a root port */
> -static void pnv_phb_attach_root_port(PCIHostState *pci, int id, const char *name)
> +static void pnv_phb_attach_root_port(PCIHostState *pci, const char *name)
> {
> PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name);
>
> - qdev_prop_set_uint8(&root->qdev, "chassis", id);
> - qdev_prop_set_uint16(&root->qdev, "slot", id);
> pci_realize_and_unref(root, pci->bus, &error_fatal);
> }
>
> @@ -1326,7 +1324,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> - pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), phb->phb_id,
> + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
> TYPE_PNV_PHB3_ROOT_PORT);
> }
> }
> @@ -1506,7 +1504,7 @@ static void pnv_chip_power9_pec_realize(PnvChip *chip, Error **errp)
> for (j = 0; j < pec->num_stacks; j++) {
> PnvPHB4 *phb = &pec->stacks[j].phb;
>
> - pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), phb->phb_id,
> + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
> TYPE_PNV_PHB4_ROOT_PORT);
> }
> }
> @@ -1754,7 +1752,7 @@ static void pnv_chip_power10_phb_realize(PnvChip *chip, Error **errp)
> for (j = 0; j < pec->num_stacks; j++) {
> PnvPHB4 *phb = &pec->stacks[j].phb;
>
> - pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), phb->phb_id,
> + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
> TYPE_PNV_PHB5_ROOT_PORT);
> }
> }
>