hw/sd/sd.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
From: Frank Chang <frank.chang@sifive.com>
In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
is not set to 1 correclty when the assigned SD image size is larger
than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
incorrectly. CCS bit should be set to 1 if we are using SDHC.
Also, as there's no power up emulation in SPI-mode.
The OCR register: Card power up status bit bit (busy) should also
be set to 1 when reset. (busy bit is set to LOW if the card has not
finished the power up routine.)
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Jim Shu <jim.shu@sifive.com>
---
hw/sd/sd.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bb5dbff68c..9169208dbc 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -294,6 +294,18 @@ static void sd_set_ocr(SDState *sd)
{
/* All voltages OK */
sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
+
+ if (sd->spi) {
+ /*
+ * We don't need to emulate power up sequence in SPI-mode.
+ * Thus, the card's power up status bit should be set to 1 when reset.
+ * The card's capacity status bit should also be set if SD card size
+ * is larger than 2GB for SDHC support.
+ */
+ sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1);
+ sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY,
+ sd->size > SDSC_MAX_CAPACITY);
+ }
}
static void sd_ocr_powerup(void *opaque)
@@ -560,6 +572,7 @@ static void sd_reset(DeviceState *dev)
sd->state = sd_idle_state;
sd->rca = 0x0000;
+ sd->size = size;
sd_set_ocr(sd);
sd_set_scr(sd);
sd_set_cid(sd);
@@ -574,7 +587,6 @@ static void sd_reset(DeviceState *dev)
memset(sd->function_group, 0, sizeof(sd->function_group));
sd->erase_start = INVALID_ADDRESS;
sd->erase_end = INVALID_ADDRESS;
- sd->size = size;
sd->blk_len = 0x200;
sd->pwd_len = 0;
sd->expecting_acmd = false;
--
2.31.1
On 12/28/21 02:50, frank.chang@sifive.com wrote: > From: Frank Chang <frank.chang@sifive.com> > > In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit > is not set to 1 correclty when the assigned SD image size is larger > than 2GB (SDHC). This will cause the SD card to be indentified as SDSC > incorrectly. CCS bit should be set to 1 if we are using SDHC. > > Also, as there's no power up emulation in SPI-mode. > The OCR register: Card power up status bit bit (busy) should also > be set to 1 when reset. (busy bit is set to LOW if the card has not > finished the power up routine.) > > Signed-off-by: Frank Chang <frank.chang@sifive.com> > Reviewed-by: Jim Shu <jim.shu@sifive.com> > --- > hw/sd/sd.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index bb5dbff68c..9169208dbc 100644 > --- a/hw/sd/sd.c > +++ b/hw/sd/sd.c > @@ -294,6 +294,18 @@ static void sd_set_ocr(SDState *sd) > { > /* All voltages OK */ > sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK; > + > + if (sd->spi) { > + /* > + * We don't need to emulate power up sequence in SPI-mode. > + * Thus, the card's power up status bit should be set to 1 when reset. > + * The card's capacity status bit should also be set if SD card size > + * is larger than 2GB for SDHC support. > + */ > + sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_POWER_UP, 1); > + sd->ocr = FIELD_DP32(sd->ocr, OCR, CARD_CAPACITY, > + sd->size > SDSC_MAX_CAPACITY); Simply call sd_ocr_powerup() instead, so we get the trace event. Calling sd_ocr_powerup(): Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > + } > } > > static void sd_ocr_powerup(void *opaque) > @@ -560,6 +572,7 @@ static void sd_reset(DeviceState *dev) > > sd->state = sd_idle_state; > sd->rca = 0x0000; > + sd->size = size; > sd_set_ocr(sd); > sd_set_scr(sd); > sd_set_cid(sd); > @@ -574,7 +587,6 @@ static void sd_reset(DeviceState *dev) > memset(sd->function_group, 0, sizeof(sd->function_group)); > sd->erase_start = INVALID_ADDRESS; > sd->erase_end = INVALID_ADDRESS; > - sd->size = size; > sd->blk_len = 0x200; > sd->pwd_len = 0; > sd->expecting_acmd = false;
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