This patch includes i3c instance in ast2600 soc.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
---
hw/arm/aspeed_ast2600.c | 12 ++++++++++++
include/hw/arm/aspeed_soc.h | 3 +++
2 files changed, 15 insertions(+)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index f2fef9d706..219b025bc2 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -63,6 +63,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_DEV_VUART] = 0x1E787000,
[ASPEED_DEV_FSI1] = 0x1E79B000,
[ASPEED_DEV_FSI2] = 0x1E79B100,
+ [ASPEED_DEV_I3C] = 0x1E7A0000,
[ASPEED_DEV_SDRAM] = 0x80000000,
};
@@ -112,6 +113,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_DEV_FSI1] = 100,
[ASPEED_DEV_FSI2] = 101,
[ASPEED_DEV_DP] = 62,
+ [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
};
static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
@@ -230,6 +232,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
object_initialize_child(obj, "pwm", &s->pwm, TYPE_ASPEED_PWM);
+ object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
+
object_initialize_child(obj, "fsi[*]", &s->fsi[0], TYPE_ASPEED_APB2OPB);
}
@@ -542,6 +546,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwm), 0,
aspeed_soc_get_irq(s, ASPEED_DEV_PWM));
+ /* I3C */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_I3C));
+
/* FSI */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fsi[0]), errp)) {
return;
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 0db200d813..0c950fab3c 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -21,6 +21,7 @@
#include "hw/timer/aspeed_timer.h"
#include "hw/rtc/aspeed_rtc.h"
#include "hw/i2c/aspeed_i2c.h"
+#include "hw/misc/aspeed_i3c.h"
#include "hw/ssi/aspeed_smc.h"
#include "hw/misc/aspeed_hace.h"
#include "hw/watchdog/wdt_aspeed.h"
@@ -53,6 +54,7 @@ struct AspeedSoCState {
AspeedRtcState rtc;
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
+ AspeedI3CState i3c;
AspeedSCUState scu;
AspeedHACEState hace;
AspeedXDMAState xdma;
@@ -148,6 +150,7 @@ enum {
ASPEED_DEV_FSI2,
ASPEED_DEV_DPMCU,
ASPEED_DEV_DP,
+ ASPEED_DEV_I3C,
};
#endif /* ASPEED_SOC_H */
--
2.25.1
On 12/22/21 10:23, Troy Lee wrote:
> This patch includes i3c instance in ast2600 soc.
>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Looks good but it is based on the QEMU aspeed branch for OpenBMC.
You should rebase on upstream.
Thanks,
C.
> ---
> hw/arm/aspeed_ast2600.c | 12 ++++++++++++
> include/hw/arm/aspeed_soc.h | 3 +++
> 2 files changed, 15 insertions(+)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index f2fef9d706..219b025bc2 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -63,6 +63,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
> [ASPEED_DEV_VUART] = 0x1E787000,
> [ASPEED_DEV_FSI1] = 0x1E79B000,
> [ASPEED_DEV_FSI2] = 0x1E79B100,
> + [ASPEED_DEV_I3C] = 0x1E7A0000,
> [ASPEED_DEV_SDRAM] = 0x80000000,
> };
>
> @@ -112,6 +113,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
> [ASPEED_DEV_FSI1] = 100,
> [ASPEED_DEV_FSI2] = 101,
> [ASPEED_DEV_DP] = 62,
> + [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
> };
>
> static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
> @@ -230,6 +232,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
>
> object_initialize_child(obj, "pwm", &s->pwm, TYPE_ASPEED_PWM);
>
> + object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
> +
> object_initialize_child(obj, "fsi[*]", &s->fsi[0], TYPE_ASPEED_APB2OPB);
> }
>
> @@ -542,6 +546,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwm), 0,
> aspeed_soc_get_irq(s, ASPEED_DEV_PWM));
>
> + /* I3C */
> + if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
> + return;
> + }
> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c), 0,
> + aspeed_soc_get_irq(s, ASPEED_DEV_I3C));
> +
> /* FSI */
> if (!sysbus_realize(SYS_BUS_DEVICE(&s->fsi[0]), errp)) {
> return;
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 0db200d813..0c950fab3c 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -21,6 +21,7 @@
> #include "hw/timer/aspeed_timer.h"
> #include "hw/rtc/aspeed_rtc.h"
> #include "hw/i2c/aspeed_i2c.h"
> +#include "hw/misc/aspeed_i3c.h"
> #include "hw/ssi/aspeed_smc.h"
> #include "hw/misc/aspeed_hace.h"
> #include "hw/watchdog/wdt_aspeed.h"
> @@ -53,6 +54,7 @@ struct AspeedSoCState {
> AspeedRtcState rtc;
> AspeedTimerCtrlState timerctrl;
> AspeedI2CState i2c;
> + AspeedI3CState i3c;
> AspeedSCUState scu;
> AspeedHACEState hace;
> AspeedXDMAState xdma;
> @@ -148,6 +150,7 @@ enum {
> ASPEED_DEV_FSI2,
> ASPEED_DEV_DPMCU,
> ASPEED_DEV_DP,
> + ASPEED_DEV_I3C,
> };
>
> #endif /* ASPEED_SOC_H */
>
On Thu, Dec 23, 2021 at 9:54 PM Cédric Le Goater <clg@kaod.org> wrote:
>
> On 12/22/21 10:23, Troy Lee wrote:
> > This patch includes i3c instance in ast2600 soc.
> >
> > Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
>
> Looks good but it is based on the QEMU aspeed branch for OpenBMC.
> You should rebase on upstream.
>
> Thanks,
>
> C.
>
Will do.
Thanks,
Troy Lee
> > ---
> > hw/arm/aspeed_ast2600.c | 12 ++++++++++++
> > include/hw/arm/aspeed_soc.h | 3 +++
> > 2 files changed, 15 insertions(+)
> >
> > diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> > index f2fef9d706..219b025bc2 100644
> > --- a/hw/arm/aspeed_ast2600.c
> > +++ b/hw/arm/aspeed_ast2600.c
> > @@ -63,6 +63,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
> > [ASPEED_DEV_VUART] = 0x1E787000,
> > [ASPEED_DEV_FSI1] = 0x1E79B000,
> > [ASPEED_DEV_FSI2] = 0x1E79B100,
> > + [ASPEED_DEV_I3C] = 0x1E7A0000,
> > [ASPEED_DEV_SDRAM] = 0x80000000,
> > };
> >
> > @@ -112,6 +113,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
> > [ASPEED_DEV_FSI1] = 100,
> > [ASPEED_DEV_FSI2] = 101,
> > [ASPEED_DEV_DP] = 62,
> > + [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
> > };
> >
> > static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
> > @@ -230,6 +232,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
> >
> > object_initialize_child(obj, "pwm", &s->pwm, TYPE_ASPEED_PWM);
> >
> > + object_initialize_child(obj, "i3c", &s->i3c, TYPE_ASPEED_I3C);
> > +
> > object_initialize_child(obj, "fsi[*]", &s->fsi[0], TYPE_ASPEED_APB2OPB);
> > }
> >
> > @@ -542,6 +546,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> > sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwm), 0,
> > aspeed_soc_get_irq(s, ASPEED_DEV_PWM));
> >
> > + /* I3C */
> > + if (!sysbus_realize(SYS_BUS_DEVICE(&s->i3c), errp)) {
> > + return;
> > + }
> > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i3c), 0, sc->memmap[ASPEED_DEV_I3C]);
> > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i3c), 0,
> > + aspeed_soc_get_irq(s, ASPEED_DEV_I3C));
> > +
> > /* FSI */
> > if (!sysbus_realize(SYS_BUS_DEVICE(&s->fsi[0]), errp)) {
> > return;
> > diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> > index 0db200d813..0c950fab3c 100644
> > --- a/include/hw/arm/aspeed_soc.h
> > +++ b/include/hw/arm/aspeed_soc.h
> > @@ -21,6 +21,7 @@
> > #include "hw/timer/aspeed_timer.h"
> > #include "hw/rtc/aspeed_rtc.h"
> > #include "hw/i2c/aspeed_i2c.h"
> > +#include "hw/misc/aspeed_i3c.h"
> > #include "hw/ssi/aspeed_smc.h"
> > #include "hw/misc/aspeed_hace.h"
> > #include "hw/watchdog/wdt_aspeed.h"
> > @@ -53,6 +54,7 @@ struct AspeedSoCState {
> > AspeedRtcState rtc;
> > AspeedTimerCtrlState timerctrl;
> > AspeedI2CState i2c;
> > + AspeedI3CState i3c;
> > AspeedSCUState scu;
> > AspeedHACEState hace;
> > AspeedXDMAState xdma;
> > @@ -148,6 +150,7 @@ enum {
> > ASPEED_DEV_FSI2,
> > ASPEED_DEV_DPMCU,
> > ASPEED_DEV_DP,
> > + ASPEED_DEV_I3C,
> > };
> >
> > #endif /* ASPEED_SOC_H */
> >
>
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