[PULL 018/101] docs: Rename ppc-spapr-hcalls.txt to ppc-spapr-hcalls.rst.

From: Leonardo Garcia <lagarcia@br.ibm.com>

Signed-off-by: Leonardo Garcia <lagarcia@br.ibm.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <7f13e40e05ddb411697b0777b0e37757f76905e9.1638982486.git.lagarcia@br.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 docs/specs/{ppc-spapr-hcalls.txt => ppc-spapr-hcalls.rst} | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename docs/specs/{ppc-spapr-hcalls.txt => ppc-spapr-hcalls.rst} (100%)

diff --git a/docs/specs/ppc-spapr-hcalls.txt b/docs/specs/ppc-spapr-hcalls.rst
similarity index 100%
rename from docs/specs/ppc-spapr-hcalls.txt
rename to docs/specs/ppc-spapr-hcalls.rst
-- 
2.31.1

• [PULL 001/101] pseries: Update SLOF firmware image
• [PULL 002/101] hw/ppc/mac.h: Remove MAX_CPUS macro
• [PULL 003/101] target/ppc: Fixed call to deferred exception
• [PULL 004/101] test/tcg/ppc64le: test mtfsf
• [PULL 005/101] target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52
• [PULL 006/101] target/ppc: Implement Vector Expand Mask
• [PULL 007/101] target/ppc: Implement Vector Extract Mask
• [PULL 008/101] target/ppc: Implement Vector Mask Move insns
• [PULL 009/101] ivshmem.c: change endianness to LITTLE_ENDIAN
• [PULL 010/101] ivshmem-test.c: enable test_ivshmem_server for ppc64 arch
• [PULL 011/101] pci-host: Allow extended config space access for PowerNV PHB4 model
• [PULL 012/101] docs: Minor updates on the powernv documentation.
• [PULL 013/101] ppc/pnv.c: add a friendly warning when accel=kvm is used
• [PULL 014/101] docs/system/ppc/powernv.rst: document KVM support status
• [PULL 015/101] ppc/pnv.c: fix "system-id" FDT when -uuid is set
• [PULL 016/101] docs: Introducing pseries documentation.
• [PULL 017/101] docs: rSTify ppc-spapr-hcalls.txt
• [PULL 018/101] docs: Rename ppc-spapr-hcalls.txt to ppc-spapr-hcalls.rst.
• [PULL 019/101] Link new ppc-spapr-hcalls.rst file to pseries.rst.
• [PULL 020/101] softfloat: Extend float_exception_flags to 16 bits
• [PULL 021/101] softfloat: Add flag specific to Inf - Inf
• [PULL 022/101] softfloat: Add flag specific to Inf * 0
• [PULL 023/101] softfloat: Add flags specific to Inf / Inf and 0 / 0
• [PULL 024/101] softfloat: Add flag specific to sqrt(-x)
• [PULL 025/101] softfloat: Add flag specific to convert non-nan to int
• [PULL 026/101] softfloat: Add flag specific to signaling nans
• [PULL 027/101] target/ppc: Update float_invalid_op_addsub for new flags
• [PULL 028/101] target/ppc: Update float_invalid_op_mul for new flags
• [PULL 029/101] target/ppc: Update float_invalid_op_div for new flags
• [PULL 030/101] target/ppc: Move float_check_status from FPU_FCTI to translate
• [PULL 031/101] target/ppc: Update float_invalid_cvt for new flags
• [PULL 032/101] target/ppc: Fix VXCVI return value
• [PULL 033/101] target/ppc: Remove inline from do_fri
• [PULL 034/101] target/ppc: Use FloatRoundMode in do_fri
• [PULL 035/101] target/ppc: Tidy inexact handling in do_fri
• [PULL 036/101] target/ppc: Clean up do_fri
• [PULL 037/101] target/ppc: Update fmadd for new flags
• [PULL 038/101] target/ppc: Split out do_fmadd
• [PULL 039/101] target/ppc: Do not call do_float_check_status from do_fmadd
• [PULL 040/101] target/ppc: Split out do_frsp
• [PULL 041/101] target/ppc: Update do_frsp for new flags
• [PULL 042/101] target/ppc: Use helper_todouble in do_frsp
• [PULL 043/101] target/ppc: Update sqrt for new flags
• [PULL 044/101] target/ppc: Update xsrqpi and xsrqpxp to new flags
• [PULL 045/101] target/ppc: Update fre to new flags
• [PULL 046/101] softfloat: Add float64r32 arithmetic routines
• [PULL 047/101] target/ppc: Add helpers for fmadds et al
• [PULL 048/101] target/ppc: Add helper for fsqrts
• [PULL 049/101] target/ppc: Add helpers for fadds, fsubs, fdivs
• [PULL 050/101] target/ppc: Add helper for fmuls
• [PULL 051/101] target/ppc: Add helper for frsqrtes
• [PULL 052/101] target/ppc: Update fres to new flags and float64r32
• [PULL 053/101] target/ppc: Use helper_todouble/tosingle in helper_xststdcsp
• [PULL 054/101] target/ppc: Disable software TLB for the 7450 family
• [PULL 055/101] target/ppc: Disable unused facilities in the e600 CPU
• [PULL 056/101] target/ppc: Remove the software TLB model of 7450 CPUs
• [PULL 057/101] target/ppc: Fix MPCxxx FPU interrupt address
• [PULL 058/101] target/ppc: Remove 603e exception model
• [PULL 059/101] target/ppc: Set 601v exception model id
• [PULL 060/101] target/ppc: remove 401/403 CPUs
• [PULL 061/101] ppc/ppc405: Change kernel load address
• [PULL 062/101] ppc: Mark the 'taihu' machine as deprecated
• [PULL 063/101] ppc: Add trace-events for DCR accesses
• [PULL 064/101] ppc/ppc405: Convert printfs to trace-events
• [PULL 065/101] ppc/ppc405: Drop flag parameter in ppc405_set_bootinfo()
• [PULL 066/101] ppc/ppc405: Change ppc405ep_init() return value
• [PULL 067/101] ppc/ppc405: Add some address space definitions
• [PULL 068/101] ppc/ppc405: Remove flash support
• [PULL 069/101] ppc/ppc405: Rework FW load
• [PULL 070/101] ppc/ppc405: Introduce ppc405_set_default_bootinfo()
• [PULL 071/101] ppc/ppc405: Fix boot from kernel
• [PULL 072/101] ppc/ppc405: Change default PLL values at reset
• [PULL 073/101] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information
• [PULL 074/101] ppc/ppc405: Add update of bi_procfreq field
• [PULL 075/101] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers
• [PULL 076/101] target/ppc: Move xs{max,min}[cj]dp to decodetree
• [PULL 077/101] target/ppc: fix xscvqpdp register access
• [PULL 078/101] target/ppc: move xscvqpdp to decodetree
• [PULL 079/101] target/ppc: Fix e6500 boot
• [PULL 080/101] Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp"
• [PULL 081/101] target/ppc: introduce PMUEventType and PMU overflow timers
• [PULL 082/101] target/ppc: PMU basic cycle count for pseries TCG
• [PULL 083/101] target/ppc: PMU: update counters on PMCs r/w
• [PULL 084/101] target/ppc: PMU: update counters on MMCR1 write
• [PULL 085/101] target/ppc: enable PMU counter overflow with cycle events
• [PULL 086/101] target/ppc: enable PMU instruction count
• [PULL 087/101] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event
• [PULL 088/101] PPC64/TCG: Implement 'rfebb' instruction
• [PULL 089/101] ppc/pnv: Introduce a "chip" property under PHB3
• [PULL 090/101] ppc/pnv: Use the chip class to check the index of PHB3 devices
• [PULL 091/101] ppc/pnv: Drop the "num-phbs" property
• [PULL 092/101] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize()
• [PULL 093/101] ppc/pnv: Use QOM hierarchy to scan PHB3 devices
• [PULL 094/101] ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices
• [PULL 095/101] ppc/pnv: Introduce version and device_id class atributes for PHB4 devices
• [PULL 096/101] ppc/pnv: Introduce a "chip" property under the PHB4 model
• [PULL 097/101] ppc/pnv: Introduce a num_stack class attribute
• [PULL 098/101] ppc/pnv: Compute the PHB index from the PHB4 PEC model
• [PULL 099/101] ppc/pnv: Remove "system-memory" property from PHB4 PEC
• [PULL 100/101] ppc/pnv: Move realize of PEC stacks under the PEC model
• [PULL 101/101] ppc/pnv: Use QOM hierarchy to scan PEC PHB4 devices