[PATCH 0/4] target/ppc: Fix VSX instructions register access

Victor Colombo posted 4 patches 4 years, 2 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20211210141347.38603-1-victor.colombo@eldorado.org.br
Maintainers: Daniel Henrique Barboza <danielhb413@gmail.com>, David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>, "Cédric Le Goater" <clg@kaod.org>
There is a newer version of this series
target/ppc/fpu_helper.c             | 14 +++-----
target/ppc/helper.h                 | 10 +++---
target/ppc/insn32.decode            | 21 +++++++++--
target/ppc/translate/vsx-impl.c.inc | 55 +++++++++++++++++++++--------
target/ppc/translate/vsx-ops.c.inc  |  5 ---
5 files changed, 68 insertions(+), 37 deletions(-)
[PATCH 0/4] target/ppc: Fix VSX instructions register access
Posted by Victor Colombo 4 years, 2 months ago
Instructions xscvqpdp, xsmaxcdp, xsmincdp, xsmaxjdp, and xsminjdp are
using the wrong registers, which yields the wrong result when using
them.

This patch series fixes this issue by correcting the registers used.
It also takes the opportunity to move these instructions to decodetree.

Matheus Ferst (2):
  target/ppc: fix xscvqpdp register access
  target/ppc: move xscvqpdp to decodetree

Victor Colombo (2):
  target/ppc: Fix xs{max,min}[cj]dp to use VSX registers
  target/ppc: Move xs{max,min}[cj]dp to decodetree

 target/ppc/fpu_helper.c             | 14 +++-----
 target/ppc/helper.h                 | 10 +++---
 target/ppc/insn32.decode            | 21 +++++++++--
 target/ppc/translate/vsx-impl.c.inc | 55 +++++++++++++++++++++--------
 target/ppc/translate/vsx-ops.c.inc  |  5 ---
 5 files changed, 68 insertions(+), 37 deletions(-)

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2.25.1