1 | Apologies for sending two pullreqs today; Eric's patch came in a | 1 | v2: drop pvpanic-pci patches. |
---|---|---|---|
2 | few hours after I sent the first one but it's definitely a | ||
3 | release-critical fix. | ||
4 | 2 | ||
5 | -- PMM | 3 | The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c: |
6 | 4 | ||
7 | The following changes since commit 89d2f9e4c63799f7f03e9180c63b7dc45fc2a04a: | 5 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000) |
8 | |||
9 | Merge tag 'pull-target-arm-20211122' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2021-11-22 16:35:54 +0100) | ||
10 | 6 | ||
11 | are available in the Git repository at: | 7 | are available in the Git repository at: |
12 | 8 | ||
13 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211122-1 | 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1 |
14 | 10 | ||
15 | for you to fetch changes up to 33a0c404fb90a3fa8eea6ebf5c535fc7bc0b9912: | 11 | for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8: |
16 | 12 | ||
17 | hw/intc/arm_gicv3_its: Revert version increments in vmstate_its (2021-11-22 18:17:19 +0000) | 13 | docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000) |
18 | 14 | ||
19 | ---------------------------------------------------------------- | 15 | ---------------------------------------------------------------- |
20 | target-arm queue: | 16 | target-arm queue: |
21 | * drop spurious bump of ITS vmstate version fields | 17 | * Implement IMPDEF pauth algorithm |
18 | * Support ARMv8.4-SEL2 | ||
19 | * Fix bug where we were truncating predicate vector lengths in SVE insns | ||
20 | * npcm7xx_adc-test: Fix memleak in adc_qom_set | ||
21 | * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error | ||
22 | * docs: Build and install all the docs in a single manual | ||
22 | 23 | ||
23 | ---------------------------------------------------------------- | 24 | ---------------------------------------------------------------- |
24 | Eric Auger (1): | 25 | Gan Qixin (1): |
25 | hw/intc/arm_gicv3_its: Revert version increments in vmstate_its | 26 | npcm7xx_adc-test: Fix memleak in adc_qom_set |
26 | 27 | ||
27 | hw/intc/arm_gicv3_its_common.c | 2 -- | 28 | Peter Maydell (1): |
28 | 1 file changed, 2 deletions(-) | 29 | docs: Build and install all the docs in a single manual |
29 | 30 | ||
31 | Philippe Mathieu-Daudé (1): | ||
32 | target/arm/m_helper: Silence GCC 10 maybe-uninitialized error | ||
33 | |||
34 | Richard Henderson (7): | ||
35 | target/arm: Implement an IMPDEF pauth algorithm | ||
36 | target/arm: Add cpu properties to control pauth | ||
37 | target/arm: Use object_property_add_bool for "sve" property | ||
38 | target/arm: Introduce PREDDESC field definitions | ||
39 | target/arm: Update PFIRST, PNEXT for pred_desc | ||
40 | target/arm: Update ZIP, UZP, TRN for pred_desc | ||
41 | target/arm: Update REV, PUNPK for pred_desc | ||
42 | |||
43 | Rémi Denis-Courmont (19): | ||
44 | target/arm: remove redundant tests | ||
45 | target/arm: add arm_is_el2_enabled() helper | ||
46 | target/arm: use arm_is_el2_enabled() where applicable | ||
47 | target/arm: use arm_hcr_el2_eff() where applicable | ||
48 | target/arm: factor MDCR_EL2 common handling | ||
49 | target/arm: Define isar_feature function to test for presence of SEL2 | ||
50 | target/arm: add 64-bit S-EL2 to EL exception table | ||
51 | target/arm: add MMU stage 1 for Secure EL2 | ||
52 | target/arm: add ARMv8.4-SEL2 system registers | ||
53 | target/arm: handle VMID change in secure state | ||
54 | target/arm: do S1_ptw_translate() before address space lookup | ||
55 | target/arm: translate NS bit in page-walks | ||
56 | target/arm: generalize 2-stage page-walk condition | ||
57 | target/arm: secure stage 2 translation regime | ||
58 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | ||
59 | target/arm: revector to run-time pick target EL | ||
60 | target/arm: Implement SCR_EL2.EEL2 | ||
61 | target/arm: enable Secure EL2 in max CPU | ||
62 | target/arm: refactor vae1_tlbmask() | ||
63 | |||
64 | docs/conf.py | 46 ++++- | ||
65 | docs/devel/conf.py | 15 -- | ||
66 | docs/index.html.in | 17 -- | ||
67 | docs/interop/conf.py | 28 --- | ||
68 | docs/meson.build | 64 +++--- | ||
69 | docs/specs/conf.py | 16 -- | ||
70 | docs/system/arm/cpu-features.rst | 21 ++ | ||
71 | docs/system/conf.py | 28 --- | ||
72 | docs/tools/conf.py | 37 ---- | ||
73 | docs/user/conf.py | 15 -- | ||
74 | include/qemu/xxhash.h | 98 +++++++++ | ||
75 | target/arm/cpu-param.h | 2 +- | ||
76 | target/arm/cpu.h | 107 ++++++++-- | ||
77 | target/arm/internals.h | 45 +++++ | ||
78 | target/arm/cpu.c | 23 ++- | ||
79 | target/arm/cpu64.c | 65 ++++-- | ||
80 | target/arm/helper-a64.c | 8 +- | ||
81 | target/arm/helper.c | 414 ++++++++++++++++++++++++++------------- | ||
82 | target/arm/m_helper.c | 2 +- | ||
83 | target/arm/monitor.c | 1 + | ||
84 | target/arm/op_helper.c | 4 +- | ||
85 | target/arm/pauth_helper.c | 27 ++- | ||
86 | target/arm/sve_helper.c | 33 ++-- | ||
87 | target/arm/tlb_helper.c | 3 + | ||
88 | target/arm/translate-a64.c | 4 + | ||
89 | target/arm/translate-sve.c | 31 ++- | ||
90 | target/arm/translate.c | 36 +++- | ||
91 | tests/qtest/arm-cpu-features.c | 13 ++ | ||
92 | tests/qtest/npcm7xx_adc-test.c | 1 + | ||
93 | .gitlab-ci.yml | 4 +- | ||
94 | 30 files changed, 770 insertions(+), 438 deletions(-) | ||
95 | delete mode 100644 docs/devel/conf.py | ||
96 | delete mode 100644 docs/index.html.in | ||
97 | delete mode 100644 docs/interop/conf.py | ||
98 | delete mode 100644 docs/specs/conf.py | ||
99 | delete mode 100644 docs/system/conf.py | ||
100 | delete mode 100644 docs/tools/conf.py | ||
101 | delete mode 100644 docs/user/conf.py | ||
102 | diff view generated by jsdifflib |
Deleted patch | |||
---|---|---|---|
1 | From: Eric Auger <eric.auger@redhat.com> | ||
2 | 1 | ||
3 | Commit 18f6290a6a ("hw/intc: GICv3 ITS initial framework") | ||
4 | incremented version_id and minimum_version_id fields of | ||
5 | VMStateDescription vmstate_its. This breaks the migration between | ||
6 | 6.2 and 6.1 with the following message: | ||
7 | |||
8 | qemu-system-aarch64: savevm: unsupported version 1 for 'arm_gicv3_its' v0 | ||
9 | qemu-system-aarch64: load of migration failed: Invalid argument | ||
10 | |||
11 | Revert that change. | ||
12 | |||
13 | Signed-off-by: Eric Auger <eric.auger@redhat.com> | ||
14 | Message-id: 20211122171020.1195483-1-eric.auger@redhat.com | ||
15 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
17 | --- | ||
18 | hw/intc/arm_gicv3_its_common.c | 2 -- | ||
19 | 1 file changed, 2 deletions(-) | ||
20 | |||
21 | diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c | ||
22 | index XXXXXXX..XXXXXXX 100644 | ||
23 | --- a/hw/intc/arm_gicv3_its_common.c | ||
24 | +++ b/hw/intc/arm_gicv3_its_common.c | ||
25 | @@ -XXX,XX +XXX,XX @@ static int gicv3_its_post_load(void *opaque, int version_id) | ||
26 | |||
27 | static const VMStateDescription vmstate_its = { | ||
28 | .name = "arm_gicv3_its", | ||
29 | - .version_id = 1, | ||
30 | - .minimum_version_id = 1, | ||
31 | .pre_save = gicv3_its_pre_save, | ||
32 | .post_load = gicv3_its_post_load, | ||
33 | .priority = MIG_PRI_GICV3_ITS, | ||
34 | -- | ||
35 | 2.25.1 | ||
36 | |||
37 | diff view generated by jsdifflib |