| 1 | From: Alistair Francis <alistair.francis@wdc.com> | 1 | From: Alistair Francis <alistair.francis@wdc.com> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | The following changes since commit c5fbdd60cf1fb52f01bdfe342b6fa65d5343e1b1: | 3 | The following changes since commit 7b17a1a841fc2336eba53afade9cadb14bd3dd9a: |
| 4 | 4 | ||
| 5 | Merge tag 'qemu-sparc-20211121' of git://github.com/mcayland/qemu into staging (2021-11-21 14:12:25 +0100) | 5 | Update version for v7.1.0-rc0 release (2022-07-26 18:03:16 -0700) |
| 6 | 6 | ||
| 7 | are available in the Git repository at: | 7 | are available in the Git repository at: |
| 8 | 8 | ||
| 9 | git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20211122 | 9 | git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20220728 |
| 10 | 10 | ||
| 11 | for you to fetch changes up to 526e7443027c71fe7b04c29df529e1f9f425f9e3: | 11 | for you to fetch changes up to 54f218363052be210e77d2ada8c0c1e51b3ad6cd: |
| 12 | 12 | ||
| 13 | hw/misc/sifive_u_otp: Do not reset OTP content on hardware reset (2021-11-22 10:46:22 +1000) | 13 | hw/intc: sifive_plic: Fix multi-socket plic configuraiton (2022-07-28 09:08:44 +1000) |
| 14 | 14 | ||
| 15 | ---------------------------------------------------------------- | 15 | ---------------------------------------------------------------- |
| 16 | Seventh RISC-V PR for QEMU 6.2 | 16 | Sixth RISC-V PR for QEMU 7.1 |
| 17 | 17 | ||
| 18 | - Deprecate IF_NONE for SiFive OTP | 18 | This is a PR to go in for RC1. It fixes a segfault that occurs |
| 19 | - Don't reset SiFive OTP content | 19 | when using multiple sockets on the RISC-V virt board. It also |
| 20 | includes a small fix to allow both Zmmul and M extensions. | ||
| 21 | |||
| 22 | * Allow both Zmmul and M extension | ||
| 23 | * Fix multi-socket plic configuraiton | ||
| 20 | 24 | ||
| 21 | ---------------------------------------------------------------- | 25 | ---------------------------------------------------------------- |
| 22 | Philippe Mathieu-Daudé (1): | 26 | Atish Patra (1): |
| 23 | hw/misc/sifive_u_otp: Do not reset OTP content on hardware reset | 27 | hw/intc: sifive_plic: Fix multi-socket plic configuraiton |
| 24 | 28 | ||
| 25 | Thomas Huth (1): | 29 | Palmer Dabbelt (1): |
| 26 | hw/misc/sifive_u_otp: Use IF_PFLASH for the OTP device instead of IF_NONE | 30 | RISC-V: Allow both Zmmul and M |
| 27 | 31 | ||
| 28 | docs/about/deprecated.rst | 6 ++++++ | 32 | hw/intc/sifive_plic.c | 4 ++-- |
| 29 | hw/misc/sifive_u_otp.c | 22 +++++++++++++--------- | 33 | target/riscv/cpu.c | 5 ----- |
| 30 | 2 files changed, 19 insertions(+), 9 deletions(-) | 34 | 2 files changed, 2 insertions(+), 7 deletions(-) |
| 31 | diff view generated by jsdifflib |
| 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> | 1 | From: Palmer Dabbelt <palmer@rivosinc.com> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Once a "One Time Programmable" is programmed, it shouldn't be reset. | 3 | We got to talking about how Zmmul and M interact with each other |
| 4 | https://github.com/riscv/riscv-isa-manual/issues/869 , and it turns out | ||
| 5 | that QEMU's behavior is slightly wrong: having Zmmul and M is a legal | ||
| 6 | combination, it just means that the multiplication instructions are | ||
| 7 | supported even when M is disabled at runtime via misa. | ||
| 4 | 8 | ||
| 5 | Do not re-initialize the OTP content in the DeviceReset handler, | 9 | This just stops overriding M from Zmmul, with that the other checks for |
| 6 | initialize it once in the DeviceRealize one. | 10 | the multiplication instructions work as per the ISA. |
| 7 | 11 | ||
| 8 | Fixes: 9fb45c62ae8 ("riscv: sifive: Implement a model for SiFive FU540 OTP") | 12 | Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
| 9 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
| 10 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 13 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
| 11 | Message-Id: <20211119104757.331579-1-f4bug@amsat.org> | 14 | Message-Id: <20220714180033.22385-1-palmer@rivosinc.com> |
| 12 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | 15 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
| 13 | --- | 16 | --- |
| 14 | hw/misc/sifive_u_otp.c | 13 +++++-------- | 17 | target/riscv/cpu.c | 5 ----- |
| 15 | 1 file changed, 5 insertions(+), 8 deletions(-) | 18 | 1 file changed, 5 deletions(-) |
| 16 | 19 | ||
| 17 | diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c | 20 | diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c |
| 18 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
| 19 | --- a/hw/misc/sifive_u_otp.c | 22 | --- a/target/riscv/cpu.c |
| 20 | +++ b/hw/misc/sifive_u_otp.c | 23 | +++ b/target/riscv/cpu.c |
| 21 | @@ -XXX,XX +XXX,XX @@ static void sifive_u_otp_realize(DeviceState *dev, Error **errp) | 24 | @@ -XXX,XX +XXX,XX @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) |
| 22 | 25 | cpu->cfg.ext_ifencei = true; | |
| 23 | if (blk_pread(s->blk, 0, s->fuse, filesize) != filesize) { | ||
| 24 | error_setg(errp, "failed to read the initial flash content"); | ||
| 25 | + return; | ||
| 26 | } | ||
| 27 | } | 26 | } |
| 28 | } | 27 | |
| 29 | -} | 28 | - if (cpu->cfg.ext_m && cpu->cfg.ext_zmmul) { |
| 29 | - warn_report("Zmmul will override M"); | ||
| 30 | - cpu->cfg.ext_m = false; | ||
| 31 | - } | ||
| 30 | - | 32 | - |
| 31 | -static void sifive_u_otp_reset(DeviceState *dev) | 33 | if (cpu->cfg.ext_i && cpu->cfg.ext_e) { |
| 32 | -{ | 34 | error_setg(errp, |
| 33 | - SiFiveUOTPState *s = SIFIVE_U_OTP(dev); | 35 | "I and E extensions are incompatible"); |
| 34 | |||
| 35 | /* Initialize all fuses' initial value to 0xFFs */ | ||
| 36 | memset(s->fuse, 0xff, sizeof(s->fuse)); | ||
| 37 | @@ -XXX,XX +XXX,XX @@ static void sifive_u_otp_reset(DeviceState *dev) | ||
| 38 | serial_data = s->serial; | ||
| 39 | if (blk_pwrite(s->blk, index * SIFIVE_U_OTP_FUSE_WORD, | ||
| 40 | &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0) < 0) { | ||
| 41 | - error_report("write error index<%d>", index); | ||
| 42 | + error_setg(errp, "failed to write index<%d>", index); | ||
| 43 | + return; | ||
| 44 | } | ||
| 45 | |||
| 46 | serial_data = ~(s->serial); | ||
| 47 | if (blk_pwrite(s->blk, (index + 1) * SIFIVE_U_OTP_FUSE_WORD, | ||
| 48 | &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0) < 0) { | ||
| 49 | - error_report("write error index<%d>", index + 1); | ||
| 50 | + error_setg(errp, "failed to write index<%d>", index + 1); | ||
| 51 | + return; | ||
| 52 | } | ||
| 53 | } | ||
| 54 | |||
| 55 | @@ -XXX,XX +XXX,XX @@ static void sifive_u_otp_class_init(ObjectClass *klass, void *data) | ||
| 56 | |||
| 57 | device_class_set_props(dc, sifive_u_otp_properties); | ||
| 58 | dc->realize = sifive_u_otp_realize; | ||
| 59 | - dc->reset = sifive_u_otp_reset; | ||
| 60 | } | ||
| 61 | |||
| 62 | static const TypeInfo sifive_u_otp_info = { | ||
| 63 | -- | 36 | -- |
| 64 | 2.31.1 | 37 | 2.37.1 |
| 65 | |||
| 66 | diff view generated by jsdifflib |
| 1 | From: Thomas Huth <thuth@redhat.com> | 1 | From: Atish Patra <atishp@rivosinc.com> |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Configuring a drive with "if=none" is meant for creation of a backend | 3 | Since commit 40244040a7ac, multi-socket configuration with plic is |
| 4 | only, it should not get automatically assigned to a device frontend. | 4 | broken as the hartid for second socket is calculated incorrectly. |
| 5 | Use "if=pflash" for the One-Time-Programmable device instead (like | 5 | The hartid stored in addr_config already includes the offset |
| 6 | it is e.g. also done for the efuse device in hw/arm/xlnx-zcu102.c). | 6 | for the base hartid for that socket. Adding it again would lead |
| 7 | to segfault while creating the plic device for the virt machine. | ||
| 8 | qdev_connect_gpio_out was also invoked with incorrect number of gpio | ||
| 9 | lines. | ||
| 7 | 10 | ||
| 8 | Since the old way of configuring the device has already been published | 11 | Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer) |
| 9 | with the previous QEMU versions, we cannot remove this immediately, but | ||
| 10 | have to deprecate it and support it for at least two more releases. | ||
| 11 | 12 | ||
| 12 | Signed-off-by: Thomas Huth <thuth@redhat.com> | 13 | Signed-off-by: Atish Patra <atishp@rivosinc.com> |
| 13 | Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
| 14 | Reviewed-by: Markus Armbruster <armbru@redhat.com> | ||
| 15 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | 14 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
| 16 | Message-id: 20211119102549.217755-1-thuth@redhat.com | 15 | Message-Id: <20220723090335.671105-1-atishp@rivosinc.com> |
| 16 | [ Changes by AF: | ||
| 17 | - Change the qdev_connect_gpio_out() numbering | ||
| 18 | ] | ||
| 17 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | 19 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
| 18 | --- | 20 | --- |
| 19 | docs/about/deprecated.rst | 6 ++++++ | 21 | hw/intc/sifive_plic.c | 4 ++-- |
| 20 | hw/misc/sifive_u_otp.c | 9 ++++++++- | 22 | 1 file changed, 2 insertions(+), 2 deletions(-) |
| 21 | 2 files changed, 14 insertions(+), 1 deletion(-) | ||
| 22 | 23 | ||
| 23 | diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst | 24 | diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c |
| 24 | index XXXXXXX..XXXXXXX 100644 | 25 | index XXXXXXX..XXXXXXX 100644 |
| 25 | --- a/docs/about/deprecated.rst | 26 | --- a/hw/intc/sifive_plic.c |
| 26 | +++ b/docs/about/deprecated.rst | 27 | +++ b/hw/intc/sifive_plic.c |
| 27 | @@ -XXX,XX +XXX,XX @@ as short-form boolean values, and passed to plugins as ``arg_name=on``. | 28 | @@ -XXX,XX +XXX,XX @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, |
| 28 | However, short-form booleans are deprecated and full explicit ``arg_name=on`` | 29 | |
| 29 | form is preferred. | 30 | for (i = 0; i < plic->num_addrs; i++) { |
| 30 | 31 | int cpu_num = plic->addr_config[i].hartid; | |
| 31 | +``-drive if=none`` for the sifive_u OTP device (since 6.2) | 32 | - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); |
| 32 | +'''''''''''''''''''''''''''''''''''''''''''''''''''''''''' | 33 | + CPUState *cpu = qemu_get_cpu(cpu_num); |
| 33 | + | 34 | |
| 34 | +Using ``-drive if=none`` to configure the OTP device of the sifive_u | 35 | if (plic->addr_config[i].mode == PLICMode_M) { |
| 35 | +RISC-V machine is deprecated. Use ``-drive if=pflash`` instead. | 36 | - qdev_connect_gpio_out(dev, num_harts + cpu_num, |
| 36 | + | 37 | + qdev_connect_gpio_out(dev, num_harts - plic->hartid_base + cpu_num, |
| 37 | 38 | qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); | |
| 38 | QEMU Machine Protocol (QMP) commands | 39 | } |
| 39 | ------------------------------------ | 40 | if (plic->addr_config[i].mode == PLICMode_S) { |
| 40 | diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c | ||
| 41 | index XXXXXXX..XXXXXXX 100644 | ||
| 42 | --- a/hw/misc/sifive_u_otp.c | ||
| 43 | +++ b/hw/misc/sifive_u_otp.c | ||
| 44 | @@ -XXX,XX +XXX,XX @@ static void sifive_u_otp_realize(DeviceState *dev, Error **errp) | ||
| 45 | TYPE_SIFIVE_U_OTP, SIFIVE_U_OTP_REG_SIZE); | ||
| 46 | sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio); | ||
| 47 | |||
| 48 | - dinfo = drive_get_next(IF_NONE); | ||
| 49 | + dinfo = drive_get_next(IF_PFLASH); | ||
| 50 | + if (!dinfo) { | ||
| 51 | + dinfo = drive_get_next(IF_NONE); | ||
| 52 | + if (dinfo) { | ||
| 53 | + warn_report("using \"-drive if=none\" for the OTP is deprecated, " | ||
| 54 | + "use \"-drive if=pflash\" instead."); | ||
| 55 | + } | ||
| 56 | + } | ||
| 57 | if (dinfo) { | ||
| 58 | int ret; | ||
| 59 | uint64_t perm; | ||
| 60 | -- | 41 | -- |
| 61 | 2.31.1 | 42 | 2.37.1 |
| 62 | |||
| 63 | diff view generated by jsdifflib |