[v1] riscv-to-apply queue

[PULL 0/2] riscv-to-apply queue

Alistair Francis posted 2 patches 2 years, 5 months ago

Diff against v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v2 v3 v3 v3
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git fetch https://github.com/patchew-project/qemu tags/patchew/20211117092031.99019-1-alistair.francis@opensource.wdc.com

Maintainers: Alistair Francis <alistair.francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bin.meng@windriver.com>

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meson.build            |  6 ++++
target/riscv/machine.c | 92 +++++++++++++++++++++++++-------------------------
2 files changed, 52 insertions(+), 46 deletions(-)

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[PULL 0/2] riscv-to-apply queue

Posted by Alistair Francis 2 years, 5 months ago

From: Alistair Francis <alistair.francis@wdc.com>

The following changes since commit 8d5fcb1990bc64b62c0bc12121fe510940be5664:

  Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging (2021-11-17 07:41:08 +0100)

are available in the Git repository at:

  git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20211117-1

for you to fetch changes up to c94c239496256f1f1cb589825d052c2f3e26ebf6:

  meson.build: Merge riscv32 and riscv64 cpu family (2021-11-17 19:18:22 +1000)

----------------------------------------------------------------
Sixth RISC-V PR for QEMU 6.2

 - Fix build for riscv hosts
 - Soft code alphabetically

----------------------------------------------------------------
Bin Meng (1):
      target/riscv: machine: Sort the .subsections

Richard Henderson (1):
      meson.build: Merge riscv32 and riscv64 cpu family

 meson.build            |  6 ++++
 target/riscv/machine.c | 92 +++++++++++++++++++++++++-------------------------
 2 files changed, 52 insertions(+), 46 deletions(-)

Re: [PULL 0/2] riscv-to-apply queue

Posted by Richard Henderson 2 years, 5 months ago

On 11/17/21 10:20 AM, Alistair Francis wrote:
> From: Alistair Francis <alistair.francis@wdc.com>
> 
> The following changes since commit 8d5fcb1990bc64b62c0bc12121fe510940be5664:
> 
>    Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging (2021-11-17 07:41:08 +0100)
> 
> are available in the Git repository at:
> 
>    git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20211117-1
> 
> for you to fetch changes up to c94c239496256f1f1cb589825d052c2f3e26ebf6:
> 
>    meson.build: Merge riscv32 and riscv64 cpu family (2021-11-17 19:18:22 +1000)
> 
> ----------------------------------------------------------------
> Sixth RISC-V PR for QEMU 6.2
> 
>   - Fix build for riscv hosts
>   - Soft code alphabetically
> 
> ----------------------------------------------------------------
> Bin Meng (1):
>        target/riscv: machine: Sort the .subsections
> 
> Richard Henderson (1):
>        meson.build: Merge riscv32 and riscv64 cpu family
> 
>   meson.build            |  6 ++++
>   target/riscv/machine.c | 92 +++++++++++++++++++++++++-------------------------
>   2 files changed, 52 insertions(+), 46 deletions(-)
> 

Applied, thanks.


r~