The following changes since commit b10d00d8811fa4eed4862963273d7353ce310c82:

Merge remote-tracking branch 'remotes/kraxel/tags/seabios-20220118-pull-request' into staging (2022-01-19 18:46:28 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220120

for you to fetch changes up to 9705e3c1dcff96b0b3c7e594b6cd68d27d6c4ced:

hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR (2022-01-20 11:47:54 +0000)

target-arm:

* hw/intc/arm_gicv3_its: Fix various minor bugs

* hw/arm/aspeed: Add the i3c device to the AST2600 SoC

* hw/arm: kudo: add lm75s behind bus 1 switch at 75

* hw/arm/virt: Fix support for running guests on hosts

with restricted IPA ranges

* hw/intc/arm_gic: Allow reset of the running priority

* hw/intc/arm_gic: Implement read of GICC_IIDR

* hw/arm/virt: Support for virtio-mem-pci

* hw/arm/virt: Support CPU cluster on ARM virt machine

* docs/can: convert to restructuredText

* hw/net: Move MV88W8618 network device out of hw/arm/ directory

* hw/arm/virt: KVM: Enable PAuth when supported by the host

Gavin Shan (2):

virtio-mem: Correct default THP size for ARM64

hw/arm/virt: Support for virtio-mem-pci

Lucas Ramage (1):

docs/can: convert to restructuredText

Marc Zyngier (7):

hw/arm/virt: KVM: Enable PAuth when supported by the host

hw/arm/virt: Add a control for the the highmem PCIe MMIO

hw/arm/virt: Add a control for the the highmem redistributors

hw/arm/virt: Honor highmem setting when computing the memory map

hw/arm/virt: Use the PA range to compute the memory map

hw/arm/virt: Disable highmem devices that don't fit in the PA range

hw/arm/virt: Drop superfluous checks against highmem

From: Marc Zyngier <maz@kernel.org>

Add basic support for Pointer Authentication when running a KVM

guest and that the host supports it, loosely based on the SVE

support.

Although the feature is enabled by default when the host advertises

it, it is possible to disable it by setting the 'pauth=off' CPU

property. The 'pauth' comment is removed from cpu-features.rst,

as it is now common to both TCG and KVM.

Tested on an Apple M1 running 5.16-rc6.

Cc: Eric Auger <eric.auger@redhat.com>

Cc: Richard Henderson <richard.henderson@linaro.org>

Cc: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Andrew Jones <drjones@redhat.com>

Signed-off-by: Marc Zyngier <maz@kernel.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20220107150154.2490308-1-maz@kernel.org

[PMM: fixed indentation]

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

docs/system/arm/cpu-features.rst | 4 ----

target/arm/cpu.h | 1 +

target/arm/cpu.c | 16 +++++-----------

target/arm/cpu64.c | 31 +++++++++++++++++++++++++++----

target/arm/kvm64.c | 21 +++++++++++++++++++++

5 files changed, 54 insertions(+), 19 deletions(-)

diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst

index XXXXXXX..XXXXXXX 100644

--- a/docs/system/arm/cpu-features.rst

+++ b/docs/system/arm/cpu-features.rst

@@ -XXX,XX +XXX,XX @@ TCG VCPU Features

TCG VCPU features are CPU features that are specific to TCG.

Below is the list of TCG VCPU features and their descriptions.

- pauth Enable or disable ``FEAT_Pauth``, pointer

- authentication. By default, the feature is

- enabled with ``-cpu max``.

-

pauth-impdef When ``FEAT_Pauth`` is enabled, either the

*impdef* (Implementation Defined) algorithm

is enabled or the *architected* QARMA algorithm

diff --git a/target/arm/cpu.h b/target/arm/cpu.h

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/cpu.h

+++ b/target/arm/cpu.h

@@ -XXX,XX +XXX,XX @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);

void aarch64_sve_change_el(CPUARMState *env, int old_el,

int new_el, bool el0_a64);

void aarch64_add_sve_properties(Object *obj);

+void aarch64_add_pauth_properties(Object *obj);

/*

* SVE registers are encoded in KVM's memory in an endianness-invariant format.

diff --git a/target/arm/cpu.c b/target/arm/cpu.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/cpu.c

+++ b/target/arm/cpu.c

@@ -XXX,XX +XXX,XX @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)

return;

}

- /*

- * KVM does not support modifications to this feature.

- * We have not registered the cpu properties when KVM

- * is in use, so the user will not be able to set them.

- */

- if (!kvm_enabled()) {

- arm_cpu_pauth_finalize(cpu, &local_err);

- if (local_err != NULL) {

- error_propagate(errp, local_err);

- return;

- }

+ arm_cpu_pauth_finalize(cpu, &local_err);

+ if (local_err != NULL) {

+ error_propagate(errp, local_err);

+ return;

}

}

@@ -XXX,XX +XXX,XX @@ static void arm_host_initfn(Object *obj)

kvm_arm_set_cpu_features_from_host(cpu);

if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {

aarch64_add_sve_properties(obj);

+ aarch64_add_pauth_properties(obj);

}

#else

hvf_arm_set_cpu_features_from_host(cpu);

diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/cpu64.c

+++ b/target/arm/cpu64.c

@@ -XXX,XX +XXX,XX @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)

int arch_val = 0, impdef_val = 0;

uint64_t t;

+ /* Exit early if PAuth is enabled, and fall through to disable it */

+ if (kvm_enabled() && cpu->prop_pauth) {

+ if (!cpu_isar_feature(aa64_pauth, cpu)) {

+ error_setg(errp, "'pauth' feature not supported by KVM on this host");

+ }

+

+ return;

+ }

+

/* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */

if (cpu->prop_pauth) {

if (cpu->prop_pauth_impdef) {

@@ -XXX,XX +XXX,XX @@ static Property arm_cpu_pauth_property =

static Property arm_cpu_pauth_impdef_property =

DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);

+void aarch64_add_pauth_properties(Object *obj)

+{

+ ARMCPU *cpu = ARM_CPU(obj);

+

+ /* Default to PAUTH on, with the architected algorithm on TCG. */

+ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);

+ if (kvm_enabled()) {

+ /*

+ * Mirror PAuth support from the probed sysregs back into the

+ * property for KVM. Is it just a bit backward? Yes it is!

+ */

+ cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu);

+ } else {

+ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);

+ }

+}

+

/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);

* otherwise, a CPU with as many features enabled as our emulation supports.

* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;

@@ -XXX,XX +XXX,XX @@ static void aarch64_max_initfn(Object *obj)

cpu->dcz_blocksize = 7; /* 512 bytes */

#endif

- /* Default to PAUTH on, with the architected algorithm. */

- qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);

- qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);

-

bitmap_fill(cpu->sve_vq_supported, ARM_MAX_VQ);

}

+ aarch64_add_pauth_properties(obj);

aarch64_add_sve_properties(obj);

object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq,

cpu_max_set_sve_max_vq, NULL, NULL);

diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/kvm64.c

+++ b/target/arm/kvm64.c

@@ -XXX,XX +XXX,XX @@ static int read_sys_reg64(int fd, uint64_t *pret, uint64_t id)

return ioctl(fd, KVM_GET_ONE_REG, &idreg);

}

+static bool kvm_arm_pauth_supported(void)

+{

+ return (kvm_check_extension(kvm_state, KVM_CAP_ARM_PTRAUTH_ADDRESS) &&

+ kvm_check_extension(kvm_state, KVM_CAP_ARM_PTRAUTH_GENERIC));

+}

+

bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)

{

/* Identify the feature bits corresponding to the host CPU, and

@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)

*/

struct kvm_vcpu_init init = { .target = -1, };

+ /*

+ * Ask for Pointer Authentication if supported. We can't play the

+ * SVE trick of synthesising the ID reg as KVM won't tell us

+ * whether we have the architected or IMPDEF version of PAuth, so

+ * we have to use the actual ID regs.

+ */

+ if (kvm_arm_pauth_supported()) {

+ init.features[0] |= (1 << KVM_ARM_VCPU_PTRAUTH_ADDRESS |

+ 1 << KVM_ARM_VCPU_PTRAUTH_GENERIC);

+ }

+

if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {

return false;

}

@@ -XXX,XX +XXX,XX @@ int kvm_arch_init_vcpu(CPUState *cs)

assert(kvm_arm_sve_supported());

cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE;

}

+ if (cpu_isar_feature(aa64_pauth, cpu)) {

+ cpu->kvm_init_features[0] |= (1 << KVM_ARM_VCPU_PTRAUTH_ADDRESS |

+ 1 << KVM_ARM_VCPU_PTRAUTH_GENERIC);

+ }

/* Do KVM_ARM_VCPU_INIT ioctl */

ret = kvm_arm_vcpu_init(cs);

--

2.25.1