[v4] Support UXL filed in xstatus

[PATCH v4 16/20] target/riscv: Ajdust vector atomic check with XLEN

Posted by LIU Zhiwei 4 years, 3 months ago

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index 6fa673f4b2..6cc83356d9 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -739,7 +739,8 @@ static bool amo_check(DisasContext *s, arg_rwdvm* a)
             (!a->wd || vext_check_overlap_mask(s, a->rd, a->vm, false)) &&
             vext_check_reg(s, a->rd, false) &&
             vext_check_reg(s, a->rs2, false) &&
-            ((1 << s->sew) <= sizeof(target_ulong)) &&
+            /* TODO: RV128 could allow 128-bit atomics */
+            ((1 << s->sew) <=  (get_xl(s) == MXL_RV32 ? 4 : 8)) &&
             ((1 << s->sew) >= 4));
 }
 
-- 
2.25.1

Re: [PATCH v4 16/20] target/riscv: Ajdust vector atomic check with XLEN

Posted by Alistair Francis 4 years, 2 months ago

On Fri, Nov 12, 2021 at 2:11 AM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
> index 6fa673f4b2..6cc83356d9 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -739,7 +739,8 @@ static bool amo_check(DisasContext *s, arg_rwdvm* a)
>              (!a->wd || vext_check_overlap_mask(s, a->rd, a->vm, false)) &&
>              vext_check_reg(s, a->rd, false) &&
>              vext_check_reg(s, a->rs2, false) &&
> -            ((1 << s->sew) <= sizeof(target_ulong)) &&
> +            /* TODO: RV128 could allow 128-bit atomics */
> +            ((1 << s->sew) <=  (get_xl(s) == MXL_RV32 ? 4 : 8)) &&
>              ((1 << s->sew) >= 4));
>  }
>
> --
> 2.25.1
>
>