target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x]

[PATCH] target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x]

matheus.ferst@eldorado.org.br posted 1 patch 2 years, 6 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20211109192911.485507-1-matheus.ferst@eldorado.org.br

Maintainers: "Cédric Le Goater" <clg@kaod.org>, David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>, Daniel Henrique Barboza <danielhb413@gmail.com>

target/ppc/translate/fp-impl.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

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[PATCH] target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x]

Posted by matheus.ferst@eldorado.org.br 2 years, 6 months ago

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

These instructions should update the GPR indicated by the field RA
instead of RT. This error caused a regression on Mac OS 9 boot and some
graphical glitches in OS X.

Fixes: a39a106634a9 ("target/ppc: Move load and store floating point instructions to decodetree")
Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
 target/ppc/translate/fp-impl.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
index d1dbb1b96b..c9e05201d9 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -1328,7 +1328,7 @@ static bool do_lsfpsd(DisasContext *ctx, int rt, int ra, TCGv displ,
         set_fpr(rt, t0);
     }
     if (update) {
-        tcg_gen_mov_tl(cpu_gpr[rt], ea);
+        tcg_gen_mov_tl(cpu_gpr[ra], ea);
     }
     tcg_temp_free_i64(t0);
     tcg_temp_free(ea);
-- 
2.25.1

Re: [PATCH] target/ppc: Fix register update on lf[sd]u[x]/stf[sd]u[x]

Posted by Cédric Le Goater 2 years, 6 months ago

On 11/9/21 20:29, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
> 
> These instructions should update the GPR indicated by the field RA
> instead of RT. This error caused a regression on Mac OS 9 boot and some
> graphical glitches in OS X.

I could reproduce the issue and the fix on Mac OS 9. I wonder how we could
automate the MacOS tests since they are graphical.

> Fixes: a39a106634a9 ("target/ppc: Move load and store floating point instructions to decodetree")
> Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---
>   target/ppc/translate/fp-impl.c.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Applied for 6.2

Thanks,

C.

> 
> diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
> index d1dbb1b96b..c9e05201d9 100644
> --- a/target/ppc/translate/fp-impl.c.inc
> +++ b/target/ppc/translate/fp-impl.c.inc
> @@ -1328,7 +1328,7 @@ static bool do_lsfpsd(DisasContext *ctx, int rt, int ra, TCGv displ,
>           set_fpr(rt, t0);
>       }
>       if (update) {
> -        tcg_gen_mov_tl(cpu_gpr[rt], ea);
> +        tcg_gen_mov_tl(cpu_gpr[ra], ea);
>       }
>       tcg_temp_free_i64(t0);
>       tcg_temp_free(ea);
>