This device is part of a superio/ISA bridge chip and IRQs from it are
routed to an ISA interrupt set by the Interrupt Line PCI config
register. Change uhci_update_irq() to allow this and use it from
vt82c686-uhci-pci.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v2: Do it differently to confine isa reference to vt82c686-uhci-pci as
hcd-uhci is also used on machines that don't have isa. Left Jiaxun's
R-b there as he checked it's the same for VT82C686B and gave R-b for
the approach which still holds but speak up if you tink otherwise.

 hw/usb/hcd-uhci.c          | 15 +++++++++------
 hw/usb/hcd-uhci.h          |  8 +++++---
 hw/usb/vt82c686-uhci-pci.c | 10 ++++++++++
 3 files changed, 24 insertions(+), 9 deletions(-)

diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index 0cb02a6432..7924cfffdb 100644
--- a/hw/usb/hcd-uhci.c
+++ b/hw/usb/hcd-uhci.c
@@ -288,9 +288,14 @@ static UHCIAsync *uhci_async_find_td(UHCIState *s, uint32_t td_addr)
     return NULL;
 }
 
+static void uhci_pci_set_irq(UHCIState *s, int level)
+{
+    pci_set_irq(&s->dev, level);
+}
+
 static void uhci_update_irq(UHCIState *s)
 {
-    int level;
+    int level = 0;
     if (((s->status2 & 1) && (s->intr & (1 << 2))) ||
         ((s->status2 & 2) && (s->intr & (1 << 3))) ||
         ((s->status & UHCI_STS_USBERR) && (s->intr & (1 << 0))) ||
@@ -298,10 +303,8 @@ static void uhci_update_irq(UHCIState *s)
         (s->status & UHCI_STS_HSERR) ||
         (s->status & UHCI_STS_HCPERR)) {
         level = 1;
-    } else {
-        level = 0;
     }
-    pci_set_irq(&s->dev, level);
+    s->set_irq(s, level);
 }
 
 static void uhci_reset(DeviceState *dev)
@@ -1170,9 +1173,9 @@ void usb_uhci_common_realize(PCIDevice *dev, Error **errp)
 
     pci_conf[PCI_CLASS_PROG] = 0x00;
     /* TODO: reset value should be 0. */
-    pci_conf[USB_SBRN] = USB_RELEASE_1; // release number
-
+    pci_conf[USB_SBRN] = USB_RELEASE_1; /* release number */
     pci_config_set_interrupt_pin(pci_conf, u->info.irq_pin + 1);
+    s->set_irq = uhci_pci_set_irq;
 
     if (s->masterbus) {
         USBPort *ports[NB_PORTS];
diff --git a/hw/usb/hcd-uhci.h b/hw/usb/hcd-uhci.h
index e61d8fcb19..ecd19762d6 100644
--- a/hw/usb/hcd-uhci.h
+++ b/hw/usb/hcd-uhci.h
@@ -42,7 +42,9 @@ typedef struct UHCIPort {
     uint16_t ctrl;
 } UHCIPort;
 
-typedef struct UHCIState {
+typedef struct UHCIState UHCIState;
+
+struct UHCIState {
     PCIDevice dev;
     MemoryRegion io_bar;
     USBBus bus; /* Note unused when we're a companion controller */
@@ -60,7 +62,7 @@ typedef struct UHCIState {
     uint32_t frame_bandwidth;
     bool completions_only;
     UHCIPort ports[NB_PORTS];
-
+    void (*set_irq)(UHCIState *s, int level);
     /* Interrupts that should be raised at the end of the current frame.  */
     uint32_t pending_int_mask;
 
@@ -72,7 +74,7 @@ typedef struct UHCIState {
     char *masterbus;
     uint32_t firstport;
     uint32_t maxframes;
-} UHCIState;
+};
 
 #define TYPE_UHCI "pci-uhci-usb"
 DECLARE_INSTANCE_CHECKER(UHCIState, UHCI, TYPE_UHCI)
diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c
index b109c21603..f6bae704be 100644
--- a/hw/usb/vt82c686-uhci-pci.c
+++ b/hw/usb/vt82c686-uhci-pci.c
@@ -1,6 +1,15 @@
 #include "qemu/osdep.h"
+#include "hw/irq.h"
 #include "hcd-uhci.h"
 
+static void uhci_isa_set_irq(UHCIState *s, int level)
+{
+    uint8_t irq = pci_get_byte(s->dev.config + PCI_INTERRUPT_LINE);
+    if (irq > 0 && irq < 15) {
+        qemu_set_irq(isa_get_irq(NULL, irq), level);
+    }
+}
+
 static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp)
 {
     UHCIState *s = UHCI(dev);
@@ -14,6 +23,7 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp)
     pci_set_long(pci_conf + 0xc0, 0x00002000);
 
     usb_uhci_common_realize(dev, errp);
+    s->set_irq = uhci_isa_set_irq;
 }
 
 static UHCIInfo uhci_info[] = {
-- 
2.21.4

On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> This device is part of a superio/ISA bridge chip and IRQs from it are
> routed to an ISA interrupt set by the Interrupt Line PCI config
> register. Change uhci_update_irq() to allow this and use it from
> vt82c686-uhci-pci.

Hmm, shouldn't this logic be part of the superio bridge emulation?

take care,
  Gerd

On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
> On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
>> This device is part of a superio/ISA bridge chip and IRQs from it are
>> routed to an ISA interrupt set by the Interrupt Line PCI config
>> register. Change uhci_update_irq() to allow this and use it from
>> vt82c686-uhci-pci.
>
> Hmm, shouldn't this logic be part of the superio bridge emulation?

But how? The ISA bridge does not know about PCI and PCI does not know 
about ISA. UHCI is a PCIDevice and would raise PCI interrupts. Where and 
how could I convert that to ISA interrupts? (Oh and ISA in QEMU is not 
Qdev'ified and I don't want to do that as it's too much work and too much 
to break that I can't even test so if an alternative solution involves 
that then get somebody do that first.) This patch puts the irq mapping in 
the vt82xx specific vt82c686-uhci-pci.c which in the real chip also 
contains the ISA bridge so in a way it's part of the superio bridge 
emulation in that this uhci variant is part of that chip model.

Regards,
BALATON Zoltan

On Mon, Oct 11, 2021 at 12:31:17PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
> > On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> > > This device is part of a superio/ISA bridge chip and IRQs from it are
> > > routed to an ISA interrupt set by the Interrupt Line PCI config
> > > register. Change uhci_update_irq() to allow this and use it from
> > > vt82c686-uhci-pci.
> > 
> > Hmm, shouldn't this logic be part of the superio bridge emulation?
> 
> But how? The ISA bridge does not know about PCI and PCI does not know about
> ISA. UHCI is a PCIDevice and would raise PCI interrupts. Where and how could
> I convert that to ISA interrupts? (Oh and ISA in QEMU is not Qdev'ified and
> I don't want to do that as it's too much work and too much to break that I
> can't even test so if an alternative solution involves that then get
> somebody do that first.) This patch puts the irq mapping in the vt82xx
> specific vt82c686-uhci-pci.c which in the real chip also contains the ISA
> bridge so in a way it's part of the superio bridge emulation in that this
> uhci variant is part of that chip model.

I'd suggest to first switch over uhci to use pci_allocate_irq() +
qemu_set_irq() (see ehci for example).

With that in place it should be possible to have vt82c686-uhci-pci.c
create a different IRQ setup without changes elsewhere in uhci and
without adding extra callbacks.

HTH,
  Gerd