On Tue, 5 Oct 2021 07:33:24 +0200
Cédric Le Goater <clg@kaod.org> wrote:
> Commit 4d9b8ef9b5ab ("target/ppc: Fix 64-bit decrementer") introduced
> new int64t variables and broke the test triggering the decrementer
> exception. Revert partially the change to evaluate both clause of the
> if statement.
>
> Reported-by: Coverity CID 1464061
> Fixes: 4d9b8ef9b5ab ("target/ppc: Fix 64-bit decrementer")
> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
Reviewed-by: Greg Kurz <groug@kaod.org>
> hw/ppc/ppc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
> index f5d012f860af..a724b0bb5ecb 100644
> --- a/hw/ppc/ppc.c
> +++ b/hw/ppc/ppc.c
> @@ -848,7 +848,7 @@ static void __cpu_ppc_store_decr(PowerPCCPU *cpu, uint64_t *nextp,
> * On MSB edge based DEC implementations the MSB going from 0 -> 1 triggers
> * an edge interrupt, so raise it here too.
> */
> - if ((signed_value < 3) ||
> + if ((value < 3) ||
> ((tb_env->flags & PPC_DECR_UNDERFLOW_LEVEL) && signed_value < 0) ||
> ((tb_env->flags & PPC_DECR_UNDERFLOW_TRIGGERED) && signed_value < 0
> && signed_decr >= 0)) {