On 10/4/21 17:46, Cédric Le Goater wrote:
> Hello,
>
> The Aspeed SoCs have a dual boot function for firmware fail-over
> recovery. The system auto-reboots from the second flash if the main
> flash does not boot successfully within a certain amount of time. This
> function is called alternate boot (ABR) in the FMC controllers.
>
> On the AST2600, the ABR registers controlling the 2nd watchdog timer
> were moved from the watchdog register to the FMC controller. To
> control WDT2 through the FMC model register set, this series creates a
> local address space on top of WDT2 memory region.
>
> To test on the fuji-bmc machine, run :
>
> devmem 0x1e620064
> devmem 0x1e78504C
>
> devmem 0x1e620064 32 0xffffffff
> devmem 0x1e620064
> devmem 0x1e78504C
>
> Thanks
>
> C.
>
>
> Cédric Le Goater (4):
> aspeed/wdt: Add trace events
> aspeed/smc: Dump address offset in trace events
> aspeed/wdt: Add an alias for the MMIO region
> aspeed/smc: Improve support for the alternate boot function
Andrew, Peter D., Joel,
Would you have time to tell me what you think about the last 2 patches ?
It would be a nice extension for the Fuji in QEMU 6.2.
Here are some images for tests.
https://github.com/peterdelevoryas/openbmc/releases/download/fuji-v0.1-alpha/fuji.mtd
This one is recent :
https://github.com/peterdelevoryas/openbmc/releases/download/fuji.mtd.0/fuji.mtd
U-Boot 2019.04 fuji-bd6ee58668 (Sep 13 2021 - 21:29:46 +0000)
[ 0.000000] Linux version 5.10.23-fuji (oe-user@oe-host) (arm-fb-linux-gnueabi-gcc (GCC) 9.3.0, GNU ld (GNU Binutils) 2.34.0.20200220) #1 SMP Thu Sep 9 23:22:29 UTC 2021
Thanks,
C.
>
> include/hw/ssi/aspeed_smc.h | 3 ++
> include/hw/watchdog/wdt_aspeed.h | 1 +
> hw/arm/aspeed_ast2600.c | 2 +
> hw/ssi/aspeed_smc.c | 84 ++++++++++++++++++++++++++++++--
> hw/watchdog/wdt_aspeed.c | 20 ++++++--
> hw/ssi/trace-events | 1 +
> hw/watchdog/trace-events | 4 ++
> 7 files changed, 107 insertions(+), 8 deletions(-)
>